1 /* ARM COFF support for BFD.
2    Copyright (C) 1998-2016 Free Software Foundation, Inc.
3 
4    This file is part of BFD, the Binary File Descriptor library.
5 
6    This program is free software; you can redistribute it and/or modify
7    it under the terms of the GNU General Public License as published by
8    the Free Software Foundation; either version 3 of the License, or
9    (at your option) any later version.
10 
11    This program is distributed in the hope that it will be useful,
12    but WITHOUT ANY WARRANTY; without even the implied warranty of
13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14    GNU General Public License for more details.
15 
16    You should have received a copy of the GNU General Public License
17    along with this program; if not, write to the Free Software Foundation,
18    Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
19 
20 #define COFFARM 1
21 
22 #define L_LNNO_SIZE 2
23 #define INCLUDE_COMDAT_FIELDS_IN_AUXENT
24 #include "coff/external.h"
25 
26 /* Bits for f_flags:
27  	F_RELFLG	relocation info stripped from file
28  	F_EXEC		file is executable (no unresolved external references)
29  	F_LNNO		line numbers stripped from file
30  	F_LSYMS		local symbols stripped from file
31         F_INTERWORK     file supports switching between ARM and Thumb instruction sets
32         F_INTERWORK_SET the F_INTERWORK bit is valid
33  	F_APCS_FLOAT	code passes float arguments in float registers
34  	F_PIC		code is reentrant/position-independent
35  	F_AR32WR	file has byte ordering of an AR32WR machine (e.g. vax)
36  	F_APCS_26	file uses 26 bit ARM Procedure Calling Standard
37  	F_APCS_SET	the F_APCS_26, F_APCS_FLOAT and F_PIC bits have been initialised
38  	F_SOFT_FLOAT	code does not use floating point instructions.  */
39 
40 #define F_RELFLG	(0x0001)
41 #define F_EXEC		(0x0002)
42 #define F_LNNO		(0x0004)
43 #define F_LSYMS		(0x0008)
44 #define F_INTERWORK	(0x0010)
45 #define F_INTERWORK_SET	(0x0020)
46 #define F_APCS_FLOAT	(0x0040)
47 #undef  F_AR16WR
48 #define F_PIC		(0x0080)
49 #define	F_AR32WR	(0x0100)
50 #define F_APCS_26	(0x0400)
51 #define F_APCS_SET	(0x0800)
52 #define F_SOFT_FLOAT	(0x2000)
53 #define F_VFP_FLOAT	(0x4000)
54 
55 /* Bits stored in flags field of the internal_f structure */
56 
57 #define F_INTERWORK	(0x0010)
58 #define F_APCS_FLOAT	(0x0040)
59 #define F_PIC		(0x0080)
60 #define F_APCS26	(0x1000)
61 #define F_ARM_ARCHITECTURE_MASK (0x4000+0x0800+0x0400)
62 #define F_ARM_2		(0x0400)
63 #define F_ARM_2a	(0x0800)
64 #define F_ARM_3		(0x0c00)
65 #define F_ARM_3M	(0x4000)
66 #define F_ARM_4		(0x4400)
67 #define F_ARM_4T	(0x4800)
68 #define F_ARM_5		(0x4c00)
69 
70 /*
71   ARMMAGIC ought to encoded the procesor type,
72   but it is too late to change it now, instead
73   the flags field of the internal_f structure
74   is used as shown above.
75 
76   XXX - NC 5/6/97.  */
77 
78 #define	ARMMAGIC	0xa00  /* I just made this up */
79 
80 #define ARMBADMAG(x) (((x).f_magic != ARMMAGIC))
81 
82 #define	ARMPEMAGIC	0x1c0
83 #define	THUMBPEMAGIC	0x1c2
84 #define	ARMV7PEMAGIC	0x1c4
85 
86 #undef  ARMBADMAG
87 #define ARMBADMAG(x) (((x).f_magic != ARMMAGIC) && ((x).f_magic != ARMPEMAGIC) && ((x).f_magic != THUMBPEMAGIC) && ((x).f_magic != ARMV7PEMAGIC))
88 
89 #define OMAGIC          0404    /* object files, eg as output */
90 #define ZMAGIC          0413    /* demand load format, eg normal ld output */
91 #define STMAGIC		0401	/* target shlib */
92 #define SHMAGIC		0443	/* host   shlib */
93 
94 /* define some NT default values */
95 /*  #define NT_IMAGE_BASE        0x400000 moved to internal.h */
96 #define NT_SECTION_ALIGNMENT 0x1000
97 #define NT_FILE_ALIGNMENT    0x200
98 #define NT_DEF_RESERVE       0x100000
99 #define NT_DEF_COMMIT        0x1000
100 
101 /* We use the .rdata section to hold read only data.  */
102 #define _LIT	".rdata"
103 
104 /********************** RELOCATION DIRECTIVES **********************/
105 #ifdef ARM_WINCE
106 struct external_reloc
107 {
108   char r_vaddr[4];
109   char r_symndx[4];
110   char r_type[2];
111 };
112 
113 #define RELOC struct external_reloc
114 #define RELSZ 10
115 
116 #else
117 struct external_reloc
118 {
119   char r_vaddr[4];
120   char r_symndx[4];
121   char r_type[2];
122   char r_offset[4];
123 };
124 
125 #define RELOC struct external_reloc
126 #define RELSZ 14
127 #endif
128 
129 #define ARM_NOTE_SECTION ".note"
130