| /art/compiler/optimizing/ |
| D | code_generator_mips.cc | 2069 __ Or(dst, lhs, rhs_reg); in HandleBinaryOp() local
2119 __ Or(dst_low, lhs_low, rhs_low); in HandleBinaryOp() local
2120 __ Or(dst_high, lhs_high, rhs_high); in HandleBinaryOp() local
2154 __ Or(dst_low, lhs_low, TMP); in HandleBinaryOp() local
2164 __ Or(dst_high, lhs_high, TMP); in HandleBinaryOp() local
2332 __ Or(dst, dst, TMP); in HandleShift() local
2354 __ Or(dst, dst, TMP); in HandleShift() local
2394 __ Or(dst_high, dst_high, TMP); in HandleShift() local
2399 __ Or(dst_low, dst_low, TMP); in HandleShift() local
2404 __ Or(dst_low, dst_low, TMP); in HandleShift() local
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| D | intrinsics_mips.cc | 269 __ Or(out, out, TMP); in GenReverse() local
283 __ Or(out, out, TMP); in GenReverse() local
290 __ Or(out, out, TMP); in GenReverse() local
301 __ Or(out, TMP, out); in GenReverse() local
307 __ Or(out, TMP, out); in GenReverse() local
313 __ Or(out, TMP, out); in GenReverse() local
335 __ Or(TMP, TMP, AT); // Hold in TMP until it's safe in GenReverse() local
342 __ Or(out_lo, out_lo, AT); in GenReverse() local
349 __ Or(out_hi, out_hi, TMP); in GenReverse() local
355 __ Or(out_lo, out_lo, TMP); in GenReverse() local
[all …]
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| D | intrinsics_mips64.cc | 709 __ Or(out, out, AT); in GenMinMax() local
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| D | code_generator_mips64.cc | 1902 __ Or(dst, lhs, rhs_reg); in HandleBinaryOp() local
4590 __ Or(dst.AsRegister<GpuRegister>(), AT, TMP); in GenConditionalMove() local
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| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 408 TEST_F(AssemblerMIPSTest, Or) { in TEST_F() argument
2311 __ Or(mips::T1, mips::T2, mips::T3); in TEST_F() local
2457 __ Or(mips::T1, mips::T2, mips::T3); in TEST_F() local
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| D | assembler_mips.cc | 565 void MipsAssembler::Or(Register rd, Register rs, Register rt) { in Or() function in art::mips::MipsAssembler
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64_test.cc | 1189 TEST_F(AssemblerMIPS64Test, Or) { in TEST_F() argument
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| D | assembler_mips64.cc | 383 void Mips64Assembler::Or(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Or() function in art::mips64::Mips64Assembler
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