| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonMachineScheduler.h | 46 const TargetSchedModel *SchedModel; variable
134 const TargetSchedModel *SchedModel; member
191 const TargetSchedModel *SchedModel; variable
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64StorePairSuppress.cpp | 33 TargetSchedModel SchedModel; member in __anona1f81aa70111::AArch64StorePairSuppress
|
| D | AArch64ConditionalCompares.cpp | 723 MCSchedModel SchedModel; member in __anon2dd089570211::AArch64ConditionalCompares
|
| /external/llvm/include/llvm/CodeGen/ |
| D | TargetSchedule.h | 35 MCSchedModel SchedModel; variable
|
| D | ScheduleDAGInstrs.h | 106 TargetSchedModel SchedModel; variable
|
| D | MachineTraceMetrics.h | 74 TargetSchedModel SchedModel; variable
|
| D | MachineScheduler.h | 581 const TargetSchedModel *SchedModel; variable
860 const TargetSchedModel *SchedModel; variable
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.h | 129 bool hasLowDefLatency(const TargetSchedModel &SchedModel, in hasLowDefLatency()
|
| /external/llvm/lib/MC/ |
| D | MCSubtargetInfo.cpp | 102 const MCSchedModel SchedModel = getSchedModelForCPU(CPU); in getInstrItineraryForCPU() local
|
| /external/llvm/include/llvm/Target/ |
| D | TargetSubtargetInfo.h | 119 const TargetSchedModel *SchedModel) const { in resolveSchedClass()
|
| D | TargetInstrInfo.h | 1280 virtual bool hasHighOperandLatency(const TargetSchedModel &SchedModel, in hasHighOperandLatency()
|
| /external/llvm/lib/CodeGen/ |
| D | MachineCombiner.cpp | 41 MCSchedModel SchedModel; member in __anonbe3a18ba0111::MachineCombiner
|
| D | EarlyIfConversion.cpp | 592 MCSchedModel SchedModel; member in __anonfc1f82480211::EarlyIfConverter
|
| D | MachineTraceMetrics.cpp | 870 const TargetSchedModel &SchedModel, in updatePhysDepsUpwards()
931 const TargetSchedModel &SchedModel, in pushDepHeight()
|
| D | TargetInstrInfo.cpp | 1028 unsigned TargetInstrInfo::defaultDefLatency(const MCSchedModel &SchedModel, in defaultDefLatency()
1054 bool TargetInstrInfo::hasLowDefLatency(const TargetSchedModel &SchedModel, in hasLowDefLatency()
|
| D | MachineLICM.cpp | 77 TargetSchedModel SchedModel; member in __anon19b931500111::MachineLICM
|
| D | MachineScheduler.cpp | 1786 init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel) { in init()
2302 const TargetSchedModel *SchedModel) { in initResourceDelta()
|
| D | IfConversion.cpp | 161 TargetSchedModel SchedModel; member in __anon01cb6a4b0111::IfConverter
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMSubtarget.h | 332 MCSchedModel SchedModel; variable
|
| D | ARMBaseInstrInfo.cpp | 4071 bool ARMBaseInstrInfo::hasHighOperandLatency(const TargetSchedModel &SchedModel, in hasHighOperandLatency()
4092 bool ARMBaseInstrInfo::hasLowDefLatency(const TargetSchedModel &SchedModel, in hasLowDefLatency()
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 7181 bool X86InstrInfo::hasHighOperandLatency(const TargetSchedModel &SchedModel, in hasHighOperandLatency()
|