Searched defs:Srl (Results 1 – 4 of 4) sorted by relevance
| /art/compiler/optimizing/ |
| D | intrinsics_mips.cc | 268 __ Srl(out, out, 24); in GenReverse() local
282 __ Srl(out, in, 16); in GenReverse() local
288 __ Srl(out, out, 8); in GenReverse() local
299 __ Srl(out, out, 4); in GenReverse() local
305 __ Srl(out, out, 2); in GenReverse() local
311 __ Srl(out, out, 1); in GenReverse() local
334 __ Srl(AT, in_lo, 16); in GenReverse() local
339 __ Srl(out_lo, in_hi, 16); // Here we are finally done reading in GenReverse() local
347 __ Srl(TMP, TMP, 8); in GenReverse() local
353 __ Srl(out_lo, out_lo, 8); in GenReverse() local
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| D | intrinsics_mips64.cc | 419 __ Srl(TMP, in, 1); in GenBitCount() local
425 __ Srl(TMP, TMP, 2); in GenBitCount() local
428 __ Srl(out, TMP, 4); in GenBitCount() local
434 __ Srl(out, out, 24); in GenBitCount() local
922 __ Srl(TMP, TMP, 1); // TMP = 0 if out = Int.MIN_VALUE in GenRound() local
1734 __ Srl(temp1, temp1, 1); // Extract length. in VisitStringEquals() local
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| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 452 TEST_F(AssemblerMIPSTest, Srl) { in TEST_F() argument
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 511 void Mips64Assembler::Srl(GpuRegister rd, GpuRegister rt, int shamt) { in Srl() function in art::mips64::Mips64Assembler
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