1 /******************************************************************************
2  *
3  *  Copyright 1999-2012 Broadcom Corporation
4  *
5  *  Licensed under the Apache License, Version 2.0 (the "License");
6  *  you may not use this file except in compliance with the License.
7  *  You may obtain a copy of the License at:
8  *
9  *  http://www.apache.org/licenses/LICENSE-2.0
10  *
11  *  Unless required by applicable law or agreed to in writing, software
12  *  distributed under the License is distributed on an "AS IS" BASIS,
13  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  *  See the License for the specific language governing permissions and
15  *  limitations under the License.
16  *
17  ******************************************************************************/
18 
19 /******************************************************************************
20  *
21  *  This file contains function of the HCIC unit to format and send HCI
22  *  commands.
23  *
24  ******************************************************************************/
25 
26 #include "bt_common.h"
27 #include "bt_target.h"
28 #include "btu.h"
29 #include "hcidefs.h"
30 #include "hcimsgs.h"
31 
32 #include <stddef.h>
33 #include <string.h>
34 
35 #include "btm_int.h" /* Included for UIPC_* macro definitions */
36 
btsnd_hcic_inquiry(const LAP inq_lap,uint8_t duration,uint8_t response_cnt)37 void btsnd_hcic_inquiry(const LAP inq_lap, uint8_t duration,
38                         uint8_t response_cnt) {
39   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
40   uint8_t* pp = (uint8_t*)(p + 1);
41 
42   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_INQUIRY;
43   p->offset = 0;
44 
45   UINT16_TO_STREAM(pp, HCI_INQUIRY);
46   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_INQUIRY);
47 
48   LAP_TO_STREAM(pp, inq_lap);
49   UINT8_TO_STREAM(pp, duration);
50   UINT8_TO_STREAM(pp, response_cnt);
51 
52   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
53 }
54 
btsnd_hcic_inq_cancel(void)55 void btsnd_hcic_inq_cancel(void) {
56   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
57   uint8_t* pp = (uint8_t*)(p + 1);
58 
59   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_INQ_CANCEL;
60   p->offset = 0;
61   UINT16_TO_STREAM(pp, HCI_INQUIRY_CANCEL);
62   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_INQ_CANCEL);
63 
64   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
65 }
66 
btsnd_hcic_per_inq_mode(uint16_t max_period,uint16_t min_period,const LAP inq_lap,uint8_t duration,uint8_t response_cnt)67 void btsnd_hcic_per_inq_mode(uint16_t max_period, uint16_t min_period,
68                              const LAP inq_lap, uint8_t duration,
69                              uint8_t response_cnt) {
70   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
71   uint8_t* pp = (uint8_t*)(p + 1);
72 
73   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_PER_INQ_MODE;
74   p->offset = 0;
75 
76   UINT16_TO_STREAM(pp, HCI_PERIODIC_INQUIRY_MODE);
77   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_PER_INQ_MODE);
78 
79   UINT16_TO_STREAM(pp, max_period);
80   UINT16_TO_STREAM(pp, min_period);
81   LAP_TO_STREAM(pp, inq_lap);
82   UINT8_TO_STREAM(pp, duration);
83   UINT8_TO_STREAM(pp, response_cnt);
84 
85   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
86 }
87 
btsnd_hcic_exit_per_inq(void)88 void btsnd_hcic_exit_per_inq(void) {
89   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
90   uint8_t* pp = (uint8_t*)(p + 1);
91 
92   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_EXIT_PER_INQ;
93   p->offset = 0;
94   UINT16_TO_STREAM(pp, HCI_EXIT_PERIODIC_INQUIRY_MODE);
95   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_EXIT_PER_INQ);
96 
97   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
98 }
99 
btsnd_hcic_create_conn(const RawAddress & dest,uint16_t packet_types,uint8_t page_scan_rep_mode,uint8_t page_scan_mode,uint16_t clock_offset,uint8_t allow_switch)100 void btsnd_hcic_create_conn(const RawAddress& dest, uint16_t packet_types,
101                             uint8_t page_scan_rep_mode, uint8_t page_scan_mode,
102                             uint16_t clock_offset, uint8_t allow_switch) {
103   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
104   uint8_t* pp = (uint8_t*)(p + 1);
105 
106 #ifndef BT_10A
107   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CREATE_CONN;
108 #else
109   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CREATE_CONN - 1;
110 #endif
111   p->offset = 0;
112 
113   UINT16_TO_STREAM(pp, HCI_CREATE_CONNECTION);
114 #ifndef BT_10A
115   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CREATE_CONN);
116 #else
117   UINT8_TO_STREAM(pp, (HCIC_PARAM_SIZE_CREATE_CONN - 1));
118 #endif
119   BDADDR_TO_STREAM(pp, dest);
120   UINT16_TO_STREAM(pp, packet_types);
121   UINT8_TO_STREAM(pp, page_scan_rep_mode);
122   UINT8_TO_STREAM(pp, page_scan_mode);
123   UINT16_TO_STREAM(pp, clock_offset);
124 #if !defined(BT_10A)
125   UINT8_TO_STREAM(pp, allow_switch);
126 #endif
127   btm_acl_paging(p, dest);
128 }
129 
btsnd_hcic_disconnect(uint16_t handle,uint8_t reason)130 void btsnd_hcic_disconnect(uint16_t handle, uint8_t reason) {
131   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
132   uint8_t* pp = (uint8_t*)(p + 1);
133 
134   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_DISCONNECT;
135   p->offset = 0;
136 
137   UINT16_TO_STREAM(pp, HCI_DISCONNECT);
138   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_DISCONNECT);
139   UINT16_TO_STREAM(pp, handle);
140   UINT8_TO_STREAM(pp, reason);
141 
142   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
143 }
144 
145 #if (BTM_SCO_INCLUDED == TRUE)
btsnd_hcic_add_SCO_conn(uint16_t handle,uint16_t packet_types)146 void btsnd_hcic_add_SCO_conn(uint16_t handle, uint16_t packet_types) {
147   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
148   uint8_t* pp = (uint8_t*)(p + 1);
149 
150   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ADD_SCO_CONN;
151   p->offset = 0;
152 
153   UINT16_TO_STREAM(pp, HCI_ADD_SCO_CONNECTION);
154   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ADD_SCO_CONN);
155 
156   UINT16_TO_STREAM(pp, handle);
157   UINT16_TO_STREAM(pp, packet_types);
158 
159   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
160 }
161 #endif /* BTM_SCO_INCLUDED */
162 
btsnd_hcic_create_conn_cancel(const RawAddress & dest)163 void btsnd_hcic_create_conn_cancel(const RawAddress& dest) {
164   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
165   uint8_t* pp = (uint8_t*)(p + 1);
166 
167   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CREATE_CONN_CANCEL;
168   p->offset = 0;
169 
170   UINT16_TO_STREAM(pp, HCI_CREATE_CONNECTION_CANCEL);
171   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CREATE_CONN_CANCEL);
172 
173   BDADDR_TO_STREAM(pp, dest);
174 
175   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
176 }
177 
btsnd_hcic_accept_conn(const RawAddress & dest,uint8_t role)178 void btsnd_hcic_accept_conn(const RawAddress& dest, uint8_t role) {
179   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
180   uint8_t* pp = (uint8_t*)(p + 1);
181 
182   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ACCEPT_CONN;
183   p->offset = 0;
184 
185   UINT16_TO_STREAM(pp, HCI_ACCEPT_CONNECTION_REQUEST);
186   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ACCEPT_CONN);
187   BDADDR_TO_STREAM(pp, dest);
188   UINT8_TO_STREAM(pp, role);
189 
190   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
191 }
192 
btsnd_hcic_reject_conn(const RawAddress & dest,uint8_t reason)193 void btsnd_hcic_reject_conn(const RawAddress& dest, uint8_t reason) {
194   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
195   uint8_t* pp = (uint8_t*)(p + 1);
196 
197   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REJECT_CONN;
198   p->offset = 0;
199 
200   UINT16_TO_STREAM(pp, HCI_REJECT_CONNECTION_REQUEST);
201   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_REJECT_CONN);
202 
203   BDADDR_TO_STREAM(pp, dest);
204   UINT8_TO_STREAM(pp, reason);
205 
206   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
207 }
208 
btsnd_hcic_link_key_req_reply(const RawAddress & bd_addr,LINK_KEY link_key)209 void btsnd_hcic_link_key_req_reply(const RawAddress& bd_addr,
210                                    LINK_KEY link_key) {
211   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
212   uint8_t* pp = (uint8_t*)(p + 1);
213 
214   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_LINK_KEY_REQ_REPLY;
215   p->offset = 0;
216 
217   UINT16_TO_STREAM(pp, HCI_LINK_KEY_REQUEST_REPLY);
218   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_LINK_KEY_REQ_REPLY);
219 
220   BDADDR_TO_STREAM(pp, bd_addr);
221   ARRAY16_TO_STREAM(pp, link_key);
222 
223   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
224 }
225 
btsnd_hcic_link_key_neg_reply(const RawAddress & bd_addr)226 void btsnd_hcic_link_key_neg_reply(const RawAddress& bd_addr) {
227   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
228   uint8_t* pp = (uint8_t*)(p + 1);
229 
230   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_LINK_KEY_NEG_REPLY;
231   p->offset = 0;
232 
233   UINT16_TO_STREAM(pp, HCI_LINK_KEY_REQUEST_NEG_REPLY);
234   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_LINK_KEY_NEG_REPLY);
235 
236   BDADDR_TO_STREAM(pp, bd_addr);
237 
238   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
239 }
240 
btsnd_hcic_pin_code_req_reply(const RawAddress & bd_addr,uint8_t pin_code_len,PIN_CODE pin_code)241 void btsnd_hcic_pin_code_req_reply(const RawAddress& bd_addr,
242                                    uint8_t pin_code_len, PIN_CODE pin_code) {
243   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
244   uint8_t* pp = (uint8_t*)(p + 1);
245   int i;
246 
247   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_PIN_CODE_REQ_REPLY;
248   p->offset = 0;
249 
250   UINT16_TO_STREAM(pp, HCI_PIN_CODE_REQUEST_REPLY);
251   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_PIN_CODE_REQ_REPLY);
252 
253   BDADDR_TO_STREAM(pp, bd_addr);
254   UINT8_TO_STREAM(pp, pin_code_len);
255 
256   for (i = 0; i < pin_code_len; i++) *pp++ = *pin_code++;
257 
258   for (; i < PIN_CODE_LEN; i++) *pp++ = 0;
259 
260   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
261 }
262 
btsnd_hcic_pin_code_neg_reply(const RawAddress & bd_addr)263 void btsnd_hcic_pin_code_neg_reply(const RawAddress& bd_addr) {
264   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
265   uint8_t* pp = (uint8_t*)(p + 1);
266 
267   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_PIN_CODE_NEG_REPLY;
268   p->offset = 0;
269 
270   UINT16_TO_STREAM(pp, HCI_PIN_CODE_REQUEST_NEG_REPLY);
271   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_PIN_CODE_NEG_REPLY);
272 
273   BDADDR_TO_STREAM(pp, bd_addr);
274 
275   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
276 }
277 
btsnd_hcic_change_conn_type(uint16_t handle,uint16_t packet_types)278 void btsnd_hcic_change_conn_type(uint16_t handle, uint16_t packet_types) {
279   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
280   uint8_t* pp = (uint8_t*)(p + 1);
281 
282   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CHANGE_CONN_TYPE;
283   p->offset = 0;
284 
285   UINT16_TO_STREAM(pp, HCI_CHANGE_CONN_PACKET_TYPE);
286   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CHANGE_CONN_TYPE);
287 
288   UINT16_TO_STREAM(pp, handle);
289   UINT16_TO_STREAM(pp, packet_types);
290 
291   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
292 }
293 
btsnd_hcic_auth_request(uint16_t handle)294 void btsnd_hcic_auth_request(uint16_t handle) {
295   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
296   uint8_t* pp = (uint8_t*)(p + 1);
297 
298   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
299   p->offset = 0;
300 
301   UINT16_TO_STREAM(pp, HCI_AUTHENTICATION_REQUESTED);
302   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
303 
304   UINT16_TO_STREAM(pp, handle);
305 
306   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
307 }
308 
btsnd_hcic_set_conn_encrypt(uint16_t handle,bool enable)309 void btsnd_hcic_set_conn_encrypt(uint16_t handle, bool enable) {
310   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
311   uint8_t* pp = (uint8_t*)(p + 1);
312 
313   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SET_CONN_ENCRYPT;
314   p->offset = 0;
315 
316   UINT16_TO_STREAM(pp, HCI_SET_CONN_ENCRYPTION);
317   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SET_CONN_ENCRYPT);
318 
319   UINT16_TO_STREAM(pp, handle);
320   UINT8_TO_STREAM(pp, enable);
321 
322   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
323 }
324 
btsnd_hcic_rmt_name_req(const RawAddress & bd_addr,uint8_t page_scan_rep_mode,uint8_t page_scan_mode,uint16_t clock_offset)325 void btsnd_hcic_rmt_name_req(const RawAddress& bd_addr,
326                              uint8_t page_scan_rep_mode, uint8_t page_scan_mode,
327                              uint16_t clock_offset) {
328   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
329   uint8_t* pp = (uint8_t*)(p + 1);
330 
331   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_RMT_NAME_REQ;
332   p->offset = 0;
333 
334   UINT16_TO_STREAM(pp, HCI_RMT_NAME_REQUEST);
335   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_RMT_NAME_REQ);
336 
337   BDADDR_TO_STREAM(pp, bd_addr);
338   UINT8_TO_STREAM(pp, page_scan_rep_mode);
339   UINT8_TO_STREAM(pp, page_scan_mode);
340   UINT16_TO_STREAM(pp, clock_offset);
341 
342   btm_acl_paging(p, bd_addr);
343 }
344 
btsnd_hcic_rmt_name_req_cancel(const RawAddress & bd_addr)345 void btsnd_hcic_rmt_name_req_cancel(const RawAddress& bd_addr) {
346   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
347   uint8_t* pp = (uint8_t*)(p + 1);
348 
349   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_RMT_NAME_REQ_CANCEL;
350   p->offset = 0;
351 
352   UINT16_TO_STREAM(pp, HCI_RMT_NAME_REQUEST_CANCEL);
353   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_RMT_NAME_REQ_CANCEL);
354 
355   BDADDR_TO_STREAM(pp, bd_addr);
356 
357   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
358 }
359 
btsnd_hcic_rmt_features_req(uint16_t handle)360 void btsnd_hcic_rmt_features_req(uint16_t handle) {
361   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
362   uint8_t* pp = (uint8_t*)(p + 1);
363 
364   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
365   p->offset = 0;
366 
367   UINT16_TO_STREAM(pp, HCI_READ_RMT_FEATURES);
368   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
369 
370   UINT16_TO_STREAM(pp, handle);
371 
372   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
373 }
374 
btsnd_hcic_rmt_ext_features(uint16_t handle,uint8_t page_num)375 void btsnd_hcic_rmt_ext_features(uint16_t handle, uint8_t page_num) {
376   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
377   uint8_t* pp = (uint8_t*)(p + 1);
378 
379   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_RMT_EXT_FEATURES;
380   p->offset = 0;
381 
382   UINT16_TO_STREAM(pp, HCI_READ_RMT_EXT_FEATURES);
383   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_RMT_EXT_FEATURES);
384 
385   UINT16_TO_STREAM(pp, handle);
386   UINT8_TO_STREAM(pp, page_num);
387 
388   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
389 }
390 
btsnd_hcic_rmt_ver_req(uint16_t handle)391 void btsnd_hcic_rmt_ver_req(uint16_t handle) {
392   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
393   uint8_t* pp = (uint8_t*)(p + 1);
394 
395   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
396   p->offset = 0;
397 
398   UINT16_TO_STREAM(pp, HCI_READ_RMT_VERSION_INFO);
399   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
400 
401   UINT16_TO_STREAM(pp, handle);
402 
403   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
404 }
405 
btsnd_hcic_read_rmt_clk_offset(uint16_t handle)406 void btsnd_hcic_read_rmt_clk_offset(uint16_t handle) {
407   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
408   uint8_t* pp = (uint8_t*)(p + 1);
409 
410   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
411   p->offset = 0;
412 
413   UINT16_TO_STREAM(pp, HCI_READ_RMT_CLOCK_OFFSET);
414   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
415 
416   UINT16_TO_STREAM(pp, handle);
417 
418   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
419 }
420 
btsnd_hcic_read_lmp_handle(uint16_t handle)421 void btsnd_hcic_read_lmp_handle(uint16_t handle) {
422   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
423   uint8_t* pp = (uint8_t*)(p + 1);
424 
425   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
426   p->offset = 0;
427 
428   UINT16_TO_STREAM(pp, HCI_READ_LMP_HANDLE);
429   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
430 
431   UINT16_TO_STREAM(pp, handle);
432 
433   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
434 }
435 
btsnd_hcic_setup_esco_conn(uint16_t handle,uint32_t transmit_bandwidth,uint32_t receive_bandwidth,uint16_t max_latency,uint16_t voice,uint8_t retrans_effort,uint16_t packet_types)436 void btsnd_hcic_setup_esco_conn(uint16_t handle, uint32_t transmit_bandwidth,
437                                 uint32_t receive_bandwidth,
438                                 uint16_t max_latency, uint16_t voice,
439                                 uint8_t retrans_effort, uint16_t packet_types) {
440   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
441   uint8_t* pp = (uint8_t*)(p + 1);
442 
443   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SETUP_ESCO;
444   p->offset = 0;
445 
446   UINT16_TO_STREAM(pp, HCI_SETUP_ESCO_CONNECTION);
447   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SETUP_ESCO);
448 
449   UINT16_TO_STREAM(pp, handle);
450   UINT32_TO_STREAM(pp, transmit_bandwidth);
451   UINT32_TO_STREAM(pp, receive_bandwidth);
452   UINT16_TO_STREAM(pp, max_latency);
453   UINT16_TO_STREAM(pp, voice);
454   UINT8_TO_STREAM(pp, retrans_effort);
455   UINT16_TO_STREAM(pp, packet_types);
456 
457   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
458 }
459 
btsnd_hcic_accept_esco_conn(const RawAddress & bd_addr,uint32_t transmit_bandwidth,uint32_t receive_bandwidth,uint16_t max_latency,uint16_t content_fmt,uint8_t retrans_effort,uint16_t packet_types)460 void btsnd_hcic_accept_esco_conn(const RawAddress& bd_addr,
461                                  uint32_t transmit_bandwidth,
462                                  uint32_t receive_bandwidth,
463                                  uint16_t max_latency, uint16_t content_fmt,
464                                  uint8_t retrans_effort,
465                                  uint16_t packet_types) {
466   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
467   uint8_t* pp = (uint8_t*)(p + 1);
468 
469   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ACCEPT_ESCO;
470   p->offset = 0;
471 
472   UINT16_TO_STREAM(pp, HCI_ACCEPT_ESCO_CONNECTION);
473   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ACCEPT_ESCO);
474 
475   BDADDR_TO_STREAM(pp, bd_addr);
476   UINT32_TO_STREAM(pp, transmit_bandwidth);
477   UINT32_TO_STREAM(pp, receive_bandwidth);
478   UINT16_TO_STREAM(pp, max_latency);
479   UINT16_TO_STREAM(pp, content_fmt);
480   UINT8_TO_STREAM(pp, retrans_effort);
481   UINT16_TO_STREAM(pp, packet_types);
482 
483   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
484 }
485 
btsnd_hcic_reject_esco_conn(const RawAddress & bd_addr,uint8_t reason)486 void btsnd_hcic_reject_esco_conn(const RawAddress& bd_addr, uint8_t reason) {
487   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
488   uint8_t* pp = (uint8_t*)(p + 1);
489 
490   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REJECT_ESCO;
491   p->offset = 0;
492 
493   UINT16_TO_STREAM(pp, HCI_REJECT_ESCO_CONNECTION);
494   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_REJECT_ESCO);
495 
496   BDADDR_TO_STREAM(pp, bd_addr);
497   UINT8_TO_STREAM(pp, reason);
498 
499   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
500 }
501 
btsnd_hcic_hold_mode(uint16_t handle,uint16_t max_hold_period,uint16_t min_hold_period)502 void btsnd_hcic_hold_mode(uint16_t handle, uint16_t max_hold_period,
503                           uint16_t min_hold_period) {
504   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
505   uint8_t* pp = (uint8_t*)(p + 1);
506 
507   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_HOLD_MODE;
508   p->offset = 0;
509 
510   UINT16_TO_STREAM(pp, HCI_HOLD_MODE);
511   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_HOLD_MODE);
512 
513   UINT16_TO_STREAM(pp, handle);
514   UINT16_TO_STREAM(pp, max_hold_period);
515   UINT16_TO_STREAM(pp, min_hold_period);
516 
517   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
518 }
519 
btsnd_hcic_sniff_mode(uint16_t handle,uint16_t max_sniff_period,uint16_t min_sniff_period,uint16_t sniff_attempt,uint16_t sniff_timeout)520 void btsnd_hcic_sniff_mode(uint16_t handle, uint16_t max_sniff_period,
521                            uint16_t min_sniff_period, uint16_t sniff_attempt,
522                            uint16_t sniff_timeout) {
523   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
524   uint8_t* pp = (uint8_t*)(p + 1);
525 
526   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SNIFF_MODE;
527   p->offset = 0;
528 
529   UINT16_TO_STREAM(pp, HCI_SNIFF_MODE);
530   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SNIFF_MODE);
531 
532   UINT16_TO_STREAM(pp, handle);
533   UINT16_TO_STREAM(pp, max_sniff_period);
534   UINT16_TO_STREAM(pp, min_sniff_period);
535   UINT16_TO_STREAM(pp, sniff_attempt);
536   UINT16_TO_STREAM(pp, sniff_timeout);
537 
538   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
539 }
540 
btsnd_hcic_exit_sniff_mode(uint16_t handle)541 void btsnd_hcic_exit_sniff_mode(uint16_t handle) {
542   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
543   uint8_t* pp = (uint8_t*)(p + 1);
544 
545   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
546   p->offset = 0;
547 
548   UINT16_TO_STREAM(pp, HCI_EXIT_SNIFF_MODE);
549   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
550 
551   UINT16_TO_STREAM(pp, handle);
552 
553   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
554 }
555 
btsnd_hcic_park_mode(uint16_t handle,uint16_t beacon_max_interval,uint16_t beacon_min_interval)556 void btsnd_hcic_park_mode(uint16_t handle, uint16_t beacon_max_interval,
557                           uint16_t beacon_min_interval) {
558   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
559   uint8_t* pp = (uint8_t*)(p + 1);
560 
561   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_PARK_MODE;
562   p->offset = 0;
563 
564   UINT16_TO_STREAM(pp, HCI_PARK_MODE);
565   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_PARK_MODE);
566 
567   UINT16_TO_STREAM(pp, handle);
568   UINT16_TO_STREAM(pp, beacon_max_interval);
569   UINT16_TO_STREAM(pp, beacon_min_interval);
570 
571   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
572 }
573 
btsnd_hcic_exit_park_mode(uint16_t handle)574 void btsnd_hcic_exit_park_mode(uint16_t handle) {
575   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
576   uint8_t* pp = (uint8_t*)(p + 1);
577 
578   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
579   p->offset = 0;
580 
581   UINT16_TO_STREAM(pp, HCI_EXIT_PARK_MODE);
582   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
583 
584   UINT16_TO_STREAM(pp, handle);
585 
586   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
587 }
588 
btsnd_hcic_qos_setup(uint16_t handle,uint8_t flags,uint8_t service_type,uint32_t token_rate,uint32_t peak,uint32_t latency,uint32_t delay_var)589 void btsnd_hcic_qos_setup(uint16_t handle, uint8_t flags, uint8_t service_type,
590                           uint32_t token_rate, uint32_t peak, uint32_t latency,
591                           uint32_t delay_var) {
592   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
593   uint8_t* pp = (uint8_t*)(p + 1);
594 
595   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_QOS_SETUP;
596   p->offset = 0;
597 
598   UINT16_TO_STREAM(pp, HCI_QOS_SETUP);
599   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_QOS_SETUP);
600 
601   UINT16_TO_STREAM(pp, handle);
602   UINT8_TO_STREAM(pp, flags);
603   UINT8_TO_STREAM(pp, service_type);
604   UINT32_TO_STREAM(pp, token_rate);
605   UINT32_TO_STREAM(pp, peak);
606   UINT32_TO_STREAM(pp, latency);
607   UINT32_TO_STREAM(pp, delay_var);
608 
609   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
610 }
611 
btsnd_hcic_switch_role(const RawAddress & bd_addr,uint8_t role)612 void btsnd_hcic_switch_role(const RawAddress& bd_addr, uint8_t role) {
613   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
614   uint8_t* pp = (uint8_t*)(p + 1);
615 
616   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SWITCH_ROLE;
617   p->offset = 0;
618 
619   UINT16_TO_STREAM(pp, HCI_SWITCH_ROLE);
620   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SWITCH_ROLE);
621 
622   BDADDR_TO_STREAM(pp, bd_addr);
623   UINT8_TO_STREAM(pp, role);
624 
625   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
626 }
627 
btsnd_hcic_write_policy_set(uint16_t handle,uint16_t settings)628 void btsnd_hcic_write_policy_set(uint16_t handle, uint16_t settings) {
629   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
630   uint8_t* pp = (uint8_t*)(p + 1);
631 
632   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_POLICY_SET;
633   p->offset = 0;
634   UINT16_TO_STREAM(pp, HCI_WRITE_POLICY_SETTINGS);
635   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_POLICY_SET);
636 
637   UINT16_TO_STREAM(pp, handle);
638   UINT16_TO_STREAM(pp, settings);
639 
640   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
641 }
642 
btsnd_hcic_write_def_policy_set(uint16_t settings)643 void btsnd_hcic_write_def_policy_set(uint16_t settings) {
644   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
645   uint8_t* pp = (uint8_t*)(p + 1);
646 
647   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_DEF_POLICY_SET;
648   p->offset = 0;
649   UINT16_TO_STREAM(pp, HCI_WRITE_DEF_POLICY_SETTINGS);
650   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_DEF_POLICY_SET);
651 
652   UINT16_TO_STREAM(pp, settings);
653 
654   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
655 }
656 
btsnd_hcic_set_event_filter(uint8_t filt_type,uint8_t filt_cond_type,uint8_t * filt_cond,uint8_t filt_cond_len)657 void btsnd_hcic_set_event_filter(uint8_t filt_type, uint8_t filt_cond_type,
658                                  uint8_t* filt_cond, uint8_t filt_cond_len) {
659   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
660   uint8_t* pp = (uint8_t*)(p + 1);
661 
662   p->offset = 0;
663 
664   UINT16_TO_STREAM(pp, HCI_SET_EVENT_FILTER);
665 
666   if (filt_type) {
667     p->len = (uint16_t)(HCIC_PREAMBLE_SIZE + 2 + filt_cond_len);
668     UINT8_TO_STREAM(pp, (uint8_t)(2 + filt_cond_len));
669 
670     UINT8_TO_STREAM(pp, filt_type);
671     UINT8_TO_STREAM(pp, filt_cond_type);
672 
673     if (filt_cond_type == HCI_FILTER_COND_DEVICE_CLASS) {
674       DEVCLASS_TO_STREAM(pp, filt_cond);
675       filt_cond += DEV_CLASS_LEN;
676       DEVCLASS_TO_STREAM(pp, filt_cond);
677       filt_cond += DEV_CLASS_LEN;
678 
679       filt_cond_len -= (2 * DEV_CLASS_LEN);
680     } else if (filt_cond_type == HCI_FILTER_COND_BD_ADDR) {
681       BDADDR_TO_STREAM(pp, *((RawAddress*)filt_cond));
682       filt_cond += BD_ADDR_LEN;
683 
684       filt_cond_len -= BD_ADDR_LEN;
685     }
686 
687     if (filt_cond_len) ARRAY_TO_STREAM(pp, filt_cond, filt_cond_len);
688   } else {
689     p->len = (uint16_t)(HCIC_PREAMBLE_SIZE + 1);
690     UINT8_TO_STREAM(pp, 1);
691 
692     UINT8_TO_STREAM(pp, filt_type);
693   }
694 
695   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
696 }
697 
btsnd_hcic_write_pin_type(uint8_t type)698 void btsnd_hcic_write_pin_type(uint8_t type) {
699   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
700   uint8_t* pp = (uint8_t*)(p + 1);
701 
702   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
703   p->offset = 0;
704 
705   UINT16_TO_STREAM(pp, HCI_WRITE_PIN_TYPE);
706   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
707 
708   UINT8_TO_STREAM(pp, type);
709 
710   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
711 }
712 
btsnd_hcic_delete_stored_key(const RawAddress & bd_addr,bool delete_all_flag)713 void btsnd_hcic_delete_stored_key(const RawAddress& bd_addr,
714                                   bool delete_all_flag) {
715   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
716   uint8_t* pp = (uint8_t*)(p + 1);
717 
718   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_DELETE_STORED_KEY;
719   p->offset = 0;
720 
721   UINT16_TO_STREAM(pp, HCI_DELETE_STORED_LINK_KEY);
722   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_DELETE_STORED_KEY);
723 
724   BDADDR_TO_STREAM(pp, bd_addr);
725   UINT8_TO_STREAM(pp, delete_all_flag);
726 
727   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
728 }
729 
btsnd_hcic_change_name(BD_NAME name)730 void btsnd_hcic_change_name(BD_NAME name) {
731   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
732   uint8_t* pp = (uint8_t*)(p + 1);
733   uint16_t len = strlen((char*)name) + 1;
734 
735   memset(pp, 0, HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CHANGE_NAME);
736 
737   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CHANGE_NAME;
738   p->offset = 0;
739 
740   UINT16_TO_STREAM(pp, HCI_CHANGE_LOCAL_NAME);
741   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CHANGE_NAME);
742 
743   if (len > HCIC_PARAM_SIZE_CHANGE_NAME) len = HCIC_PARAM_SIZE_CHANGE_NAME;
744 
745   ARRAY_TO_STREAM(pp, name, len);
746 
747   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
748 }
749 
btsnd_hcic_read_name(void)750 void btsnd_hcic_read_name(void) {
751   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
752   uint8_t* pp = (uint8_t*)(p + 1);
753 
754   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD;
755   p->offset = 0;
756 
757   UINT16_TO_STREAM(pp, HCI_READ_LOCAL_NAME);
758   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_CMD);
759 
760   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
761 }
762 
btsnd_hcic_write_page_tout(uint16_t timeout)763 void btsnd_hcic_write_page_tout(uint16_t timeout) {
764   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
765   uint8_t* pp = (uint8_t*)(p + 1);
766 
767   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM2;
768   p->offset = 0;
769 
770   UINT16_TO_STREAM(pp, HCI_WRITE_PAGE_TOUT);
771   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM2);
772 
773   UINT16_TO_STREAM(pp, timeout);
774 
775   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
776 }
777 
btsnd_hcic_write_scan_enable(uint8_t flag)778 void btsnd_hcic_write_scan_enable(uint8_t flag) {
779   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
780   uint8_t* pp = (uint8_t*)(p + 1);
781 
782   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
783   p->offset = 0;
784 
785   UINT16_TO_STREAM(pp, HCI_WRITE_SCAN_ENABLE);
786   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
787 
788   UINT8_TO_STREAM(pp, flag);
789 
790   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
791 }
792 
btsnd_hcic_write_pagescan_cfg(uint16_t interval,uint16_t window)793 void btsnd_hcic_write_pagescan_cfg(uint16_t interval, uint16_t window) {
794   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
795   uint8_t* pp = (uint8_t*)(p + 1);
796 
797   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PAGESCAN_CFG;
798   p->offset = 0;
799 
800   UINT16_TO_STREAM(pp, HCI_WRITE_PAGESCAN_CFG);
801   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PAGESCAN_CFG);
802 
803   UINT16_TO_STREAM(pp, interval);
804   UINT16_TO_STREAM(pp, window);
805 
806   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
807 }
808 
btsnd_hcic_write_inqscan_cfg(uint16_t interval,uint16_t window)809 void btsnd_hcic_write_inqscan_cfg(uint16_t interval, uint16_t window) {
810   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
811   uint8_t* pp = (uint8_t*)(p + 1);
812 
813   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_INQSCAN_CFG;
814   p->offset = 0;
815 
816   UINT16_TO_STREAM(pp, HCI_WRITE_INQUIRYSCAN_CFG);
817   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_INQSCAN_CFG);
818 
819   UINT16_TO_STREAM(pp, interval);
820   UINT16_TO_STREAM(pp, window);
821 
822   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
823 }
824 
btsnd_hcic_write_auth_enable(uint8_t flag)825 void btsnd_hcic_write_auth_enable(uint8_t flag) {
826   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
827   uint8_t* pp = (uint8_t*)(p + 1);
828 
829   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
830   p->offset = 0;
831 
832   UINT16_TO_STREAM(pp, HCI_WRITE_AUTHENTICATION_ENABLE);
833   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
834 
835   UINT8_TO_STREAM(pp, flag);
836 
837   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
838 }
839 
btsnd_hcic_write_dev_class(DEV_CLASS dev_class)840 void btsnd_hcic_write_dev_class(DEV_CLASS dev_class) {
841   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
842   uint8_t* pp = (uint8_t*)(p + 1);
843 
844   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM3;
845   p->offset = 0;
846 
847   UINT16_TO_STREAM(pp, HCI_WRITE_CLASS_OF_DEVICE);
848   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM3);
849 
850   DEVCLASS_TO_STREAM(pp, dev_class);
851 
852   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
853 }
854 
btsnd_hcic_write_voice_settings(uint16_t flags)855 void btsnd_hcic_write_voice_settings(uint16_t flags) {
856   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
857   uint8_t* pp = (uint8_t*)(p + 1);
858 
859   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM2;
860   p->offset = 0;
861 
862   UINT16_TO_STREAM(pp, HCI_WRITE_VOICE_SETTINGS);
863   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM2);
864 
865   UINT16_TO_STREAM(pp, flags);
866 
867   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
868 }
869 
btsnd_hcic_write_auto_flush_tout(uint16_t handle,uint16_t tout)870 void btsnd_hcic_write_auto_flush_tout(uint16_t handle, uint16_t tout) {
871   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
872   uint8_t* pp = (uint8_t*)(p + 1);
873 
874   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_AUTOMATIC_FLUSH_TIMEOUT;
875   p->offset = 0;
876 
877   UINT16_TO_STREAM(pp, HCI_WRITE_AUTOMATIC_FLUSH_TIMEOUT);
878   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_AUTOMATIC_FLUSH_TIMEOUT);
879 
880   UINT16_TO_STREAM(pp, handle);
881   UINT16_TO_STREAM(pp, tout);
882 
883   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
884 }
885 
btsnd_hcic_read_tx_power(uint16_t handle,uint8_t type)886 void btsnd_hcic_read_tx_power(uint16_t handle, uint8_t type) {
887   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
888   uint8_t* pp = (uint8_t*)(p + 1);
889 
890   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_TX_POWER;
891   p->offset = 0;
892 
893   UINT16_TO_STREAM(pp, HCI_READ_TRANSMIT_POWER_LEVEL);
894   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_TX_POWER);
895 
896   UINT16_TO_STREAM(pp, handle);
897   UINT8_TO_STREAM(pp, type);
898 
899   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
900 }
901 
btsnd_hcic_host_num_xmitted_pkts(uint8_t num_handles,uint16_t * handle,uint16_t * num_pkts)902 void btsnd_hcic_host_num_xmitted_pkts(uint8_t num_handles, uint16_t* handle,
903                                       uint16_t* num_pkts) {
904   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
905   uint8_t* pp = (uint8_t*)(p + 1);
906 
907   p->len = HCIC_PREAMBLE_SIZE + 1 + (num_handles * 4);
908   p->offset = 0;
909 
910   UINT16_TO_STREAM(pp, HCI_HOST_NUM_PACKETS_DONE);
911   UINT8_TO_STREAM(pp, p->len - HCIC_PREAMBLE_SIZE);
912 
913   UINT8_TO_STREAM(pp, num_handles);
914 
915   for (int i = 0; i < num_handles; i++) {
916     UINT16_TO_STREAM(pp, handle[i]);
917     UINT16_TO_STREAM(pp, num_pkts[i]);
918   }
919 
920   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
921 }
922 
btsnd_hcic_write_link_super_tout(uint8_t local_controller_id,uint16_t handle,uint16_t timeout)923 void btsnd_hcic_write_link_super_tout(uint8_t local_controller_id,
924                                       uint16_t handle, uint16_t timeout) {
925   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
926   uint8_t* pp = (uint8_t*)(p + 1);
927 
928   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_LINK_SUPER_TOUT;
929   p->offset = 0;
930 
931   UINT16_TO_STREAM(pp, HCI_WRITE_LINK_SUPER_TOUT);
932   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_LINK_SUPER_TOUT);
933 
934   UINT16_TO_STREAM(pp, handle);
935   UINT16_TO_STREAM(pp, timeout);
936 
937   btu_hcif_send_cmd(local_controller_id, p);
938 }
939 
btsnd_hcic_write_cur_iac_lap(uint8_t num_cur_iac,LAP * const iac_lap)940 void btsnd_hcic_write_cur_iac_lap(uint8_t num_cur_iac, LAP* const iac_lap) {
941   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
942   uint8_t* pp = (uint8_t*)(p + 1);
943 
944   p->len = HCIC_PREAMBLE_SIZE + 1 + (LAP_LEN * num_cur_iac);
945   p->offset = 0;
946 
947   UINT16_TO_STREAM(pp, HCI_WRITE_CURRENT_IAC_LAP);
948   UINT8_TO_STREAM(pp, p->len - HCIC_PREAMBLE_SIZE);
949 
950   UINT8_TO_STREAM(pp, num_cur_iac);
951 
952   for (int i = 0; i < num_cur_iac; i++) LAP_TO_STREAM(pp, iac_lap[i]);
953 
954   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
955 }
956 
957 /******************************************
958  *    Lisbon Features
959  ******************************************/
960 #if (BTM_SSR_INCLUDED == TRUE)
961 
btsnd_hcic_sniff_sub_rate(uint16_t handle,uint16_t max_lat,uint16_t min_remote_lat,uint16_t min_local_lat)962 void btsnd_hcic_sniff_sub_rate(uint16_t handle, uint16_t max_lat,
963                                uint16_t min_remote_lat,
964                                uint16_t min_local_lat) {
965   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
966   uint8_t* pp = (uint8_t*)(p + 1);
967 
968   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SNIFF_SUB_RATE;
969   p->offset = 0;
970 
971   UINT16_TO_STREAM(pp, HCI_SNIFF_SUB_RATE);
972   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SNIFF_SUB_RATE);
973 
974   UINT16_TO_STREAM(pp, handle);
975   UINT16_TO_STREAM(pp, max_lat);
976   UINT16_TO_STREAM(pp, min_remote_lat);
977   UINT16_TO_STREAM(pp, min_local_lat);
978 
979   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
980 }
981 #endif /* BTM_SSR_INCLUDED */
982 
983 /**** Extended Inquiry Response Commands ****/
btsnd_hcic_write_ext_inquiry_response(void * buffer,uint8_t fec_req)984 void btsnd_hcic_write_ext_inquiry_response(void* buffer, uint8_t fec_req) {
985   BT_HDR* p = (BT_HDR*)buffer;
986   uint8_t* pp = (uint8_t*)(p + 1);
987 
988   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_EXT_INQ_RESP;
989   p->offset = 0;
990 
991   UINT16_TO_STREAM(pp, HCI_WRITE_EXT_INQ_RESPONSE);
992   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_EXT_INQ_RESP);
993 
994   UINT8_TO_STREAM(pp, fec_req);
995 
996   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
997 }
998 
btsnd_hcic_io_cap_req_reply(const RawAddress & bd_addr,uint8_t capability,uint8_t oob_present,uint8_t auth_req)999 void btsnd_hcic_io_cap_req_reply(const RawAddress& bd_addr, uint8_t capability,
1000                                  uint8_t oob_present, uint8_t auth_req) {
1001   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1002   uint8_t* pp = (uint8_t*)(p + 1);
1003 
1004   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_IO_CAP_RESP;
1005   p->offset = 0;
1006 
1007   UINT16_TO_STREAM(pp, HCI_IO_CAPABILITY_REQUEST_REPLY);
1008   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_IO_CAP_RESP);
1009 
1010   BDADDR_TO_STREAM(pp, bd_addr);
1011   UINT8_TO_STREAM(pp, capability);
1012   UINT8_TO_STREAM(pp, oob_present);
1013   UINT8_TO_STREAM(pp, auth_req);
1014 
1015   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1016 }
1017 
btsnd_hcic_enhanced_set_up_synchronous_connection(uint16_t conn_handle,enh_esco_params_t * p_params)1018 void btsnd_hcic_enhanced_set_up_synchronous_connection(
1019     uint16_t conn_handle, enh_esco_params_t* p_params) {
1020   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1021   uint8_t* pp = (uint8_t*)(p + 1);
1022 
1023   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ENH_SET_ESCO_CONN;
1024   p->offset = 0;
1025 
1026   UINT16_TO_STREAM(pp, HCI_ENH_SETUP_ESCO_CONNECTION);
1027   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ENH_SET_ESCO_CONN);
1028 
1029   UINT16_TO_STREAM(pp, conn_handle);
1030   UINT32_TO_STREAM(pp, p_params->transmit_bandwidth);
1031   UINT32_TO_STREAM(pp, p_params->receive_bandwidth);
1032   UINT8_TO_STREAM(pp, p_params->transmit_coding_format.coding_format);
1033   UINT16_TO_STREAM(pp, p_params->transmit_coding_format.company_id);
1034   UINT16_TO_STREAM(pp,
1035                    p_params->transmit_coding_format.vendor_specific_codec_id);
1036   UINT8_TO_STREAM(pp, p_params->receive_coding_format.coding_format);
1037   UINT16_TO_STREAM(pp, p_params->receive_coding_format.company_id);
1038   UINT16_TO_STREAM(pp,
1039                    p_params->receive_coding_format.vendor_specific_codec_id);
1040   UINT16_TO_STREAM(pp, p_params->transmit_codec_frame_size);
1041   UINT16_TO_STREAM(pp, p_params->receive_codec_frame_size);
1042   UINT32_TO_STREAM(pp, p_params->input_bandwidth);
1043   UINT32_TO_STREAM(pp, p_params->output_bandwidth);
1044   UINT8_TO_STREAM(pp, p_params->input_coding_format.coding_format);
1045   UINT16_TO_STREAM(pp, p_params->input_coding_format.company_id);
1046   UINT16_TO_STREAM(pp, p_params->input_coding_format.vendor_specific_codec_id);
1047   UINT8_TO_STREAM(pp, p_params->output_coding_format.coding_format);
1048   UINT16_TO_STREAM(pp, p_params->output_coding_format.company_id);
1049   UINT16_TO_STREAM(pp, p_params->output_coding_format.vendor_specific_codec_id);
1050   UINT16_TO_STREAM(pp, p_params->input_coded_data_size);
1051   UINT16_TO_STREAM(pp, p_params->output_coded_data_size);
1052   UINT8_TO_STREAM(pp, p_params->input_pcm_data_format);
1053   UINT8_TO_STREAM(pp, p_params->output_pcm_data_format);
1054   UINT8_TO_STREAM(pp, p_params->input_pcm_payload_msb_position);
1055   UINT8_TO_STREAM(pp, p_params->output_pcm_payload_msb_position);
1056   UINT8_TO_STREAM(pp, p_params->input_data_path);
1057   UINT8_TO_STREAM(pp, p_params->output_data_path);
1058   UINT8_TO_STREAM(pp, p_params->input_transport_unit_size);
1059   UINT8_TO_STREAM(pp, p_params->output_transport_unit_size);
1060   UINT16_TO_STREAM(pp, p_params->max_latency_ms);
1061   UINT16_TO_STREAM(pp, p_params->packet_types);
1062   UINT8_TO_STREAM(pp, p_params->retransmission_effort);
1063 
1064   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1065 }
1066 
btsnd_hcic_enhanced_accept_synchronous_connection(const RawAddress & bd_addr,enh_esco_params_t * p_params)1067 void btsnd_hcic_enhanced_accept_synchronous_connection(
1068     const RawAddress& bd_addr, enh_esco_params_t* p_params) {
1069   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1070   uint8_t* pp = (uint8_t*)(p + 1);
1071 
1072   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ENH_ACC_ESCO_CONN;
1073   p->offset = 0;
1074 
1075   UINT16_TO_STREAM(pp, HCI_ENH_ACCEPT_ESCO_CONNECTION);
1076   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ENH_ACC_ESCO_CONN);
1077 
1078   BDADDR_TO_STREAM(pp, bd_addr);
1079   UINT32_TO_STREAM(pp, p_params->transmit_bandwidth);
1080   UINT32_TO_STREAM(pp, p_params->receive_bandwidth);
1081   UINT8_TO_STREAM(pp, p_params->transmit_coding_format.coding_format);
1082   UINT16_TO_STREAM(pp, p_params->transmit_coding_format.company_id);
1083   UINT16_TO_STREAM(pp,
1084                    p_params->transmit_coding_format.vendor_specific_codec_id);
1085   UINT8_TO_STREAM(pp, p_params->receive_coding_format.coding_format);
1086   UINT16_TO_STREAM(pp, p_params->receive_coding_format.company_id);
1087   UINT16_TO_STREAM(pp,
1088                    p_params->receive_coding_format.vendor_specific_codec_id);
1089   UINT16_TO_STREAM(pp, p_params->transmit_codec_frame_size);
1090   UINT16_TO_STREAM(pp, p_params->receive_codec_frame_size);
1091   UINT32_TO_STREAM(pp, p_params->input_bandwidth);
1092   UINT32_TO_STREAM(pp, p_params->output_bandwidth);
1093   UINT8_TO_STREAM(pp, p_params->input_coding_format.coding_format);
1094   UINT16_TO_STREAM(pp, p_params->input_coding_format.company_id);
1095   UINT16_TO_STREAM(pp, p_params->input_coding_format.vendor_specific_codec_id);
1096   UINT8_TO_STREAM(pp, p_params->output_coding_format.coding_format);
1097   UINT16_TO_STREAM(pp, p_params->output_coding_format.company_id);
1098   UINT16_TO_STREAM(pp, p_params->output_coding_format.vendor_specific_codec_id);
1099   UINT16_TO_STREAM(pp, p_params->input_coded_data_size);
1100   UINT16_TO_STREAM(pp, p_params->output_coded_data_size);
1101   UINT8_TO_STREAM(pp, p_params->input_pcm_data_format);
1102   UINT8_TO_STREAM(pp, p_params->output_pcm_data_format);
1103   UINT8_TO_STREAM(pp, p_params->input_pcm_payload_msb_position);
1104   UINT8_TO_STREAM(pp, p_params->output_pcm_payload_msb_position);
1105   UINT8_TO_STREAM(pp, p_params->input_data_path);
1106   UINT8_TO_STREAM(pp, p_params->output_data_path);
1107   UINT8_TO_STREAM(pp, p_params->input_transport_unit_size);
1108   UINT8_TO_STREAM(pp, p_params->output_transport_unit_size);
1109   UINT16_TO_STREAM(pp, p_params->max_latency_ms);
1110   UINT16_TO_STREAM(pp, p_params->packet_types);
1111   UINT8_TO_STREAM(pp, p_params->retransmission_effort);
1112 
1113   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1114 }
1115 
btsnd_hcic_io_cap_req_neg_reply(const RawAddress & bd_addr,uint8_t err_code)1116 void btsnd_hcic_io_cap_req_neg_reply(const RawAddress& bd_addr,
1117                                      uint8_t err_code) {
1118   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1119   uint8_t* pp = (uint8_t*)(p + 1);
1120 
1121   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_IO_CAP_NEG_REPLY;
1122   p->offset = 0;
1123 
1124   UINT16_TO_STREAM(pp, HCI_IO_CAP_REQ_NEG_REPLY);
1125   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_IO_CAP_NEG_REPLY);
1126 
1127   BDADDR_TO_STREAM(pp, bd_addr);
1128   UINT8_TO_STREAM(pp, err_code);
1129 
1130   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1131 }
1132 
btsnd_hcic_read_local_oob_data(void)1133 void btsnd_hcic_read_local_oob_data(void) {
1134   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1135   uint8_t* pp = (uint8_t*)(p + 1);
1136 
1137   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_R_LOCAL_OOB;
1138   p->offset = 0;
1139 
1140   UINT16_TO_STREAM(pp, HCI_READ_LOCAL_OOB_DATA);
1141   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_R_LOCAL_OOB);
1142 
1143   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1144 }
1145 
btsnd_hcic_user_conf_reply(const RawAddress & bd_addr,bool is_yes)1146 void btsnd_hcic_user_conf_reply(const RawAddress& bd_addr, bool is_yes) {
1147   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1148   uint8_t* pp = (uint8_t*)(p + 1);
1149 
1150   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_UCONF_REPLY;
1151   p->offset = 0;
1152 
1153   if (!is_yes) {
1154     /* Negative reply */
1155     UINT16_TO_STREAM(pp, HCI_USER_CONF_VALUE_NEG_REPLY);
1156   } else {
1157     /* Confirmation */
1158     UINT16_TO_STREAM(pp, HCI_USER_CONF_REQUEST_REPLY);
1159   }
1160 
1161   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_UCONF_REPLY);
1162 
1163   BDADDR_TO_STREAM(pp, bd_addr);
1164 
1165   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1166 }
1167 
btsnd_hcic_user_passkey_reply(const RawAddress & bd_addr,uint32_t value)1168 void btsnd_hcic_user_passkey_reply(const RawAddress& bd_addr, uint32_t value) {
1169   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1170   uint8_t* pp = (uint8_t*)(p + 1);
1171 
1172   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_U_PKEY_REPLY;
1173   p->offset = 0;
1174 
1175   UINT16_TO_STREAM(pp, HCI_USER_PASSKEY_REQ_REPLY);
1176   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_U_PKEY_REPLY);
1177 
1178   BDADDR_TO_STREAM(pp, bd_addr);
1179   UINT32_TO_STREAM(pp, value);
1180 
1181   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1182 }
1183 
btsnd_hcic_user_passkey_neg_reply(const RawAddress & bd_addr)1184 void btsnd_hcic_user_passkey_neg_reply(const RawAddress& bd_addr) {
1185   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1186   uint8_t* pp = (uint8_t*)(p + 1);
1187 
1188   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_U_PKEY_NEG_REPLY;
1189   p->offset = 0;
1190 
1191   UINT16_TO_STREAM(pp, HCI_USER_PASSKEY_REQ_NEG_REPLY);
1192   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_U_PKEY_NEG_REPLY);
1193 
1194   BDADDR_TO_STREAM(pp, bd_addr);
1195 
1196   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1197 }
1198 
btsnd_hcic_rem_oob_reply(const RawAddress & bd_addr,uint8_t * p_c,uint8_t * p_r)1199 void btsnd_hcic_rem_oob_reply(const RawAddress& bd_addr, uint8_t* p_c,
1200                               uint8_t* p_r) {
1201   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1202   uint8_t* pp = (uint8_t*)(p + 1);
1203 
1204   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REM_OOB_REPLY;
1205   p->offset = 0;
1206 
1207   UINT16_TO_STREAM(pp, HCI_REM_OOB_DATA_REQ_REPLY);
1208   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_REM_OOB_REPLY);
1209 
1210   BDADDR_TO_STREAM(pp, bd_addr);
1211   ARRAY16_TO_STREAM(pp, p_c);
1212   ARRAY16_TO_STREAM(pp, p_r);
1213 
1214   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1215 }
1216 
btsnd_hcic_rem_oob_neg_reply(const RawAddress & bd_addr)1217 void btsnd_hcic_rem_oob_neg_reply(const RawAddress& bd_addr) {
1218   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1219   uint8_t* pp = (uint8_t*)(p + 1);
1220 
1221   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REM_OOB_NEG_REPLY;
1222   p->offset = 0;
1223 
1224   UINT16_TO_STREAM(pp, HCI_REM_OOB_DATA_REQ_NEG_REPLY);
1225   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_REM_OOB_NEG_REPLY);
1226 
1227   BDADDR_TO_STREAM(pp, bd_addr);
1228 
1229   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1230 }
1231 
btsnd_hcic_read_inq_tx_power(void)1232 void btsnd_hcic_read_inq_tx_power(void) {
1233   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1234   uint8_t* pp = (uint8_t*)(p + 1);
1235 
1236   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_R_TX_POWER;
1237   p->offset = 0;
1238 
1239   UINT16_TO_STREAM(pp, HCI_READ_INQ_TX_POWER_LEVEL);
1240   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_R_TX_POWER);
1241 
1242   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1243 }
1244 
btsnd_hcic_send_keypress_notif(const RawAddress & bd_addr,uint8_t notif)1245 void btsnd_hcic_send_keypress_notif(const RawAddress& bd_addr, uint8_t notif) {
1246   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1247   uint8_t* pp = (uint8_t*)(p + 1);
1248 
1249   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SEND_KEYPRESS_NOTIF;
1250   p->offset = 0;
1251 
1252   UINT16_TO_STREAM(pp, HCI_SEND_KEYPRESS_NOTIF);
1253   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SEND_KEYPRESS_NOTIF);
1254 
1255   BDADDR_TO_STREAM(pp, bd_addr);
1256   UINT8_TO_STREAM(pp, notif);
1257 
1258   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1259 }
1260 
1261 /**** end of Simple Pairing Commands ****/
1262 
1263 #if (L2CAP_NON_FLUSHABLE_PB_INCLUDED == TRUE)
btsnd_hcic_enhanced_flush(uint16_t handle,uint8_t packet_type)1264 void btsnd_hcic_enhanced_flush(uint16_t handle, uint8_t packet_type) {
1265   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1266   uint8_t* pp = (uint8_t*)(p + 1);
1267 
1268   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ENHANCED_FLUSH;
1269   p->offset = 0;
1270   UINT16_TO_STREAM(pp, HCI_ENHANCED_FLUSH);
1271   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ENHANCED_FLUSH);
1272 
1273   UINT16_TO_STREAM(pp, handle);
1274   UINT8_TO_STREAM(pp, packet_type);
1275 
1276   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1277 }
1278 #endif
1279 
1280 /*************************
1281  * End of Lisbon Commands
1282  *************************/
1283 
btsnd_hcic_get_link_quality(uint16_t handle)1284 void btsnd_hcic_get_link_quality(uint16_t handle) {
1285   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1286   uint8_t* pp = (uint8_t*)(p + 1);
1287 
1288   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
1289   p->offset = 0;
1290 
1291   UINT16_TO_STREAM(pp, HCI_GET_LINK_QUALITY);
1292   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
1293 
1294   UINT16_TO_STREAM(pp, handle);
1295 
1296   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1297 }
1298 
btsnd_hcic_read_rssi(uint16_t handle)1299 void btsnd_hcic_read_rssi(uint16_t handle) {
1300   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1301   uint8_t* pp = (uint8_t*)(p + 1);
1302 
1303   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
1304   p->offset = 0;
1305 
1306   UINT16_TO_STREAM(pp, HCI_READ_RSSI);
1307   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
1308 
1309   UINT16_TO_STREAM(pp, handle);
1310 
1311   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1312 }
1313 
btsnd_hcic_read_failed_contact_counter(uint16_t handle)1314 void btsnd_hcic_read_failed_contact_counter(uint16_t handle) {
1315   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1316   uint8_t* pp = (uint8_t*)(p + 1);
1317 
1318   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
1319   p->offset = 0;
1320 
1321   UINT16_TO_STREAM(pp, HCI_READ_FAILED_CONTACT_COUNTER);
1322   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
1323 
1324   UINT16_TO_STREAM(pp, handle);
1325 
1326   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1327 }
1328 
btsnd_hcic_read_automatic_flush_timeout(uint16_t handle)1329 void btsnd_hcic_read_automatic_flush_timeout(uint16_t handle) {
1330   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1331   uint8_t* pp = (uint8_t*)(p + 1);
1332 
1333   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
1334   p->offset = 0;
1335 
1336   UINT16_TO_STREAM(pp, HCI_READ_AUTOMATIC_FLUSH_TIMEOUT);
1337   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
1338 
1339   UINT16_TO_STREAM(pp, handle);
1340 
1341   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1342 }
1343 
btsnd_hcic_enable_test_mode(void)1344 void btsnd_hcic_enable_test_mode(void) {
1345   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1346   uint8_t* pp = (uint8_t*)(p + 1);
1347 
1348   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD;
1349   p->offset = 0;
1350 
1351   UINT16_TO_STREAM(pp, HCI_ENABLE_DEV_UNDER_TEST_MODE);
1352   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_CMD);
1353 
1354   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1355 }
1356 
btsnd_hcic_write_inqscan_type(uint8_t type)1357 void btsnd_hcic_write_inqscan_type(uint8_t type) {
1358   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1359   uint8_t* pp = (uint8_t*)(p + 1);
1360 
1361   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
1362   p->offset = 0;
1363 
1364   UINT16_TO_STREAM(pp, HCI_WRITE_INQSCAN_TYPE);
1365   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
1366 
1367   UINT8_TO_STREAM(pp, type);
1368 
1369   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1370 }
1371 
btsnd_hcic_write_inquiry_mode(uint8_t mode)1372 void btsnd_hcic_write_inquiry_mode(uint8_t mode) {
1373   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1374   uint8_t* pp = (uint8_t*)(p + 1);
1375 
1376   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
1377   p->offset = 0;
1378 
1379   UINT16_TO_STREAM(pp, HCI_WRITE_INQUIRY_MODE);
1380   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
1381 
1382   UINT8_TO_STREAM(pp, mode);
1383 
1384   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1385 }
1386 
btsnd_hcic_write_pagescan_type(uint8_t type)1387 void btsnd_hcic_write_pagescan_type(uint8_t type) {
1388   BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1389   uint8_t* pp = (uint8_t*)(p + 1);
1390 
1391   p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
1392   p->offset = 0;
1393 
1394   UINT16_TO_STREAM(pp, HCI_WRITE_PAGESCAN_TYPE);
1395   UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
1396 
1397   UINT8_TO_STREAM(pp, type);
1398 
1399   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1400 }
1401 
1402 /* Must have room to store BT_HDR + max VSC length + callback pointer */
1403 #if (HCI_CMD_BUF_SIZE < 268)
1404 #error "HCI_CMD_BUF_SIZE must be larger than 268"
1405 #endif
1406 
btsnd_hcic_vendor_spec_cmd(void * buffer,uint16_t opcode,uint8_t len,uint8_t * p_data,void * p_cmd_cplt_cback)1407 void btsnd_hcic_vendor_spec_cmd(void* buffer, uint16_t opcode, uint8_t len,
1408                                 uint8_t* p_data, void* p_cmd_cplt_cback) {
1409   BT_HDR* p = (BT_HDR*)buffer;
1410   uint8_t* pp = (uint8_t*)(p + 1);
1411 
1412   p->len = HCIC_PREAMBLE_SIZE + len;
1413   p->offset = sizeof(void*);
1414 
1415   *((void**)pp) =
1416       p_cmd_cplt_cback; /* Store command complete callback in buffer */
1417   pp += sizeof(void*);  /* Skip over callback pointer */
1418 
1419   UINT16_TO_STREAM(pp, HCI_GRP_VENDOR_SPECIFIC | opcode);
1420   UINT8_TO_STREAM(pp, len);
1421   ARRAY_TO_STREAM(pp, p_data, len);
1422 
1423   btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1424 }
1425