1 /* 2 * Copyright (C) 2017 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 /** 18 * @addtogroup NeuralNetworks 19 * @{ 20 */ 21 22 /** 23 * @file NeuralNetworks.h 24 */ 25 26 #ifndef ANDROID_ML_NN_RUNTIME_NEURAL_NETWORKS_H 27 #define ANDROID_ML_NN_RUNTIME_NEURAL_NETWORKS_H 28 29 /****************************************************************** 30 * 31 * IMPORTANT NOTICE: 32 * 33 * This file is part of Android's set of stable system headers 34 * exposed by the Android NDK (Native Development Kit). 35 * 36 * Third-party source AND binary code relies on the definitions 37 * here to be FROZEN ON ALL UPCOMING PLATFORM RELEASES. 38 * 39 * - DO NOT MODIFY ENUMS (EXCEPT IF YOU ADD NEW 32-BIT VALUES) 40 * - DO NOT MODIFY CONSTANTS OR FUNCTIONAL MACROS 41 * - DO NOT CHANGE THE SIGNATURE OF FUNCTIONS IN ANY WAY 42 * - DO NOT CHANGE THE LAYOUT OR SIZE OF STRUCTURES 43 */ 44 45 #if __ANDROID_API__ >= __ANDROID_API_O_MR1__ 46 47 #include <stddef.h> 48 #include <stdint.h> 49 #include <sys/cdefs.h> 50 51 __BEGIN_DECLS 52 53 /** 54 * Operand types. 55 * 56 * The type of operands that can be added to a model. 57 * 58 * Although we define many types, most operators accept just a few 59 * types. Most used are {@link ANEURALNETWORKS_TENSOR_FLOAT32}, 60 * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, 61 * and {@link ANEURALNETWORKS_INT32}. 62 */ 63 typedef enum { 64 /** A 32 bit floating point scalar value. */ 65 ANEURALNETWORKS_FLOAT32 = 0, 66 /** A signed 32 bit integer scalar value. */ 67 ANEURALNETWORKS_INT32 = 1, 68 /** An unsigned 32 bit integer scalar value. */ 69 ANEURALNETWORKS_UINT32 = 2, 70 71 /** A tensor of 32 bit floating point values. */ 72 ANEURALNETWORKS_TENSOR_FLOAT32 = 3, 73 /** A tensor of 32 bit integer values. */ 74 ANEURALNETWORKS_TENSOR_INT32 = 4, 75 /** 76 * A tensor of 8 bit integers that represent real numbers. 77 * 78 * Attached to this tensor are two numbers that can be used to convert the 79 * 8 bit integer to the real value and vice versa. These two numbers are: 80 * - scale: a 32 bit floating point value greater than zero. 81 * - zeroPoint: a 32 bit integer, in range [0, 255]. 82 * 83 * The formula is: 84 * real_value = (integer_value - zeroPoint) * scale. 85 */ 86 ANEURALNETWORKS_TENSOR_QUANT8_ASYMM = 5, 87 } OperandCode; 88 89 /** 90 * Operation types. 91 * 92 * The type of operations that can be added to a model. 93 */ 94 typedef enum { 95 /** 96 * Adds two tensors, element-wise. 97 * 98 * Takes two input tensors of identical {@link OperandCode} and compatible 99 * dimensions. The output is the sum of both input tensors, optionally 100 * modified by an activation function. 101 * 102 * Two dimensions are compatible when: 103 * 1. they are equal, or 104 * 2. one of them is 1 105 * 106 * The size of the output is the maximum size along each dimension of the 107 * input operands. It starts with the trailing dimensions, and works its 108 * way forward. 109 * 110 * Example: 111 * 112 * input1.dimension = {4, 1, 2} 113 * input2.dimension = {5, 4, 3, 1} 114 * output.dimension = {5, 4, 3, 2} 115 * 116 * Supported tensor {@link OperandCode}: 117 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 118 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 119 * 120 * Supported tensor rank: up to 4 121 * 122 * Inputs: 123 * * 0: A tensor. 124 * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions 125 * as input0. 126 * * 2: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 127 * {@link FuseCode} values. Specifies the activation to 128 * invoke on the result. 129 * 130 * Outputs: 131 * * 0: The sum, a tensor of the same {@link OperandCode} as input0. 132 */ 133 ANEURALNETWORKS_ADD = 0, 134 135 /** 136 * Performs a 2-D average pooling operation. 137 * 138 * The output dimensions are functions of the filter dimensions, stride, and 139 * padding. 140 * 141 * The values in the output tensor are computed as: 142 * 143 * output[batch, row, col, channel] = 144 * sum_{i, j}(input[batch, row + i, col + j, channel]) / sum(1) 145 * 146 * Supported tensor {@link OperandCode}: 147 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 148 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 149 * 150 * Supported tensor rank: 4, with "NHWC" (i.e., Num_samples, Height, Width, 151 * and Channels) data layout. 152 * 153 * Both explicit padding and implicit padding are supported. 154 * 155 * Inputs (explicit padding): 156 * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying 157 * the input. 158 * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 159 * the left, in the ‘width’ dimension. 160 * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 161 * the right, in the ‘width’ dimension. 162 * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 163 * the top, in the ‘height’ dimension. 164 * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 165 * the bottom, in the ‘height’ dimension. 166 * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 167 * walking through input in the ‘width’ dimension. 168 * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 169 * walking through input in the ‘height’ dimension. 170 * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter 171 * width. 172 * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter 173 * height. 174 * * 9: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 175 * {@link FuseCode} values. Specifies the activation to 176 * invoke on the result. 177 * 178 * Inputs (implicit padding): 179 * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying 180 * the input. 181 * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit 182 * padding scheme, has to be one of the 183 * {@link PaddingCode} values. 184 * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 185 * walking through input in the ‘width’ dimension. 186 * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 187 * walking through input in the ‘height’ dimension. 188 * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter 189 * width. 190 * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter 191 * height. 192 * * 6: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 193 * {@link FuseCode} values. Specifies the activation to 194 * invoke on the result. 195 * 196 * Outputs: 197 * * 0: The output 4-D tensor, of shape 198 [batches, out_height, out_width, depth]. 199 */ 200 ANEURALNETWORKS_AVERAGE_POOL_2D = 1, 201 202 /** 203 * Concatenates the input tensors along the given dimension. 204 * 205 * The input tensors must have identical {@link OperandCode} and the same 206 * dimensions except the dimension along the concatenation axis. 207 * 208 * Supported tensor {@link OperandCode}: 209 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 210 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 211 * 212 * Supported tensor rank: up to 4 213 * 214 * Inputs: 215 * * 0 ~ n-1: The list of n input tensors, of shape 216 * [D0, D1, ..., Daxis(i), ..., Dm]. For inputs of 217 * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, all input tensors 218 * must have the same scale and zeroPoint. 219 * * n: An {@link ANEURALNETWORKS_INT32} scalar, specifying the 220 * concatenation axis. 221 * 222 * Outputs: 223 * * 0: The output, a tensor of the same {@link OperandCode} as the input 224 * tensors. The output shape is [D0, D1, ..., sum(Daxis(i)), ..., Dm]. 225 */ 226 ANEURALNETWORKS_CONCATENATION = 2, 227 228 /** 229 * Performs an 2-D convolution operation. 230 * 231 * The CONV_2D op sweeps a 2-D filter that can mix channels together over a 232 * batch of images, applying the filter to each window of each image of the 233 * appropriate size. 234 * 235 * The output dimensions are functions of the filter dimensions, stride, and 236 * padding. 237 * 238 * The values in the output tensor are computed as: 239 * 240 * output[batch, row, col, channel] = 241 * sum_{i, j} ( 242 * input[batch, row + i, col + j, k] * 243 * filter[channel, row + i, col + j, k] + 244 * bias[channel] 245 * ) 246 * 247 * Supported tensor {@link OperandCode}: 248 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 249 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 250 * 251 * Supported tensor rank: 4, with "NHWC" data layout. 252 * 253 * Both explicit padding and implicit padding are supported. 254 * 255 * Inputs (explicit padding): 256 * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], 257 * specifying the input. 258 * * 1: A 4-D tensor, of shape 259 * [depth_out, filter_height, filter_width, depth_in], specifying the 260 * filter. 261 * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. 262 * For input tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the bias 263 * should also be of {@link ANEURALNETWORKS_TENSOR_FLOAT32}. For input 264 * tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the bias 265 * should be of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of 266 * 0 and bias_scale == input_scale * filter_scale. 267 * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 268 * the left, in the ‘width’ dimension. 269 * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 270 * the right, in the ‘width’ dimension. 271 * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 272 * the top, in the ‘height’ dimension. 273 * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 274 * the bottom, in the ‘height’ dimension. 275 * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 276 * walking through input in the ‘width’ dimension. 277 * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 278 * walking through input in the ‘height’ dimension. 279 * * 9: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 280 * {@link FuseCode} values. Specifies the activation to 281 * invoke on the result. 282 * 283 * Inputs (implicit padding): 284 * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], 285 * specifying the input. 286 * * 1: A 4-D tensor, of shape 287 * [depth_out, filter_height, filter_width, depth_in], specifying the 288 * filter. 289 * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input 290 * tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the bias should 291 * also be of {@link ANEURALNETWORKS_TENSOR_FLOAT32}. For input tensor 292 * of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the bias should be 293 * of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of 0 and 294 * bias_scale == input_scale * filter_scale. 295 * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit 296 * padding scheme, has to be one of the 297 * {@link PaddingCode} values. 298 * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 299 * walking through input in the ‘width’ dimension. 300 * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 301 * walking through input in the ‘height’ dimension. 302 * * 6: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 303 * {@link FuseCode} values. Specifies the activation to 304 * invoke on the result. 305 * 306 * Outputs: 307 * * 0: The output 4-D tensor, of shape 308 * [batches, out_height, out_width, depth_out]. For output tensor of 309 * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the following condition 310 * must be satisfied: output_scale > input_scale * filter_scale. 311 */ 312 ANEURALNETWORKS_CONV_2D = 3, 313 314 /** 315 * Performs a depthwise 2-D convolution operation. 316 * 317 * Given an input tensor of shape [batches, height, width, depth_in] and a 318 * filter tensor of shape [1, filter_height, filter_width, depth_out] 319 * containing depth_out convolutional filters of depth 1, DEPTHWISE_CONV 320 * applies a different filter to each input channel (expanding from 1 321 * channel to channel_multiplier channels for each), then concatenates the 322 * results together. 323 * 324 * The output has depth_out = depth_in * depth_multiplier channels. 325 * The output dimensions are functions of the filter dimensions, stride, and 326 * padding. 327 * 328 * The values in the output tensor are computed as: 329 * 330 * output[b, i, j, k * channel_multiplier + q] = 331 * sum_{di, dj} ( 332 * input[b, strides[1] * i + di, strides[2] * j + dj, k] * 333 * filter[1, di, dj, k * channel_multiplier + q] 334 * ) 335 * 336 * Supported tensor {@link OperandCode}: 337 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 338 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 339 * 340 * Supported tensor rank: 4, with "NHWC" data layout. 341 * 342 * Both explicit padding and implicit padding are supported. 343 * 344 * Inputs (explicit padding): 345 * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], 346 * specifying the input. 347 * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out], 348 * specifying the filter. 349 * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input 350 * tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the bias should 351 * also be of {@link ANEURALNETWORKS_TENSOR_FLOAT32}. For input tensor 352 * of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the bias should be 353 * of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of 0 and 354 * bias_scale == input_scale * filter_scale. 355 * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 356 * the left, in the ‘width’ dimension. 357 * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 358 * the right, in the ‘width’ dimension. 359 * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 360 * the top, in the ‘height’ dimension. 361 * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 362 * the bottom, in the ‘height’ dimension. 363 * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 364 * walking through input in the ‘width’ dimension. 365 * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 366 * walking through input in the ‘height’ dimension. 367 * * 9: An {@link ANEURALNETWORKS_INT32} scalar, specifying the depthwise 368 * multiplier. 369 * * 10: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 370 * {@link FuseCode} values. Specifies the activation to 371 * invoke on the result. 372 * 373 * Inputs (implicit padding): 374 * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], 375 * specifying the input. 376 * * 1: A 4-D tensor, of shape [1, filter_height, filter_width, depth_out], 377 * specifying the filter. 378 * * 2: A 1-D tensor, of shape [depth_out], specifying the bias. For input 379 * tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the bias should 380 * also be of {@link ANEURALNETWORKS_TENSOR_FLOAT32}. For input tensor 381 * of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the bias should be 382 * of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of 0 and 383 * bias_scale == input_scale * filter_scale. 384 * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit 385 * padding scheme, has to be one of the 386 * {@link PaddingCode} values. 387 * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 388 * walking through input in the ‘width’ dimension. 389 * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 390 * walking through input in the ‘height’ dimension. 391 * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the depthwise 392 * multiplier. 393 * * 7: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 394 * {@link FuseCode} values. Specifies the activation to 395 * invoke on the result. 396 * 397 * Outputs: 398 * * 0: The output 4-D tensor, of shape 399 * [batches, out_height, out_width, depth_out]. For output tensor of 400 * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the following condition 401 * must be satisfied: output_scale > input_scale * filter_scale. 402 */ 403 ANEURALNETWORKS_DEPTHWISE_CONV_2D = 4, 404 405 /** 406 * Rearranges data from depth into blocks of spatial data. 407 * 408 * More specifically, this op outputs a copy of the input tensor where 409 * values from the depth dimension are moved in spatial blocks to the height 410 * and width dimensions. The value block_size indicates the input block size 411 * and how the data is moved. 412 * 413 * Chunks of data of size block_size * block_size from depth are rearranged 414 * into non-overlapping blocks of size block_size x block_size. 415 * 416 * The width of the output tensor is input_depth * block_size, whereas the 417 * height is input_height * block_size. The depth of the input tensor must 418 * be divisible by block_size * block_size 419 * 420 * Supported tensor {@link OperandCode}: 421 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 422 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 423 * 424 * Supported tensor rank: 4, with "NHWC" data layout. 425 * 426 * Inputs: 427 * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], 428 * specifying the input. 429 * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the block_size. 430 * block_size must be >=1 and block_size * block_size must be a divisor 431 * of the input depth. 432 * 433 * Outputs: 434 * * 0: The output 4-D tensor, of shape [batch, height*block_size, 435 * width*block_size, depth/(block_size*block_size)]. 436 */ 437 ANEURALNETWORKS_DEPTH_TO_SPACE = 5, 438 439 /** 440 * Dequantizes the input tensor. 441 * 442 * The formula is: 443 * 444 * output = (input - zeroPoint) * scale. 445 * 446 * Supported tensor {@link OperandCode}: 447 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 448 * 449 * Supported tensor rank: up to 4 450 * 451 * Inputs: 452 * * 0: A tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}. 453 * 454 * Outputs: 455 * * 0: The output tensor of same shape as input0, but with 456 * {@link ANEURALNETWORKS_TENSOR_FLOAT32}. 457 */ 458 ANEURALNETWORKS_DEQUANTIZE = 6, 459 460 /** 461 * Looks up sub-tensors in the input tensor. 462 * 463 * This operator takes for input a tensor of values (Values) and 464 * a one-dimensional tensor of selection indices (Lookups). 465 * The output tensor is the concatenation of sub-tensors of Values as 466 * selected by Lookups. 467 * 468 * Think of Values as being sliced along its first dimension: 469 * The entries in Lookups select which slices are concatenated together 470 * to create the output tensor. 471 * 472 * For example, if Values has shape of [40, 200, 300] and 473 * Lookups has shape of [3], all three values found in Lookups are 474 * expected to be between 0 and 39. The resulting tensor must 475 * have shape of [3, 200, 300]. 476 * 477 * If a value in Lookups is out of bounds, the operation must fail 478 * and an error must be reported. 479 * 480 * Inputs: 481 * * 0: Lookups. A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. 482 * The values are indices into the first dimension of Values. 483 * * 1: Values. An n-D tensor, where n >= 2, from which sub-tensors are 484 * extracted. 485 * 486 * Output: 487 * * 0: A n-D tensor with the same rank and shape as the Values 488 * tensor, except for the first dimension which has the same size 489 * as Lookups' only dimension. 490 */ 491 ANEURALNETWORKS_EMBEDDING_LOOKUP = 7, 492 493 /** 494 * Computes element-wise floor() on the input tensor. 495 * 496 * Supported tensor {@link OperandCode}: 497 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 498 * 499 * Supported tensor rank: up to 4 500 * 501 * Inputs: 502 * * 0: A tensor. 503 * 504 * Outputs: 505 * * 0: The output tensor, of the same {@link OperandCode} and dimensions as 506 * the input tensor. 507 */ 508 ANEURALNETWORKS_FLOOR = 8, 509 510 /** 511 * Denotes a fully (densely) connected layer, which connects all elements 512 * in the input tensor with each element in the output tensor. 513 * 514 * This layer implements the operation: 515 * 516 * outputs = activation(inputs * weights’ + bias) 517 * 518 * Supported tensor {@link OperandCode}: 519 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 520 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 521 * 522 * Supported tensor rank: up to 4. 523 * 524 * Inputs: 525 * * 0: A tensor of at least rank 2, specifying the input. If rank is 526 * greater than 2, then it gets flattened to a 2-D Tensor. The 527 * (flattened) 2-D Tensor is reshaped (if necessary) to 528 * [batch_size, input_size], where "input_size" corresponds to the 529 * number of inputs to the layer, matching the second dimension of 530 * weights, and "batch_size" is calculated by dividing the number of 531 * elements by "input_size". 532 * * 1: A 2-D tensor, specifying the weights, of shape 533 * [num_units, input_size], where "num_units" corresponds to the number 534 * of output nodes. 535 * * 2: A 1-D tensor, of shape [num_units], specifying the bias. For input 536 * tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, the bias should 537 * also be of {@link ANEURALNETWORKS_TENSOR_FLOAT32}. For input tensor 538 * of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the bias should be 539 * of {@link ANEURALNETWORKS_TENSOR_INT32}, with zeroPoint of 0 and 540 * bias_scale == input_scale * filter_scale. 541 * * 3: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 542 * {@link FuseCode} values. Specifies the activation to 543 * invoke on the result. 544 * 545 * Outputs: 546 * * 0: The output tensor, of shape [batch_size, num_units]. For output 547 * tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, the following 548 * condition must be satisfied: 549 * output_scale > input_scale * filter_scale. 550 */ 551 ANEURALNETWORKS_FULLY_CONNECTED = 9, 552 553 /** 554 * Looks up sub-tensors in the input tensor using a key-value map. 555 * 556 * This operator takes for input a tensor of values (Values), 557 * a one-dimensional tensor of selection values (Lookups) and 558 * a one-dimensional tensor that maps these values to Values 559 * indexes. The output tensor is the concatenation of sub-tensors of 560 * Values as selected by Lookups via Keys. 561 * 562 * Think of Values as being sliced along its outer-most dimension. 563 * The output is a concatenation of selected slices, with one slice 564 * for each entry of Lookups. The slice selected is the one at the 565 * same index as the Maps entry that matches the value in Lookups. 566 * 567 * For a hit, the corresponding sub-tensor of Values is included 568 * in the Output tensor. For a miss, the corresponding sub-tensor in 569 * Output must have zero values. 570 * 571 * For example, if Values has shape of [40, 200, 300], 572 * Keys should have a shape of [40]. If Lookups tensor has shape 573 * of [3], three slices are being concatenated, so the resulting tensor 574 * must have the shape of [3, 200, 300]. If the first entry in Lookups 575 * has the value 123456, that value must be located in Keys tensor. 576 * If the sixth entry of Keys contains 123456, the sixth slice of Values 577 * must be selected. If no entry in Keys has 123456, a slice of zeroes 578 * must be concatenated. 579 * 580 * Inputs: 581 * * 0: Lookups. A 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor with 582 * shape [ k ]. 583 * * 1: Keys. A 1-D {@link ANEURALNETWORKS_TENSOR_INT32} tensor with shape 584 * [ n ]; Keys and Values pair represent a map, i.e., the ith element 585 * in Keys (Keys[i]) is the key to select the ith sub-tensor in Values 586 * (Values[i]), where 0 <= i <= n-1. Keys tensor *MUST* be sorted in 587 * ascending order. 588 * * 2: Values. A tensor with shape of [ n, … ]; i.e., the first dimension 589 * must be n. 590 * 591 * Outputs: 592 * * 0: Output. A tensor with shape [ k …]. 593 * * 1: Hits. A boolean tensor with shape [ k ] indicates whether the lookup 594 * hits (True) or not (False). 595 * Stored as {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} with offset 0 596 * and scale 1.0f. 597 * A non-zero byte represents True, a hit. A zero indicates otherwise. 598 */ 599 ANEURALNETWORKS_HASHTABLE_LOOKUP = 10, 600 601 /** 602 * Applies L2 normalization along the depth dimension. 603 * 604 * The values in the output tensor are computed as: 605 * 606 * output[batch, row, col, channel] = 607 * input[batch, row, col, channel] / 608 * sqrt(sum_{c} pow(input[batch, row, col, c], 2)) 609 * 610 * For input tensor with more dimensions, independently normalizes each 1-D 611 * slice along dimension dim. 612 * 613 * Supported tensor {@link OperandCode}: 614 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 615 * 616 * Supported tensor rank: 4, with "NHWC" data layout (i.e., Num_samples, 617 * Height, Width, and Channels). 618 * 619 * Inputs: 620 * * 0: A 4-D tensor, of shape [batches, height, width, depth]. 621 * 622 * Outputs: 623 * * 0: The output 4-D tensor, of shape 624 * [batches, out_height, out_width, depth]. 625 */ 626 ANEURALNETWORKS_L2_NORMALIZATION = 11, 627 628 /** 629 * Performs an 2-D L2 pooling operation. 630 * 631 * The output dimensions are functions of the filter dimensions, stride, and 632 * padding. 633 * 634 * The values in the output tensor are computed as: 635 * 636 * output[batch, row, col, channel] = 637 * sqrt(sum_{i, j} pow(input[batch, row + i, col + j, channel], 2) / 638 * sum(1)) 639 * 640 * Supported tensor {@link OperandCode}: 641 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 642 * 643 * Supported tensor rank: 4, with "NHWC" data layout. 644 * 645 * Both explicit padding and implicit padding are supported. 646 * 647 * Inputs (explicit padding): 648 * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying 649 * the input. 650 * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 651 * the left, in the ‘width’ dimension. 652 * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 653 * the right, in the ‘width’ dimension. 654 * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 655 * the top, in the ‘height’ dimension. 656 * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 657 * the bottom, in the ‘height’ dimension. 658 * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 659 * walking through input in the ‘width’ dimension. 660 * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 661 * walking through input in the ‘height’ dimension. 662 * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter 663 * width. 664 * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter 665 * height. 666 * * 9: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 667 * {@link FuseCode} values. Specifies the activation to 668 * invoke on the result. 669 * 670 * Inputs (implicit padding): 671 * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying 672 * the input. 673 * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit 674 * padding scheme, has to be one of the 675 * {@link PaddingCode} values. 676 * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 677 * walking through input in the ‘width’ dimension. 678 * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 679 * walking through input in the ‘height’ dimension. 680 * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter 681 * width. 682 * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter 683 * height. 684 * * 6: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 685 * {@link FuseCode} values. Specifies the activation to 686 * invoke on the result. 687 * 688 * Outputs: 689 * * 0: The output 4-D tensor, of shape 690 * [batches, out_height, out_width, depth]. 691 */ 692 ANEURALNETWORKS_L2_POOL_2D = 12, 693 694 /** 695 * Applies Local Response Normalization along the depth dimension. 696 * 697 * The 4-D input tensor is treated as a 3-D array of 1-D vectors (along the 698 * last dimension), and each vector is normalized independently. Within a 699 * given vector, each component is divided by the weighted, squared sum of 700 * inputs within depth_radius. 701 * 702 * The output is calculated using this formula: 703 * 704 * sqr_sum[a, b, c, d] = sum( 705 * pow(input[a, b, c, d - depth_radius : d + depth_radius + 1], 2)) 706 * output = input / pow((bias + alpha * sqr_sum), beta) 707 * 708 * Supported tensor {@link OperandCode}: 709 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 710 * 711 * Supported tensor rank: 4, with "NHWC" data layout. 712 * 713 * Inputs: 714 * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying 715 * the input. 716 * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the radius of 717 * the normalization window. 718 * * 2: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the bias, must 719 * not be zero. 720 * * 3: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the scale 721 * factor, alpha. 722 * * 4: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the exponent, 723 * beta. 724 * 725 * Outputs: 726 * * 0: The output tensor of same shape as input0. 727 */ 728 ANEURALNETWORKS_LOCAL_RESPONSE_NORMALIZATION = 13, 729 730 /** 731 * Computes sigmoid activation on the input tensor element-wise. 732 * 733 * The output is calculated using this formula: 734 * 735 * output = 1 / (1 + exp(-input)) 736 * 737 * Supported tensor {@link OperandCode}: 738 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 739 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 740 * 741 * Supported tensor rank: up to 4. 742 * 743 * Inputs: 744 * * 0: A tensor, specifying the input. 745 * 746 * Outputs: 747 * * 0: The output tensor of same shape as input0. 748 * For {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, 749 * the scale must be 1.f / 256 and the zeroPoint must be 0. 750 */ 751 ANEURALNETWORKS_LOGISTIC = 14, 752 753 /** 754 * Projects an input to a bit vector via locality senstive hashing. 755 * 756 * Inputs: 757 * * 0: Hash functions. Dim.size == 2, DataType: Float. 758 * Tensor[0].Dim[0]: Number of hash functions. 759 * Tensor[0].Dim[1]: Number of seeds per hash functions. 760 * Tensor[0].Dim[1] <= 32 in sparse case. 761 * 762 * * 1: Input. Dim.size >= 1, no restriction on DataType. 763 * * 2: Weight. Optional. Dim.size == 1, DataType: Float. 764 * If not set, each input element is considered to have the same weight 765 * of 1.0. 766 * Tensor[1].Dim[0] == Tensor[2].Dim[0] 767 * * 3: Type: 768 * Sparse: Value LSHProjectionType_SPARSE(=1). 769 * Computed bit vector is considered to be sparse. 770 * Each output element is an int32 made up of multiple bits 771 * computed from hash functions. 772 * 773 * Dense: Value LSHProjectionType_DENSE(=2). 774 * Computed bit vector is considered to be dense. Each output 775 * element represents a bit and can take the value of either 776 * 0 or 1. 777 * 778 * Outputs: 779 * * 0: If the projection type is sparse: 780 * Output.Dim == { Tensor[0].Dim[0] } 781 * A tensor of int32 that represents hash signatures. 782 * If the projection type is Dense: 783 * Output.Dim == { Tensor[0].Dim[0] * Tensor[0].Dim[1] } 784 * A flattened tensor that represents projected bit vectors. 785 */ 786 ANEURALNETWORKS_LSH_PROJECTION = 15, 787 788 /** 789 * Performs a single time step in a Long Short-Term Memory (LSTM) layer 790 * 791 * The LSTM operation is described by the following equations. 792 * 793 * \f{eqnarray*}{ 794 * i_t =& \sigma(W_{xi}x_t+W_{hi}h_{t-1}+W_{ci}C_{t-1}+b_i) & \\ 795 * f_t =& \sigma(W_{xf}x_t+W_{hf}h_{t-1}+W_{cf}C_{t-1}+b_f) & \\ 796 * C_t =& clip(f_t \odot C_{t-1} + i_t \odot 797 * g(W_{xc}x_t+W_{hc}h_{t-1}+b_c),\ t_{cell}) & \\ 798 * o_t =& \sigma(W_{xo}x_t+W_{ho}h_{t-1}+W_{co}C_t+b_o) & \\ 799 * & & \\ 800 * & clip(W_{proj}(o_t \odot g(C_t))+b_{proj},\ t_{proj}) 801 * & if\ there\ is\ a\ projection; \\ 802 * h_t =& & \\ 803 * & o_t \odot g(C_t) & otherwise. \\ 804 * \f} 805 * Where: 806 * * \f$x_t\f$ is the input, 807 * * \f$i_t\f$ is the input gate, 808 * * \f$f_t\f$ is the forget gate, 809 * * \f$C_t\f$ is the cell state, 810 * * \f$o_t\f$ is the output, 811 * * \f$h_t\f$ is the output state, 812 * * \f$\sigma\f$ is the logistic sigmoid function, 813 * * \f$g\f$ is the cell input and cell output activation function, usually 814 * \f$tahn\f$, 815 * * \f$W_{xi}\f$ is the input-to-input weight matrix, 816 * * \f$W_{hi}\f$ is the recurrent to input weight matrix, 817 * * \f$W_{ci}\f$ is the cell-to-input weight matrix, 818 * * \f$b_i\f$ is the input gate bias, 819 * * \f$W_{xf}\f$ is the input-to-forget weight matrix, 820 * * \f$W_{hf}\f$ is the recurrent-to-forget weight matrix, 821 * * \f$W_{cf}\f$ is the cell-to-forget weight matrix, 822 * * \f$b_f\f$ is the forget gate bias, 823 * * \f$W_{xc}\f$ is the input-to-cell weight matrix, 824 * * \f$W_{hc}\f$ is the recurrent-to-cell weight matrix, 825 * * \f$b_c\f$ is the cell bias, 826 * * \f$W_{xo}\f$ is the input-to-output weight matrix, 827 * * \f$W_{ho}\f$ is the recurrent-to-output weight matrix, 828 * * \f$W_{co}\f$ is the cell-to-output weight matrix, 829 * * \f$b_o\f$ is the output gate bias, 830 * * \f$W_{proj}\f$ is the projection weight matrix, 831 * * \f$b_{proj}\f$ is the projection bias, 832 * * \f$t_{cell}\f$ is the threshold for clipping the cell state, and 833 * * \f$t_{proj}\f$ is the threshold for clipping the projected output. 834 * * \f$\odot\f$ is the 835 * <a href="https://en.wikipedia.org/wiki/Hadamard_product_(matrices)"> 836 * Hadamard product</a> that takes two matrices and produces another 837 * matrix, each element of which is the product of the corresponding 838 * elements of the input matrices. 839 * 840 * The operation has the following independently optional inputs: 841 * * The input-to-input weights (\f$W_{xi}\f$), recurrent-to-input weights 842 * (\f$W_{hi}\f$), cell-to-input (\f$W_{ci}\f$) weights, and input gate 843 * bias (\f$b_i\f$) either all have values, or none of them have values 844 * (i.e., all set to null). If they have no values, coupling of input and 845 * forget gates (CIFG) is used, in which case the input gate (\f$i_t\f$) 846 * is calculated using the following equation instead. 847 * \f{eqnarray*}{ 848 * i_t = 1 - f_t 849 * \f} 850 * * The cell-to-forget weights (\f$W_{cf}\f$) and cell-to-output weights 851 * (\f$W_{co}\f$) either both have values or neither of them have values. 852 * If they have values, the peephole optimization is used. Additionally, 853 * if CIFG is not used, cell-to-input weights (\f$W_{ci}\f$) is also 854 * required to have values for peephole optimization. 855 * * The projection weights (\f$W_{proj}\f$) is required only for the 856 * recurrent projection layer, and should otherwise have no value. 857 * * The projection bias (\f$b_{proj}\f$) may (but not required to) have a 858 * value if the recurrent projection layer exists, and should otherwise 859 * have no value. 860 * 861 * References: 862 * 863 * The default non-peephole non-CIFG implementation is based on: 864 * http://www.bioinf.jku.at/publications/older/2604.pdf 865 * S. Hochreiter and J. Schmidhuber. "Long Short-Term Memory". Neural 866 * Computation, 9(8):1735-1780, 1997. 867 * 868 * The peephole implementation and projection layer is based on: 869 * https://research.google.com/pubs/archive/43905.pdf 870 * Hasim Sak, Andrew Senior, and Francoise Beaufays. "Long short-term memory 871 * recurrent neural network architectures for large scale acoustic 872 * modeling." INTERSPEECH, 2014. 873 * (However, the concept of peephole optimization was introduced in work 874 * prior to this paper.) 875 * 876 * The coupling of input and forget gate (CIFG) is based on: 877 * http://arxiv.org/pdf/1503.04069.pdf 878 * Greff et al. "LSTM: A Search Space Odyssey" 879 * 880 * Supported tensor {@link OperandCode}: 881 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 882 * 883 * Inputs: 884 * * 0: The input (\f$x_t\f$). 885 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 886 * [batch_size, input_size], where “batch_size” corresponds to the 887 * batching dimension, and “input_size” is the size of the input. 888 * * 1: The input-to-input weights (\f$W_{xi}\f$). Optional. 889 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 890 * [num_units, input_size], where “num_units” corresponds to the 891 * number of cell units. 892 * * 2: The input-to-forget weights (\f$W_{xf}\f$). 893 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 894 * [num_units, input_size]. 895 * * 3: The input-to-cell weights (\f$W_{xc}\f$). 896 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 897 * [num_units, input_size]. 898 * * 4: The input-to-output weights (\f$W_{xo}\f$). 899 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 900 * [num_units, input_size]. 901 * * 5: The recurrent-to-input weights (\f$W_{hi}\f$). Optional. 902 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 903 * [num_units, output_size], where “output_size” corresponds to either 904 * the number of cell units (i.e., “num_units”), or the second 905 * dimension of the “projection_weights”, if defined. 906 * * 6: The recurrent-to-forget weights (\f$W_{hf}\f$). 907 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 908 * [num_units, output_size]. 909 * * 7: The recurrent-to-cell weights (\f$W_{hc}\f$). 910 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 911 * [num_units, output_size]. 912 * * 8: The recurrent-to-output weights (\f$W_{ho}\f$). 913 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 914 * [num_units, output_size]. 915 * * 9: The cell-to-input weights (\f$W_{ci}\f$). Optional. 916 * A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 917 * [num_units]. 918 * * 10:The cell-to-forget weights (\f$W_{cf}\f$). Optional. 919 * A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 920 * [num_units]. 921 * * 11:The cell-to-output weights (\f$W_{co}\f$). Optional. 922 * A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 923 * [num_units]. 924 * * 12:The input gate bias (\f$b_i\f$). Optional. 925 * A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 926 * [num_units]. 927 * * 13:The forget gate bias (\f$b_f\f$). 928 * A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 929 * [num_units]. 930 * * 14:The cell bias (\f$b_c\f$). 931 * A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 932 * [num_units]. 933 * * 15:The output gate bias (\f$b_o\f$). 934 * A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 935 * [num_units]. 936 * * 16:The projection weights (\f$W_{proj}\f$). Optional. 937 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 938 * [output_size, num_units]. 939 * * 17:The projection bias (\f$b_{proj}\f$). Optional. 940 * A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 941 * [output_size]. 942 * * 18:The output state (in) (\f$h_{t-1}\f$). 943 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 944 * [batch_size, output_size]. 945 * * 19:The cell state (in) (\f$C_{t-1}\f$). 946 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 947 * [batch_size, num_units]. 948 * * 20:The activation function (\f$g\f$). 949 * A value indicating the activation function: 950 * <ul> 951 * <li>0: None; 952 * <li>1: Relu; 953 * <li>3: Relu6; 954 * <li>4: Tanh; 955 * <li>6: Sigmoid. 956 * </ul> 957 * * 21:The clipping threshold (\f$t_{cell}\f$) for the cell state, such 958 * that values are bound within [-cell_clip, cell_clip]. If set to 0.0 959 * then clipping is disabled. 960 * * 22:The clipping threshold (\f$t_{proj}\f$) for the output from the 961 * projection layer, such that values are bound within 962 * [-proj_clip, proj_clip]. If set to 0.0 then clipping is disabled. 963 * 964 * Outputs: 965 * * 0: The scratch buffer. 966 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 967 * [batch_size, num_units * 4] with CIFG, or 968 * [batch_size, num_units * 3] without CIFG. 969 * * 1: The output state (out) (\f$h_t\f$). 970 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 971 * [batch_size, output_size]. 972 * * 2: The cell state (out) (\f$C_t\f$). 973 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 974 * [batch_size, num_units]. 975 * * 3: The output (\f$o_t\f$). 976 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 977 * [batch_size, output_size]. This is effectively the same as the 978 * current “output state (out)” value. 979 */ 980 ANEURALNETWORKS_LSTM = 16, 981 982 /** 983 * Performs an 2-D max pooling operation. 984 * 985 * The output dimensions are functions of the filter dimensions, stride, and 986 * padding. 987 * 988 * The values in the output tensor are computed as: 989 * 990 * output[batch, row, col, channel] = 991 * max_{i, j} (input[batch, row + i, col + j, channel]) 992 * 993 * Supported tensor {@link OperandCode}: 994 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 995 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 996 * 997 * Supported tensor rank: 4, with "NHWC" data layout. 998 * 999 * Both explicit padding and implicit padding are supported. 1000 * 1001 * Inputs (explicit padding): 1002 * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying 1003 * the input. 1004 * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 1005 * the left, in the ‘width’ dimension. 1006 * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 1007 * the right, in the ‘width’ dimension. 1008 * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 1009 * the top, in the ‘height’ dimension. 1010 * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the padding on 1011 * the bottom, in the ‘height’ dimension. 1012 * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 1013 * walking through input in the ‘width’ dimension. 1014 * * 6: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 1015 * walking through input in the ‘height’ dimension. 1016 * * 7: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter 1017 * width. 1018 * * 8: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter 1019 * height. 1020 * * 9: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 1021 * {@link FuseCode} values. Specifies the activation to 1022 * invoke on the result. 1023 * 1024 * Inputs (implicit padding): 1025 * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying 1026 * the input. 1027 * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the implicit 1028 * padding scheme, has to be one of the 1029 * {@link PaddingCode} values. 1030 * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 1031 * walking through input in the ‘width’ dimension. 1032 * * 3: An {@link ANEURALNETWORKS_INT32} scalar, specifying the stride when 1033 * walking through input in the ‘height’ dimension. 1034 * * 4: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter 1035 * width. 1036 * * 5: An {@link ANEURALNETWORKS_INT32} scalar, specifying the filter 1037 * height. 1038 * * 6: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 1039 * {@link FuseCode} values. Specifies the activation to 1040 * invoke on the result. 1041 * 1042 * Outputs: 1043 * * 0: The output 4-D tensor, of shape 1044 * [batches, out_height, out_width, depth]. 1045 */ 1046 ANEURALNETWORKS_MAX_POOL_2D = 17, 1047 1048 /** 1049 * Multiplies two tensors, element-wise. 1050 * 1051 * Takes two input tensors of identical {@link OperandCode} and compatible 1052 * dimensions. The output is the product of both input tensors, optionally 1053 * modified by an activation function. 1054 * 1055 * Two dimensions are compatible when: 1056 * 1. they are equal, or 1057 * 2. one of them is 1 1058 * 1059 * The size of the resulting output is the maximum size along each dimension 1060 * of the input operands. It starts with the trailing dimensions, and works 1061 * its way forward. 1062 * 1063 * Supported tensor {@link OperandCode}: 1064 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1065 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 1066 * 1067 * Supported tensor rank: up to 4 1068 * 1069 * Inputs: 1070 * * 0: A tensor. 1071 * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions 1072 * as input0. 1073 * * 2: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 1074 * {@link FuseCode} values. Specifies the activation to 1075 * invoke on the result. 1076 * 1077 * Outputs: 1078 * * 0: The product, a tensor of the same {@link OperandCode} as input0. 1079 * For output tensor of {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, 1080 * the following condition must be satisfied: 1081 * output_scale > input1_scale * input2_scale. 1082 */ 1083 ANEURALNETWORKS_MUL = 18, 1084 1085 /** 1086 * Computes rectified linear activation on the input tensor element-wise. 1087 * 1088 * The output is calculated using this formula: 1089 * 1090 * output = max(0, input) 1091 * 1092 * Supported tensor {@link OperandCode}: 1093 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1094 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 1095 * 1096 * Supported tensor rank: up to 4. 1097 * 1098 * Inputs: 1099 * * 0: A tensor, specifying the input. 1100 * 1101 * Outputs: 1102 * * 0: The output tensor of same shape as input0. 1103 */ 1104 ANEURALNETWORKS_RELU = 19, 1105 1106 /** 1107 * Computes rectified linear 1 activation on the input tensor element-wise. 1108 * 1109 * The output is calculated using this formula: 1110 * 1111 * output = min(1.f, max(-1.f, input)) 1112 * 1113 * Supported tensor {@link OperandCode}: 1114 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1115 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 1116 * 1117 * Supported tensor rank: up to 4. 1118 * 1119 * Inputs: 1120 * * 0: A tensor, specifying the input. 1121 * 1122 * Outputs: 1123 * * 0: The output tensor of same shape as input0. 1124 */ 1125 ANEURALNETWORKS_RELU1 = 20, 1126 1127 /** 1128 * Computes rectified linear 6 activation on the input tensor element-wise. 1129 * 1130 * The output is calculated using this formula: 1131 * 1132 * output = min(6, max(0, input)) 1133 * 1134 * Supported tensor {@link OperandCode}: 1135 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1136 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 1137 * 1138 * Supported tensor rank: up to 4. 1139 * 1140 * Inputs: 1141 * * 0: A tensor, specifying the input. 1142 * 1143 * Outputs: 1144 * * 0: The output tensor of same shape as input0. 1145 */ 1146 ANEURALNETWORKS_RELU6 = 21, 1147 1148 /** 1149 * Reshapes a tensor. 1150 * 1151 * Given tensor, this operation returns a tensor that has the same values as 1152 * tensor, but with a newly specified shape. 1153 * 1154 * Supported tensor {@link OperandCode}: 1155 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1156 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 1157 * 1158 * Supported tensor rank: up to 4. 1159 * 1160 * Inputs: 1161 * * 0: A tensor, specifying the tensor to be reshaped. 1162 * * 1: A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, defining the 1163 * shape of the output tensor. The number of elements implied by shape 1164 * must be the same as the number of elements in the input tensor. 1165 * 1166 * Outputs: 1167 * * 0: The output tensor, of shape specified by the input shape. 1168 */ 1169 ANEURALNETWORKS_RESHAPE = 22, 1170 1171 /** 1172 * Resizes images to given size using the bilinear interpretation. 1173 * 1174 * Resized images must be distorted if their output aspect ratio is not the 1175 * same as input aspect ratio. The corner pixels of output may not be the 1176 * same as corner pixels of input. 1177 * 1178 * Supported tensor {@link OperandCode}: 1179 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1180 * 1181 * Supported tensor rank: 4, with "NHWC" data layout. 1182 * 1183 * Inputs: 1184 * * 0: A 4-D tensor, of shape [batches, height, width, depth], specifying 1185 * the input. 1186 * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the output 1187 * height of the output tensor. 1188 * * 2: An {@link ANEURALNETWORKS_INT32} scalar, specifying the output 1189 * width of the output tensor. 1190 * 1191 * Outputs: 1192 * * 0: The output 4-D tensor, of shape 1193 * [batches, new_height, new_width, depth]. 1194 */ 1195 ANEURALNETWORKS_RESIZE_BILINEAR = 23, 1196 1197 /** 1198 * A basic recurrent neural network layer. 1199 * 1200 * This layer implements the operation: 1201 * outputs = state = activation(inputs * input_weights + 1202 * state * recurrent_weights + bias) 1203 * 1204 * Where: 1205 * * “input_weights” is a weight matrix that multiplies the inputs; 1206 * * “recurrent_weights” is a weight matrix that multiplies the current 1207 * “state” which itself is the output from the previous time step 1208 * computation; 1209 * * “bias” is a bias vector (added to each output vector in the batch); 1210 * * “activation” is the function passed as the “fused_activation_function” 1211 * argument (if not “NONE”). 1212 * 1213 * Supported tensor {@link OperandCode}: 1214 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1215 * 1216 * Inputs: 1217 * * 0: input. 1218 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32} of shape 1219 * [batch_size, input_size], where “batch_size” corresponds to the 1220 * batching dimension, and “input_size” is the size of the input. 1221 * * 1: weights. 1222 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 1223 * [num_units, input_size], where “num_units” corresponds to the 1224 * number of units. 1225 * * 2: recurrent_weights. 1226 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 1227 * [num_units, num_units], with columns corresponding to the weights 1228 * from each unit. 1229 * * 3: bias. 1230 * A 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 1231 * [num_units]. 1232 * * 4: hidden state (in). 1233 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 1234 * [batch_size, num_units]. 1235 * * 5: fused_activation_function. 1236 * An optional {@link FuseCode} value indicating the 1237 * activation function. If “NONE” is specified then it results in a 1238 * linear activation. 1239 * 1240 * Outputs: 1241 * * 0: hidden state (out). 1242 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 1243 * [batch_size, num_units]. 1244 * 1245 * * 1: output. 1246 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 1247 * [batch_size, num_units]. This is effectively the same as the 1248 * current state value. 1249 */ 1250 ANEURALNETWORKS_RNN = 24, 1251 1252 /** 1253 * Computes the softmax activation on the input tensor element-wise, per 1254 * batch, by normalizing the input vector so the maximum coefficient is 1255 * zero. 1256 * 1257 * The output is calculated using this formula: 1258 * 1259 * output[batch, i] = 1260 * exp((input[batch, i] - max(input[batch, :])) * beta) / 1261 * sum_{k}{exp((input[batch, k] - max(input[batch, :])) * beta)} 1262 * 1263 * Supported tensor {@link OperandCode}: 1264 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1265 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 1266 * 1267 * Supported tensor rank: 2 or 4. 1268 * 1269 * Inputs: 1270 * * 0: A 2-D or 4-D tensor, specifying the tensor to be reshaped. 1271 * * 1: An {@link ANEURALNETWORKS_FLOAT32} scalar, specifying the positive 1272 * scaling factor for the exponent, beta. 1273 * 1274 * Outputs: 1275 * * 0: The output tensor of same shape as input0. 1276 * For {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM}, 1277 * the scale must be 1.f / 256 and the zeroPoint must be 0. 1278 */ 1279 ANEURALNETWORKS_SOFTMAX = 25, 1280 1281 /** 1282 * Rearranges blocks of spatial data, into depth. 1283 * 1284 * More specifically, this op outputs a copy of the input tensor where 1285 * values from the height and width dimensions are moved to the depth 1286 * dimension. The value block_size indicates the input block size and how 1287 * the data is moved. 1288 * 1289 * Chunks of data of size block_size * block_size from depth are rearranged 1290 * into non-overlapping blocks of size block_size x block_size. 1291 * 1292 * The depth of the output tensor is input_depth * block_size * block_size. 1293 * The input tensor's height and width must be divisible by block_size. 1294 * 1295 * Supported tensor {@link OperandCode}: 1296 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1297 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 1298 * 1299 * Supported tensor rank: 4, with "NHWC" data layout. 1300 * 1301 * Inputs: 1302 * * 0: A 4-D tensor, of shape [batches, height, width, depth_in], 1303 * specifying the input. 1304 * * 1: An {@link ANEURALNETWORKS_INT32} scalar, specifying the block_size. 1305 * block_size must be >=1 and block_size must be a divisor of both the 1306 * input height and width. 1307 * 1308 * Outputs: 1309 * * 0: The output 4-D tensor, of shape [batch, height/block_size, 1310 * width/block_size, depth*block_size*block_size]. 1311 */ 1312 ANEURALNETWORKS_SPACE_TO_DEPTH = 26, 1313 1314 /** 1315 * SVDF op is a kind of stateful layer derived from the notion that a 1316 * densely connected layer that's processing a sequence of input frames can 1317 * be approximated by using a singular value decomposition of each of its 1318 * nodes. The implementation is based on: 1319 * 1320 * https://research.google.com/pubs/archive/43813.pdf 1321 * 1322 * P. Nakkiran, R. Alvarez, R. Prabhavalkar, C. Parada. 1323 * “Compressing Deep Neural Networks using a Rank-Constrained Topology”. 1324 * INTERSPEECH, 2015. 1325 * 1326 * It processes the incoming input using a 2-stage filtering mechanism: 1327 * * stage 1 performs filtering on the "features" dimension, whose outputs 1328 * get pushed into a memory of fixed-size memory_size. 1329 * * stage 2 performs filtering on the "time" dimension of the memory_size 1330 * memoized outputs of stage 1. 1331 * 1332 * Specifically, for rank 1, this layer implements the operation: 1333 * 1334 * memory = push(conv1d(inputs, weights_feature, feature_dim, 1335 * "ANEURALNETWORKS_PADDING_VALID")); 1336 * outputs = activation(memory * weights_time + bias); 1337 * 1338 * Where: 1339 * * “weights_feature” is a weights matrix that processes the inputs (by 1340 * convolving the input with every “feature filter”), and whose outputs 1341 * get pushed, stacked in order, into the fixed-size “memory” (the oldest 1342 * entry gets dropped); 1343 * * “weights_time” is a weights matrix that processes the “memory” (by a 1344 * batched matrix multiplication on the num_units); 1345 * * “bias” is an optional bias vector (added to each output vector in the 1346 * batch); and 1347 * * “activation” is the function passed as the “fused_activation_function” 1348 * argument (if not “NONE”). 1349 * 1350 * Each rank adds a dimension to the weights matrices by means of stacking 1351 * the filters. 1352 * 1353 * Supported tensor {@link OperandCode}: 1354 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1355 * 1356 * Inputs: 1357 * * 0: input. 1358 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 1359 * [batch_size, input_size], where “batch_size” corresponds to the 1360 * batching dimension, and “input_size” is the size of the input. 1361 * * 1: weights_feature. 1362 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 1363 * [num_units, input_size], where “num_units” corresponds to the 1364 * number of units. 1365 * * 2: weights_time. 1366 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 1367 * [num_units, memory_size], where “memory_size” corresponds to the 1368 * fixed-size of the memory. 1369 * * 3: bias. 1370 * An optional 1-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, 1371 * of shape [num_units]. 1372 * * 4: state (in). 1373 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 1374 * [batch_size, (memory_size - 1) * num_units * rank]. 1375 * * 5: rank. 1376 * The rank of the SVD approximation. 1377 * * 6: fused_activation_function. 1378 * An optional {@link FuseCode} value indicating the 1379 * activation function. If “NONE” is specified then it results in a 1380 * linear activation. 1381 * 1382 * Outputs: 1383 * * 0: state (out). 1384 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 1385 * [batch_size, (memory_size - 1) * num_units * rank]. 1386 * * 1: output. 1387 * A 2-D tensor of {@link ANEURALNETWORKS_TENSOR_FLOAT32}, of shape 1388 * [batch_size, num_units]. 1389 */ 1390 ANEURALNETWORKS_SVDF = 27, 1391 1392 /** 1393 * Computes hyperbolic tangent of input tensor element-wise. 1394 * 1395 * The output is calculated using this formula: 1396 * 1397 * output = tanh(input) 1398 * 1399 * Supported tensor {@link OperandCode}: 1400 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1401 * 1402 * Supported tensor rank: up to 4. 1403 * 1404 * Inputs: 1405 * * 0: A tensor, specifying the input. 1406 * 1407 * Outputs: 1408 * * 0: The output tensor of same shape as input0. 1409 */ 1410 ANEURALNETWORKS_TANH = 28, 1411 1412 #if __ANDROID_API__ >= __ANDROID_API_P__ 1413 // TODO: make the description easier to understand. 1414 /** 1415 * BatchToSpace for N-dimensional tensors. 1416 * 1417 * This operation reshapes the batch dimension (dimension 0) into M + 1 1418 * dimensions of shape block_shape + [batch], interleaves these blocks back 1419 * into the grid defined by the spatial dimensions [1, ..., M], to obtain a 1420 * result with the same rank as the input. 1421 * 1422 * This is the reverse of SpaceToBatch. 1423 * 1424 * Supported tensor {@link OperandCode}: 1425 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1426 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 1427 * 1428 * Supported tensor rank: 4 1429 * 1430 * Inputs: 1431 * * 0: An n-D tensor, specifying the tensor to be reshaped 1432 * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the block 1433 * sizes for each spatial dimension of the input tensor. All values 1434 * must be >= 1. 1435 * 1436 * Outputs: 1437 * * 0: A tensor of the same {@link OperandCode} as input0. 1438 */ 1439 ANEURALNETWORKS_BATCH_TO_SPACE_ND = 29, 1440 1441 /** 1442 * Element-wise division of two tensors. 1443 * 1444 * Takes two input tensors of identical {@link OperandCode} and compatible 1445 * dimensions. The output is the result of dividing the first input tensor 1446 * by the second, optionally modified by an activation function. 1447 * 1448 * Two dimensions are compatible when: 1449 * 1. they are equal, or 1450 * 2. one of them is 1 1451 * 1452 * The size of the output is the maximum size along each dimension of the 1453 * input operands. It starts with the trailing dimensions, and works its way 1454 * forward. 1455 * 1456 * Example: 1457 * input1.dimension = {4, 1, 2} 1458 * input2.dimension = {5, 4, 3, 1} 1459 * output.dimension = {5, 4, 3, 2} 1460 * 1461 * Supported tensor {@link OperandCode}: 1462 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1463 * 1464 * Supported tensor rank: up to 4 1465 * 1466 * Inputs: 1467 * * 0: An n-D tensor, specifying the first input. 1468 * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions 1469 * as input0. 1470 * * 2: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 1471 * {@link FuseCode} values. Specifies the activation to 1472 * invoke on the result. 1473 * 1474 * Outputs: 1475 * * 0: A tensor of the same {@link OperandCode} as input0. 1476 */ 1477 ANEURALNETWORKS_DIV = 30, 1478 1479 /** 1480 * Computes the mean of elements across dimensions of a tensor. 1481 * 1482 * Reduces the input tensor along the given dimensions to reduce. Unless 1483 * keep_dims is true, the rank of the tensor is reduced by 1 for each entry 1484 * in axis. If keep_dims is true, the reduced dimensions are retained with 1485 * length 1. 1486 * 1487 * If dimensions to reduce have no entries, all dimensions are reduced, and 1488 * a tensor with a single element is returned. 1489 * 1490 * Supported tensor {@link OperandCode}: 1491 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1492 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 1493 * 1494 * Supported tensor rank: up to 4 1495 * 1496 * Inputs: 1497 * * 0: A tensor, specifying the input. 1498 * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The dimensions 1499 * to reduce. If None (the default), reduces all dimensions. Must be in 1500 * the range [-rank(input_tensor), rank(input_tensor)). 1501 * * 2: An {@link ANEURALNETWORKS_INT32} scalar, keep_dims. If positive, 1502 * retains reduced dimensions with length 1. 1503 * 1504 * Outputs: 1505 * * 0: A tensor of the same {@link OperandCode} as input0. 1506 */ 1507 ANEURALNETWORKS_MEAN = 31, 1508 1509 /** 1510 * Pads a tensor. 1511 * 1512 * This operation pads a tensor according to the specified paddings. 1513 * 1514 * Supported tensor {@link OperandCode}: 1515 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1516 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 1517 * 1518 * Supported tensor rank: up to 4 1519 * 1520 * Inputs: 1521 * * 0: An n-D tensor, specifying the tensor to be padded. 1522 * * 1: A 2-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the paddings 1523 * for each spatial dimension of the input tensor. The shape of the 1524 * tensor must be {rank(input0), 2}. 1525 * padding[i, 0] specifies the number of element to be padded in the 1526 * front of dimension i. 1527 * padding[i, 1] specifies the number of element to be padded after the 1528 * end of dimension i. 1529 * 1530 * Outputs: 1531 * * 0: A tensor of the same {@link OperandCode} as input0. 1532 */ 1533 ANEURALNETWORKS_PAD = 32, 1534 1535 // TODO: make the description easier to understand. 1536 /** 1537 * SpaceToBatch for N-Dimensional tensors. 1538 * 1539 * This operation divides "spatial" dimensions [1, ..., M] of the input into 1540 * a grid of blocks of shape block_shape, and interleaves these blocks with 1541 * the "batch" dimension (0) such that in the output, the spatial dimensions 1542 * [1, ..., M] correspond to the position within the grid, and the batch 1543 * dimension combines both the position within a spatial block and the 1544 * original batch position. Prior to division into blocks, the spatial 1545 * dimensions of the input are optionally zero padded according to paddings. 1546 * 1547 * Supported tensor {@link OperandCode}: 1548 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1549 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 1550 * 1551 * Supported tensor rank: 4 1552 * 1553 * Inputs: 1554 * * 0: An n-D tensor, specifying the input. 1555 * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the block 1556 * sizes for each spatial dimension of the input tensor. All values 1557 * must be >= 1. 1558 * * 2: A 2-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the paddings 1559 * for each spatial dimension of the input tensor. All values must be 1560 * >= 0. The shape of the tensor must be {rank(input0), 2}. 1561 * padding[i, 0] specifies the number of element to be padded in the 1562 * front of dimension i. 1563 * padding[i, 1] specifies the number of element to be padded after the 1564 * end of dimension i. 1565 * 1566 * Outputs: 1567 * * 0: A tensor of the same {@link OperandCode} as input0. 1568 */ 1569 ANEURALNETWORKS_SPACE_TO_BATCH_ND = 33, 1570 1571 /** 1572 * Removes dimensions of size 1 from the shape of a tensor. 1573 * 1574 * Given a tensor input, this operation returns a tensor of the same 1575 * {@link OperandCode} with all dimensions of size 1 removed. If you don't 1576 * want to remove all size 1 dimensions, you can remove specific size 1 1577 * dimensions by specifying the axes (input1). 1578 * 1579 * Supported tensor {@link OperandCode}: 1580 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1581 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 1582 * 1583 * Supported tensor rank: up to 4 1584 * 1585 * Inputs: 1586 * * 0: An n-D tensor, the tensor to be squeezed. 1587 * * 1: An optional 1-D tensor of {@link ANEURALNETWORKS_TENSOR_INT32}. The 1588 * dimensions to squeeze. If specified only squeezes the dimensions 1589 * listed. Otherwise, squeezes all dimensions. The dimension index 1590 * starts at 0. An error must be reported if squeezing a dimension that 1591 * is not 1. 1592 * 1593 * Outputs: 1594 * * 0: A tensor of the same {@link OperandCode} as input0. Contains the 1595 * same data as input, but has one or more dimensions of size 1 1596 * removed. 1597 */ 1598 ANEURALNETWORKS_SQUEEZE = 34, 1599 1600 /** 1601 * Extracts a strided slice of a tensor. 1602 * 1603 * Roughly speaking, this op extracts a slice of size (end - begin) / stride 1604 * from the given input tensor. Starting at the location specified by begin 1605 * the slice continues by adding stride to the index until all dimensions 1606 * are not less than end. Note that a stride can be negative, which causes a 1607 * reverse slice. 1608 * 1609 * Supported tensor {@link OperandCode}: 1610 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1611 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 1612 * 1613 * Supported tensor rank: up to 4 1614 * 1615 * Inputs: 1616 * * 0: An n-D tensor, specifying the tensor to be sliced. 1617 * * 1: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the starts of 1618 * the dimensions of the input tensor to be sliced. The length must be 1619 * of rank(input0). 1620 * * 2: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the ends of 1621 * the dimensions of the input tensor to be sliced. The length must be 1622 * of rank(input0). 1623 * * 3: A 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, the strides of 1624 * the dimensions of the input tensor to be sliced. The length must be 1625 * of rank(input0). 1626 * * 4: An {@link ANEURALNETWORKS_INT32} scalar, begin_mask. If the ith bit 1627 * of begin_mask is set, begin[i] is ignored and the fullest possible 1628 * range in that dimension is used instead. 1629 * * 5: An {@link ANEURALNETWORKS_INT32} scalar, end_mask. If the ith bit of 1630 * end_mask is set, end[i] is ignored and the fullest possible range in 1631 * that dimension is used instead. 1632 * * 6: An {@link ANEURALNETWORKS_INT32} scalar, shrink_axis_mask. An int32 1633 * mask. If the ith bit of shrink_axis_mask is set, it implies that the 1634 * ith specification shrinks the dimensionality by 1. A slice of size 1 1635 * starting from begin[i] in the dimension must be preserved. 1636 * 1637 * Outputs: 1638 * * 0: A tensor of the same {@link OperandCode} as input0. 1639 */ 1640 ANEURALNETWORKS_STRIDED_SLICE = 35, 1641 1642 /** 1643 * Element-wise subtraction of two tensors. 1644 * 1645 * Takes two input tensors of identical {@link OperandCode} and compatible 1646 * dimensions. The output is the result of subtracting the second input 1647 * tensor from the first one, optionally modified by an activation function. 1648 * 1649 * Two dimensions are compatible when: 1650 * 1. they are equal, or 1651 * 2. one of them is 1 1652 * 1653 * The size of the output is the maximum size along each dimension of the 1654 * input operands. It starts with the trailing dimensions, and works its way 1655 * forward. 1656 * 1657 * Example: 1658 * input1.dimension = {4, 1, 2} 1659 * input2.dimension = {5, 4, 3, 1} 1660 * output.dimension = {5, 4, 3, 2} 1661 * 1662 * Supported tensor {@link OperandCode}: 1663 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1664 * 1665 * Supported tensor rank: up to 4 1666 * 1667 * Inputs: 1668 * * 0: An n-D tensor, specifying the first input. 1669 * * 1: A tensor of the same {@link OperandCode}, and compatible dimensions 1670 * as input0. 1671 * * 2: An {@link ANEURALNETWORKS_INT32} scalar, and has to be one of the 1672 * {@link FuseCode} values. Specifies the activation to 1673 * invoke on the result. 1674 * 1675 * Outputs: 1676 * * 0: A tensor of the same {@link OperandCode} as input0. 1677 */ 1678 ANEURALNETWORKS_SUB = 36, 1679 1680 /** 1681 * Transposes the input tensor, permuting the dimensions according to the 1682 * perm tensor. 1683 * 1684 * The returned tensor's dimension i corresponds to the input dimension 1685 * perm[i]. If perm is not given, it is set to (n-1...0), where n is the 1686 * rank of the input tensor. Hence by default, this operation performs a 1687 * regular matrix transpose on 2-D input Tensors. 1688 * 1689 * Supported tensor {@link OperandCode}: 1690 * * {@link ANEURALNETWORKS_TENSOR_FLOAT32} 1691 * * {@link ANEURALNETWORKS_TENSOR_QUANT8_ASYMM} 1692 * 1693 * Supported tensor rank: up to 4 1694 * 1695 * Inputs: 1696 * * 0: An n-D tensor, specifying the tensor to be transposed. 1697 * * 1: An optional 1-D Tensor of {@link ANEURALNETWORKS_TENSOR_INT32}, 1698 * the permutation of the dimensions of the input tensor. 1699 * 1700 * Outputs: 1701 * * 0: A tensor of the same {@link OperandCode} as input0. 1702 */ 1703 ANEURALNETWORKS_TRANSPOSE = 37, 1704 #endif // __ANDROID_API__ >= __ANDROID_API_P__ 1705 } OperationCode; 1706 1707 /** 1708 * Fused activation function types. 1709 * 1710 */ 1711 typedef enum { 1712 /** NO fused activation function. */ 1713 ANEURALNETWORKS_FUSED_NONE = 0, 1714 /** Fused ReLU activation function. */ 1715 ANEURALNETWORKS_FUSED_RELU = 1, 1716 /** Fused ReLU1 activation function. */ 1717 ANEURALNETWORKS_FUSED_RELU1 = 2, 1718 /** Fused ReLU6 activation function. */ 1719 ANEURALNETWORKS_FUSED_RELU6 = 3, 1720 } FuseCode; 1721 1722 /** 1723 * Implicit padding algorithms. 1724 * 1725 */ 1726 typedef enum { 1727 /** 1728 * SAME padding. 1729 * Padding on both ends are the "same": 1730 * padding_to_beginning = total_padding / 2 1731 * padding_to_end = (total_padding + 1)/2. 1732 * i.e., for even number of padding, padding to both ends are exactly 1733 * the same; for odd number of padding, padding to the ending is bigger 1734 * than the padding to the beginning by 1. 1735 * 1736 * total_padding is a function of input, stride and filter size. 1737 * It could be computed as follows: 1738 * out_size = (input + stride - 1) / stride; 1739 * needed_input = (out_size - 1) * stride + filter_size 1740 * total_padding = max(0, needed_input - output_size) 1741 * The computation is the same for the horizontal and vertical directions. 1742 */ 1743 ANEURALNETWORKS_PADDING_SAME = 1, 1744 1745 /** 1746 * VALID padding. 1747 * No padding. When the input size is not evenly divisible by 1748 * the filter size, the input at the end that could not fill 1749 * the whole filter tile will simply be ignored. 1750 */ 1751 ANEURALNETWORKS_PADDING_VALID = 2, 1752 } PaddingCode; 1753 1754 /** 1755 * Execution preferences. 1756 */ 1757 typedef enum { 1758 /** 1759 * Prefer executing in a way that minimizes battery drain. 1760 * This is desirable for compilations that will be executed often. 1761 */ 1762 ANEURALNETWORKS_PREFER_LOW_POWER = 0, 1763 /** 1764 * Prefer returning a single answer as fast as possible, even if this causes 1765 * more power consumption. 1766 */ 1767 ANEURALNETWORKS_PREFER_FAST_SINGLE_ANSWER = 1, 1768 /** 1769 * Prefer maximizing the throughput of successive frames, for example when 1770 * processing successive frames coming from the camera. 1771 */ 1772 ANEURALNETWORKS_PREFER_SUSTAINED_SPEED = 2, 1773 } PreferenceCode; 1774 1775 /** 1776 * Result codes. 1777 */ 1778 typedef enum { 1779 ANEURALNETWORKS_NO_ERROR = 0, 1780 ANEURALNETWORKS_OUT_OF_MEMORY = 1, 1781 ANEURALNETWORKS_INCOMPLETE = 2, 1782 ANEURALNETWORKS_UNEXPECTED_NULL = 3, 1783 ANEURALNETWORKS_BAD_DATA = 4, 1784 ANEURALNETWORKS_OP_FAILED = 5, 1785 ANEURALNETWORKS_BAD_STATE = 6, 1786 ANEURALNETWORKS_UNMAPPABLE = 7, 1787 } ResultCode; 1788 1789 /** 1790 * For {@link ANeuralNetworksModel_setOperandValue}, values with a 1791 * length smaller or equal to this will be immediately copied into 1792 * the model. The size is in bytes. 1793 */ 1794 enum { 1795 ANEURALNETWORKS_MAX_SIZE_OF_IMMEDIATELY_COPIED_VALUES = 128 1796 }; 1797 1798 /** 1799 * ANeuralNetworksMemory is an opaque type that represents memory. 1800 * 1801 * This type is used to represent shared memory, memory mapped files, 1802 * and similar memories. 1803 * 1804 * By using shared memory, a program can efficiently communicate to the 1805 * runtime and drivers the tensors that define a model. See 1806 * {@link ANeuralNetworksModel_setOperandValueFromMemory}. An application 1807 * should typically create one shared memory object that contains every tensor 1808 * needed to define a model. {@link ANeuralNetworksMemory_createFromFd} can be 1809 * used to create shared memory from a file handle. 1810 * 1811 * Memory objects can also be used to specify the input and output arguments of 1812 * an execution. See {@link ANeuralNetworksExecution_setInputFromMemory} 1813 * and {@link ANeuralNetworksExecution_setOutputFromMemory}. 1814 */ 1815 typedef struct ANeuralNetworksMemory ANeuralNetworksMemory; 1816 1817 /** 1818 * ANeuralNetworksModel is an opaque type that contains a description of the 1819 * mathematical operations that constitute the model. 1820 * 1821 * <p>Build the model by calling<ul> 1822 * <li>{@link ANeuralNetworksModel_create}</li> 1823 * <li>{@link ANeuralNetworksModel_addOperation}</li> 1824 * <li>{@link ANeuralNetworksModel_addOperand}</li> 1825 * </ul> 1826 * 1827 * A model is completed by calling {@link ANeuralNetworksModel_finish}. 1828 * A model is destroyed by calling {@link ANeuralNetworksModel_free}. 1829 * 1830 * <p>A model cannot be modified once {@link ANeuralNetworksModel_finish} 1831 * has been called on it.</p> 1832 * 1833 * <p>It is the application's responsibility to make sure that only one thread 1834 * modifies a model at a given time. It is however safe for more than one 1835 * thread to use the model once {@link ANeuralNetworksModel_finish} has returned.</p> 1836 * 1837 * <p>It is also the application's responsibility to ensure that there are no other 1838 * uses of the model after calling {@link ANeuralNetworksModel_free}. 1839 * This includes any compilation or execution object created using the model.</p> 1840 */ 1841 typedef struct ANeuralNetworksModel ANeuralNetworksModel; 1842 1843 /** 1844 * ANeuralNetworksCompilation is an opaque type that can be used to compile 1845 * a machine learning model. 1846 * 1847 * <p>To use:<ul> 1848 * <li>Create a new compilation instance by calling the 1849 * {@link ANeuralNetworksCompilation_create} function.</li> 1850 * <li>Set any desired properties on the compilation (for example, 1851 * {@link ANeuralNetworksCompilation_setPreference}).</li> 1852 * <li>Complete the compilation with {@link ANeuralNetworksCompilation_finish}.</li> 1853 * <li>Use the compilation as many times as needed 1854 * with {@link ANeuralNetworksExecution_create}.</li> 1855 * <li>Destroy the compilation with {@link ANeuralNetworksCompilation_free} 1856 * once all executions using the compilation have completed.</li></ul></p> 1857 * 1858 * A compilation is completed by calling {@link ANeuralNetworksCompilation_finish}. 1859 * A compilation is destroyed by calling {@link ANeuralNetworksCompilation_free}. 1860 * 1861 * <p>A compilation cannot be modified once {@link ANeuralNetworksCompilation_finish} 1862 * has been called on it.</p> 1863 * 1864 * <p>It is the application's responsibility to make sure that only 1865 * one thread modifies a compilation at a given time. It is however 1866 * safe for more than one thread to use the compilation once 1867 * {@link ANeuralNetworksCompilation_finish} has returned.</p> 1868 * 1869 * <p>It is also the application's responsibility to ensure that there are no other 1870 * uses of the compilation after calling {@link ANeuralNetworksCompilation_free}. 1871 * This includes any execution object created using the compilation.</p> 1872 */ 1873 typedef struct ANeuralNetworksCompilation ANeuralNetworksCompilation; 1874 1875 /** 1876 * ANeuralNetworksExecution is an opaque type that can be used to apply a machine 1877 * learning model to a set of inputs. 1878 * 1879 * <p>To use:<ul> 1880 * <li>Create a new execution instance by calling the 1881 * {@link ANeuralNetworksExecution_create} function.</li> 1882 * <li>Associate data to the model inputs with 1883 * {@link ANeuralNetworksExecution_setInput} or 1884 * {@link ANeuralNetworksExecution_setInputFromMemory}.</li> 1885 * <li>Associate output buffers to the model outputs with 1886 * {@link ANeuralNetworksExecution_setOutput} or 1887 * {@link ANeuralNetworksExecution_setOutputFromMemory}.</li> 1888 * <li>Apply the model with {@link ANeuralNetworksExecution_startCompute}.</li> 1889 * <li>Wait for the execution to complete with {@link 1890 * ANeuralNetworksEvent_wait}.</li> 1891 * <li>Destroy the execution with 1892 * {@link ANeuralNetworksExecution_free}.</li></ul></p> 1893 * 1894 * <p>An execution cannot be modified once {@link ANeuralNetworksExecution_startCompute} 1895 * has been called on it.</p> 1896 * 1897 * <p>An execution can be applied to a model with 1898 * {@link ANeuralNetworksExecution_startCompute} only once. Create new executions 1899 * to do new evaluations of the model.</p> 1900 * 1901 * <p>It is the application's responsibility to make sure that only one thread 1902 * modifies an execution at a given time. It is however safe for more than one 1903 * thread to use {@link ANeuralNetworksEvent_wait} at the same time.</p> 1904 * 1905 * <p>It is also the application's responsibility to ensure that there are no other 1906 * uses of the request after calling {@link ANeuralNetworksExecution_free}.</p> 1907 */ 1908 typedef struct ANeuralNetworksExecution ANeuralNetworksExecution; 1909 1910 /** 1911 * ANeuralNetworksOperandType describes the type of an operand. 1912 * This structure is used to describe both scalars and tensors. 1913 * 1914 * A tensor operand type must have a specified rank (number of 1915 * dimensions) but may have any of its dimensions unspecified. 1916 * 1917 * A tensor operand type with all dimensions specified is "fully 1918 * specified". Whenever possible (i.e., whenever the dimensions are 1919 * known at model construction time), a tensor operand type should be 1920 * (but is not required to be) fully specified, in order to enable the 1921 * best possible performance. 1922 * 1923 * If a tensor operand's type is not fully specified, the dimensions 1924 * of the operand are deduced from the operand types and values of the 1925 * operation for which that operand is an output. 1926 * 1927 * <p>In the following situations, a tensor operand type must be fully 1928 * specified:<ul> 1929 * <li>The operand has a constant value, set by 1930 * {@link ANeuralNetworksModel_setOperandValue} (with a 1931 * non-nullptr buffer) or 1932 * {@link ANeuralNetworksModel_setOperandValueFromMemory}.</li> 1933 * <li>The operand is a model input or model output (see 1934 * {@link ANeuralNetworksModel_identifyInputsAndOutputs}). A 1935 * fully specified tensor operand type must either be provided 1936 * to {@link ANeuralNetworksModel_addOperand}; or it must be 1937 * provided to the corresponding 1938 * {@link ANeuralNetworksExecution_setInput}, 1939 * {@link ANeuralNetworksExecution_setInputFromMemory}, 1940 * {@link ANeuralNetworksExecution_setOutput}, or 1941 * {@link ANeuralNetworksModel_setOperandValueFromMemory}. 1942 * EXCEPTION: If the input or output is optional and omitted 1943 * (by passing nullptr for buffer to 1944 * {@link ANeuralNetworksExecution_setInput} or 1945 * {@link ANeuralNetworksExecution_setOutput}) then it need 1946 * not have a fully specified tensor operand type.</li></ul> 1947 * 1948 * A tensor operand type with some number of unspecified dimensions is 1949 * represented by setting each unspecified dimension to 0. 1950 */ 1951 typedef struct ANeuralNetworksOperandType { 1952 /** The data type, e.g ANEURALNETWORKS_INT8. */ 1953 int32_t type; 1954 /** The number of dimensions (rank). It should be 0 for scalars. */ 1955 uint32_t dimensionCount; 1956 /** The dimensions of the tensor. It should be nullptr for scalars. */ 1957 const uint32_t* dimensions; 1958 /** These two fields are only used for quantized tensors. 1959 * They should be zero for scalars and non-fixed point tensors. 1960 * The dequantized value of each entry is (value - zeroPoint) * scale. 1961 */ 1962 float scale; 1963 int32_t zeroPoint; 1964 } ANeuralNetworksOperandType; 1965 1966 typedef int32_t ANeuralNetworksOperationType; 1967 1968 /** 1969 * ANeuralNetworksEvent is an opaque type that represents an event 1970 * that will be signaled once an execution completes. 1971 */ 1972 typedef struct ANeuralNetworksEvent ANeuralNetworksEvent; 1973 1974 1975 /** 1976 * Creates a shared memory object from a file descriptor. 1977 * 1978 * The shared memory is backed by a file descriptor via mmap. 1979 * See {@link ANeuralNetworksMemory} for a description on how to use 1980 * this shared memory. 1981 * 1982 * @param size The requested size in bytes. 1983 * Must not be larger than the file size. 1984 * @param prot The desired memory protection for the mapping. 1985 * It is either PROT_NONE or the bitwise OR of one or 1986 * more of the following flags: PROT_READ, PROT_WRITE. 1987 * @param fd The requested file descriptor. 1988 * The file descriptor has to be mmap-able. The file 1989 * descriptor will be duplicated. 1990 * @param offset The offset to the beginning of the file of the area to map. 1991 * The offset has to be aligned to a page size. 1992 * @param memory The memory object to be created. 1993 * Set to NULL if unsuccessful. 1994 * 1995 * @return ANEURALNETWORKS_NO_ERROR if the request completed normally. 1996 */ 1997 int ANeuralNetworksMemory_createFromFd(size_t size, int protect, int fd, size_t offset, 1998 ANeuralNetworksMemory** memory); 1999 2000 /** 2001 * Delete a memory object. 2002 * 2003 * Destroys the object used by the run time to keep track of the memory. 2004 * This will free the underlying actual memory if no other code has open 2005 * handles to this memory. 2006 * 2007 * @param memory The memory object to be freed. 2008 */ 2009 void ANeuralNetworksMemory_free(ANeuralNetworksMemory* memory); 2010 2011 /** 2012 * Create an empty {@link ANeuralNetworksModel}. 2013 * 2014 * <p>This only creates the object. Computation is performed once 2015 * {@link ANeuralNetworksExecution_startCompute} is invoked. 2016 * 2017 * The model should be constructed with calls to 2018 * {@link ANeuralNetworksModel_addOperation} and 2019 * {@link ANeuralNetworksModel_addOperand} 2020 * 2021 * <p>{@link ANeuralNetworksModel_finish} should be called once the model 2022 * has been fully constructed.</p> 2023 * 2024 * <p>{@link ANeuralNetworksModel_free} should be called once the model 2025 * is no longer needed.</p> 2026 * 2027 * @param model The {@link ANeuralNetworksModel} to be created. 2028 * Set to NULL if unsuccessful. 2029 * 2030 * @return ANEURALNETWORKS_NO_ERROR if successful. 2031 */ 2032 int ANeuralNetworksModel_create(ANeuralNetworksModel** model); 2033 2034 /** 2035 * Destroy a model. 2036 * 2037 * The model need not have been finished by a call to 2038 * {@link ANeuralNetworksModel_finish}. 2039 * 2040 * See {@link ANeuralNetworksModel} for information on multithreaded usage. 2041 * 2042 * @param model The model to be destroyed. Passing NULL is acceptable and 2043 * results in no operation. 2044 */ 2045 void ANeuralNetworksModel_free(ANeuralNetworksModel* model); 2046 2047 /** 2048 * Indicate that we have finished modifying a model. Required before 2049 * calling {@link ANeuralNetworksCompilation_create}. 2050 * 2051 * An application is responsible to make sure that no other thread uses 2052 * the model at the same time. 2053 * 2054 * This function must only be called once for a given model. 2055 * 2056 * See {@link ANeuralNetworksModel} for information on multithreaded usage. 2057 * 2058 * @param model The model to be finished. 2059 * 2060 * @return ANEURALNETWORKS_NO_ERROR if successful. 2061 */ 2062 int ANeuralNetworksModel_finish(ANeuralNetworksModel* model); 2063 2064 /** 2065 * Add an operand to a model. 2066 * 2067 * The order in which the operands are added is important. The first one added 2068 * to a model will have the index value 0, the second 1, etc. These indexes are 2069 * used as operand identifiers in {@link ANeuralNetworksModel_addOperation}, 2070 * {@link ANeuralNetworksExecution_setInput}, 2071 * {@link ANeuralNetworksExecution_setInputFromMemory}, 2072 * {@link ANeuralNetworksExecution_setOutput}, 2073 * {@link ANeuralNetworksExecution_setOutputFromMemory} and 2074 * {@link ANeuralNetworksExecution_setOperandValue}. 2075 * 2076 * To build a model that can accommodate inputs of various sizes, as 2077 * you may want to do for a CNN, leave unspecified the dimensions that 2078 * will vary at run time. If you do so, fully specify dimensions 2079 * when calling {@link ANeuralNetworksExecution_setInput} or 2080 * {@link ANeuralNetworksExecution_setInputFromMemory}. 2081 * 2082 * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been 2083 * called will return an error. 2084 * 2085 * See {@link ANeuralNetworksModel} for information on multithreaded usage. 2086 * 2087 * @param model The model to be modified. 2088 * @param type The {@link ANeuralNetworksOperandType} that describes the shape 2089 * of the operand. 2090 * 2091 * @return ANEURALNETWORKS_NO_ERROR if successful. 2092 */ 2093 int ANeuralNetworksModel_addOperand(ANeuralNetworksModel* model, 2094 const ANeuralNetworksOperandType* type); 2095 2096 /** 2097 * Sets an operand to a constant value. 2098 * 2099 * Values of length smaller or equal to 2100 * {@link ANEURALNETWORKS_MAX_SIZE_OF_IMMEDIATELY_COPIED_VALUES} 2101 * are immediately copied into the model. 2102 * 2103 * For values of length greater than {@link ANEURALNETWORKS_MAX_SIZE_OF_IMMEDIATELY_COPIED_VALUES}, 2104 * a pointer to the buffer is stored within the model. The application is responsible 2105 * for not changing the content of this region until all executions using this model 2106 * have completed. As the data may be copied during processing, modifying the data 2107 * after this call yields undefined results. 2108 * 2109 * For large tensors, using {@link ANeuralNetworksModel_setOperandValueFromMemory} 2110 * is likely to be more efficient. 2111 * 2112 * To indicate that an optional operand should be considered missing, 2113 * pass nullptr for buffer and 0 for length. 2114 * 2115 * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been 2116 * called will return an error. 2117 * 2118 * See {@link ANeuralNetworksModel} for information on multithreaded usage. 2119 * 2120 * @param model The model to be modified. 2121 * @param index The index of the model operand we're setting. 2122 * @param buffer A pointer to the data to use. 2123 * @param length The size in bytes of the data value. 2124 * 2125 * @return ANEURALNETWORKS_NO_ERROR if successful. 2126 */ 2127 int ANeuralNetworksModel_setOperandValue(ANeuralNetworksModel* model, int32_t index, 2128 const void* buffer, size_t length); 2129 2130 /** 2131 * Sets an operand to a value stored in a memory object. 2132 * 2133 * The content of the memory is not copied. A reference to that memory is stored 2134 * inside the model. The application is responsible for not changing the content 2135 * of the memory region until all executions using this model have completed. 2136 * As the data may be copied during processing, modifying the data after this call 2137 * yields undefined results. 2138 * 2139 * To indicate that an optional operand should be considered missing, 2140 * use {@link ANeuralNetworksModel_setOperandValue} instead, passing nullptr for buffer. 2141 * 2142 * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been 2143 * called will return an error. 2144 * 2145 * See {@link ANeuralNetworksModel} for information on multithreaded usage. 2146 * 2147 * @param model The model to be modified. 2148 * @param index The index of the model operand we're setting. 2149 * @param buffer A pointer to the data to use. 2150 * @param memory The memory containing the data. 2151 * @param offset This specifies the location of the data within the memory. 2152 * The offset is in bytes from the start of memory. 2153 * @param length The size in bytes of the data value. 2154 * 2155 * @return ANEURALNETWORKS_NO_ERROR if successful. 2156 */ 2157 int ANeuralNetworksModel_setOperandValueFromMemory(ANeuralNetworksModel* model, int32_t index, 2158 const ANeuralNetworksMemory* memory, 2159 size_t offset, size_t length); 2160 2161 /** 2162 * Add an operation to a model. 2163 * 2164 * @param model The model to be modified. 2165 * @param type The {@link ANeuralNetworksOperandType} of the operation. 2166 * @param inputCount The number of entries in the inputs array. 2167 * @param inputs An array of indexes identifying each operand. 2168 * @param outputCount The number of entries in the outputs array. 2169 * @param outputs An array of indexes identifying each operand. 2170 * 2171 * The operands specified by inputs and outputs must have been 2172 * previously added by calls to {@link ANeuralNetworksModel_addOperand}. 2173 * 2174 * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been 2175 * called will return an error. 2176 * 2177 * See {@link ANeuralNetworksModel} for information on multithreaded usage. 2178 * 2179 * @return ANEURALNETWORKS_NO_ERROR if successful. 2180 */ 2181 int ANeuralNetworksModel_addOperation(ANeuralNetworksModel* model, 2182 ANeuralNetworksOperationType type, uint32_t inputCount, 2183 const uint32_t* inputs, uint32_t outputCount, 2184 const uint32_t* outputs); 2185 2186 /** 2187 * Specifies which operands will be the model's inputs and outputs. 2188 * 2189 * An operand cannot be used for both input and output. Doing so will 2190 * return an error. 2191 * 2192 * @param model The model to be modified. 2193 * @param inputCount The number of entries in the inputs array. 2194 * @param inputs An array of indexes identifying the input operands. 2195 * @param outputCount The number of entries in the outputs array. 2196 * @param outputs An array of indexes identifying the output operands. 2197 * 2198 * The operands specified by inputs and outputs must have been 2199 * previously added by calls to {@link ANeuralNetworksModel_addOperand}. 2200 * 2201 * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been 2202 * called will return an error. 2203 * 2204 * See {@link ANeuralNetworksModel} for information on multithreaded usage. 2205 * 2206 */ 2207 int ANeuralNetworksModel_identifyInputsAndOutputs(ANeuralNetworksModel* model, uint32_t inputCount, 2208 const uint32_t* inputs, uint32_t outputCount, 2209 const uint32_t* outputs); 2210 2211 #if __ANDROID_API__ >= __ANDROID_API_P__ 2212 /** 2213 * Specifies whether {@link ANEURALNETWORKS_TENSOR_FLOAT32} is allowed to be 2214 * calculated with range and/or precision as low as that of the IEEE 754 16-bit 2215 * floating-point format. By default, {@link ANEURALNETWORKS_TENSOR_FLOAT32} 2216 * must be calculated using at least the range and precision of the IEEE 754 2217 * 32-bit floating-point format. 2218 * 2219 * @param model The model to be modified. 2220 * @param allow 'true' indicates {@link ANEURALNETWORKS_TENSOR_FLOAT32} may be 2221 * calculated with range and/or precision as low as that of the 2222 * IEEE 754 16-bit floating point format. 'false' indicates 2223 * {@link ANEURALNETWORKS_TENSOR_FLOAT32} must be calculated using 2224 * at least the range and precision of the IEEE 754 32-bit floating 2225 * point format. 2226 * 2227 * Attempting to modify a model once {@link ANeuralNetworksModel_finish} has been 2228 * called will return an error. 2229 * 2230 * See {@link ANeuralNetworksModel} for information on multithreaded usage. 2231 */ 2232 int ANeuralNetworksModel_relaxComputationFloat32toFloat16(ANeuralNetworksModel* model, bool allow); 2233 #endif // __ANDROID_API__ >= __ANDROID_API_P__ 2234 2235 /** 2236 * Create a {@link ANeuralNetworksCompilation} to compile the given model. 2237 * 2238 * <p>This only creates the object. Compilation is only performed once 2239 * {@link ANeuralNetworksCompilation_finish} is invoked.</p> 2240 * 2241 * <p>{@link ANeuralNetworksCompilation_finish} should be called once 2242 * all desired properties have been set on the compilation.</p> 2243 * 2244 * <p>{@link ANeuralNetworksModel_free} should be called once the compilation 2245 * is no longer needed.</p> 2246 * 2247 * <p>The provided model must outlive the compilation.</p> 2248 * 2249 * The model must already have been finished by a call to 2250 * {@link ANeuralNetworksModel_finish}. 2251 * 2252 * See {@link ANeuralNetworksCompilation} for information on multithreaded usage. 2253 * 2254 * @param model The {@link ANeuralNetworksModel} to be compiled. 2255 * @param compilation The newly created object or NULL if unsuccessful. 2256 * 2257 * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA 2258 * if the model is invalid. 2259 */ 2260 int ANeuralNetworksCompilation_create(ANeuralNetworksModel* model, 2261 ANeuralNetworksCompilation** compilation); 2262 2263 /** 2264 * Destroy a compilation. 2265 * 2266 * The compilation need not have been finished by a call to 2267 * {@link ANeuralNetworksModel_finish}. 2268 * 2269 * See {@link ANeuralNetworksCompilation} for information on multithreaded usage. 2270 * 2271 * @param compilation The compilation to be destroyed. Passing NULL is acceptable and 2272 * results in no operation. 2273 */ 2274 void ANeuralNetworksCompilation_free(ANeuralNetworksCompilation* compilation); 2275 2276 /** 2277 * Sets the execution preference. 2278 * 2279 * <p>Provides guidance to the runtime when trade-offs are possible.</p> 2280 * 2281 * See {@link ANeuralNetworksCompilation} for information on multithreaded usage. 2282 * 2283 * @param compilation The compilation to be modified. 2284 * @param preference Either {@link PREFER_LOW_POWER}, 2285 * {@link PREFER_SINGLE_FAST_ANSWER}, or 2286 * {@link PREFER_SUSTAINED_SPEED}. 2287 * 2288 * @return ANEURALNETWORKS_NO_ERROR if successful. 2289 */ 2290 int ANeuralNetworksCompilation_setPreference(ANeuralNetworksCompilation* compilation, 2291 int32_t preference); 2292 2293 /** 2294 * Indicate that we have finished modifying a compilation. Required before 2295 * calling {@link ANeuralNetworksExecution_create}. 2296 * 2297 * An application is responsible to make sure that no other thread uses 2298 * the compilation at the same time. 2299 * 2300 * This function must only be called once for a given compilation. 2301 * 2302 * See {@link ANeuralNetworksCompilation} for information on multithreaded usage. 2303 * 2304 * @param compilation The compilation to be finished. 2305 * 2306 * @return ANEURALNETWORKS_NO_ERROR if successful. 2307 */ 2308 int ANeuralNetworksCompilation_finish(ANeuralNetworksCompilation* compilation); 2309 2310 /** 2311 * Create a {@link ANeuralNetworksExecution} to apply the given compilation. 2312 * This only creates the object. Computation is only performed once 2313 * {@link ANeuralNetworksExecution_startCompute} is invoked. 2314 * 2315 * <p>The provided compilation must outlive the execution.</p> 2316 * 2317 * See {@link ANeuralNetworksExecution} for information on multithreaded usage. 2318 * 2319 * @param compilation The {@link ANeuralNetworksCompilation} to be evaluated. 2320 * @param execution The newly created object or NULL if unsuccessful. 2321 * 2322 * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA 2323 * if the compilation is invalid. 2324 */ 2325 int ANeuralNetworksExecution_create(ANeuralNetworksCompilation* compilation, 2326 ANeuralNetworksExecution** execution); 2327 2328 /** 2329 * Destroy an execution. 2330 * 2331 * <p>If called on an execution for which 2332 * {@link ANeuralNetworksExecution_startCompute} has been called, the 2333 * function will return immediately but will mark the execution to be deleted 2334 * once the computation completes. The related {@link ANeuralNetworksEvent} 2335 * will be signaled and the {@link ANeuralNetworksEvent_wait} will return 2336 * ANEURALNETWORKS_ERROR_DELETED. 2337 * 2338 * See {@link ANeuralNetworksExecution} for information on multithreaded usage. 2339 * 2340 * @param execution The execution to be destroyed. Passing NULL is acceptable and 2341 * results in no operation. 2342 */ 2343 void ANeuralNetworksExecution_free(ANeuralNetworksExecution* execution); 2344 2345 /** 2346 * Associate a user buffer with an input of the model of the 2347 * {@link ANeuralNetworksExecution}. 2348 * 2349 * <p>The provided buffer must outlive the execution.</p> 2350 * 2351 * If the input is optional, you can indicate that it is omitted by 2352 * passing nullptr for buffer and 0 for length. 2353 * 2354 * See {@link ANeuralNetworksExecution} for information on multithreaded usage. 2355 * 2356 * @param execution The execution to be modified. 2357 * @param index The index of the input argument we are setting. It is 2358 * an index into the lists passed to 2359 * {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not 2360 * the index associated with 2361 * {@link ANeuralNetworksModel_addOperand}. 2362 * @param type The {@link ANeuralNetworksOperandType} of the 2363 * operand. Unless the input is omitted, this should be 2364 * used to specify the dimensions that were left 2365 * unspecified when the operand was added to the 2366 * model. All other properties of the type must be the 2367 * same as specified in the model. If the type is the same 2368 * as specified when the model was built, NULL can be 2369 * passed. 2370 * @param buffer The buffer containing the data. 2371 * @param length The length in bytes of the buffer. 2372 * 2373 * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if the 2374 * name is not recognized or the buffer is too small for the input. 2375 */ 2376 int ANeuralNetworksExecution_setInput(ANeuralNetworksExecution* execution, int32_t index, 2377 const ANeuralNetworksOperandType* type, const void* buffer, 2378 size_t length); 2379 2380 /** 2381 * Associate part of a memory object with an input of the model of the 2382 * {@link ANeuralNetworksExecution}. 2383 * 2384 * <p>The provided memory must outlive the execution.</p> 2385 * 2386 * If the input is optional, you can indicate that it is omitted by 2387 * using {@link ANeuralNetworks_setInput} instead, passing nullptr for buffer 2388 * and 0 for length. 2389 * 2390 * See {@link ANeuralNetworksExecution} for information on multithreaded usage. 2391 * 2392 * @param execution The execution to be modified. 2393 * @param index The index of the input argument we are setting. It is 2394 * an index into the lists passed to 2395 * {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not 2396 * the index associated with {@link ANeuralNetworksModel_addOperand}. 2397 * @param type The {@link ANeuralNetworksOperandType} of the 2398 * operand. This should be used to specify the dimensions 2399 * that were left unspecified when the operand was added 2400 * to the model. All other properties of the type must be 2401 * the same as specified in the model. If the type is the 2402 * same as specified when the model was built, NULL can be 2403 * passed. 2404 * @param memory The memory containing the data. 2405 * @param offset This specifies the location of the data within the memory. 2406 * The offset is in bytes from the start of memory. 2407 * @param length The size in bytes of the data value. 2408 * 2409 * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if the 2410 * name is not recognized or the buffer is too small for the input. 2411 */ 2412 int ANeuralNetworksExecution_setInputFromMemory(ANeuralNetworksExecution* execution, int32_t index, 2413 const ANeuralNetworksOperandType* type, 2414 const ANeuralNetworksMemory* memory, size_t offset, 2415 size_t length); 2416 2417 /** 2418 * Associate a user buffer with an output of the model of the 2419 * {@link ANeuralNetworksExecution}. 2420 * 2421 * If the output is optional, you can indicate that it is omitted by 2422 * passing nullptr for buffer and 0 for length. 2423 * 2424 * <p>The provided buffer must outlive the execution.</p> 2425 * 2426 * See {@link ANeuralNetworksExecution} for information on multithreaded usage. 2427 * 2428 * @param execution The execution to be modified. 2429 * @param index The index of the output argument we are setting. It is 2430 * an index into the lists passed to 2431 * {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not 2432 * the index associated with {@link ANeuralNetworksModel_addOperand}. 2433 * @param type The {@link ANeuralNetworksOperandType} of the 2434 * operand. Unless the output is omitted, this should be 2435 * used to specify the dimensions that were left 2436 * unspecified when the operand was added to the 2437 * model. All other properties of the type must be the 2438 * same as specified in the model. If the type is the same 2439 * as specified when the model was built, NULL can be 2440 * passed. 2441 * @param buffer The buffer where the data is to be written. 2442 * @param length The length in bytes of the buffer. 2443 * 2444 * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if the 2445 * name is not recognized or the buffer is too small for the output. 2446 */ 2447 int ANeuralNetworksExecution_setOutput(ANeuralNetworksExecution* execution, int32_t index, 2448 const ANeuralNetworksOperandType* type, void* buffer, 2449 size_t length); 2450 2451 /** 2452 * Associate part of a memory object with an output of the model of the 2453 * {@link ANeuralNetworksExecution}. 2454 * 2455 * If the output is optional, you can indicate that it is omitted by 2456 * using {@link ANeuralNetworks_setOutput} instead, passing nullptr for buffer 2457 * and 0 for length. 2458 * 2459 * <p>The provided memory must outlive the execution.</p> 2460 * 2461 * See {@link ANeuralNetworksExecution} for information on multithreaded usage. 2462 * 2463 * @param execution The execution to be modified. 2464 * @param index The index of the output argument we are setting. It is 2465 * an index into the lists passed to 2466 * {@link ANeuralNetworksModel_identifyInputsAndOutputs}. It is not 2467 * the index associated with {@link ANeuralNetworksModel_addOperand}. 2468 * @param type The {@link ANeuralNetworksOperandType} of the operand. This should be 2469 * used to specify the dimensions that were left 2470 * unspecified when the operand was added to the 2471 * model. All other properties of the type must be the 2472 * same as specified in the model. If the type is the same 2473 * as specified when the model was built, NULL can be 2474 * passed. 2475 * @param memory The memory where the data is to be stored. 2476 * @param offset This specifies the location of the data within the memory. 2477 * The offset is in bytes from the start of memory. 2478 * @param length The length in bytes of the data value. 2479 * 2480 * @return ANEURALNETWORKS_NO_ERROR if successful, ANEURALNETWORKS_BAD_DATA if the 2481 * name is not recognized or the buffer is too small for the output. 2482 */ 2483 int ANeuralNetworksExecution_setOutputFromMemory(ANeuralNetworksExecution* execution, int32_t index, 2484 const ANeuralNetworksOperandType* type, 2485 const ANeuralNetworksMemory* memory, size_t offset, 2486 size_t length); 2487 2488 /** 2489 * Schedule evaluation of the execution. 2490 * 2491 * <p>Schedules evaluation of the execution. Once the model has been 2492 * applied and the outputs are ready to be consumed, the returned event will be 2493 * signaled. Use {@link ANeuralNetworksEvent_wait} to wait for that event. 2494 * </p> 2495 * 2496 * Multiple executions can be scheduled and evaluated concurrently. The 2497 * runtime makes no guarantee on the ordering of completion of 2498 * executions. If it's important to the application, the application 2499 * should enforce the ordering by using 2500 * {@link ANeuralNetworksEvent_wait}. 2501 * 2502 * ANeuralNetworksEvent_wait must be called to recuperate the resources used 2503 * by the execution. 2504 * 2505 * See {@link ANeuralNetworksExecution} for information on multithreaded usage. 2506 * 2507 * @param execution The execution to be scheduled and executed. 2508 * @param event The event that will be signaled on completion. event is set to 2509 * NULL if there's an error. 2510 * 2511 * @return ANEURALNETWORKS_NO_ERROR if successful. 2512 */ 2513 int ANeuralNetworksExecution_startCompute(ANeuralNetworksExecution* execution, 2514 ANeuralNetworksEvent** event); 2515 2516 /** 2517 * Waits until the execution completes. 2518 * 2519 * More than one thread can wait on an event. When the execution completes, 2520 * all threads will be released. 2521 * 2522 * See {@link ANeuralNetworksExecution} for information on multithreaded usage. 2523 * 2524 * @return ANEURALNETWORKS_NO_ERROR if the execution completed normally. 2525 */ 2526 int ANeuralNetworksEvent_wait(ANeuralNetworksEvent* event); 2527 2528 /** 2529 * Destroys the event. 2530 * 2531 * See {@link ANeuralNetworksExecution} for information on multithreaded usage. 2532 */ 2533 void ANeuralNetworksEvent_free(ANeuralNetworksEvent* event); 2534 2535 __END_DECLS 2536 2537 #endif // __ANDROID_API__ >= __ANDROID_API_O_MR1__ 2538 2539 #endif // ANDROID_ML_NN_RUNTIME_NEURAL_NETWORKS_H 2540 2541 /** @} */ 2542