| /external/swiftshader/src/Shader/ |
| D | PixelRoutine.cpp | 1585 Int masked = value; in writeColor() local
1603 Int masked = value; in writeColor() local
1662 Short4 masked = value; in writeColor() local
1680 Short4 masked = value; in writeColor() local
1700 …bool masked = (((state.targetFormat[index] == FORMAT_A8B8G8R8 || state.targetFormat[index] == FORM… in writeColor() local
1706 Short4 masked = value; in writeColor() local
1722 Short4 masked = value; in writeColor() local
1801 Short4 masked = value; in writeColor() local
1818 Short4 masked = value; in writeColor() local
1839 Short4 masked = value; in writeColor() local
[all …]
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| /external/rappor/client/java/com/google/android/rappor/ |
| D | Encoder.java | 519 BitSet masked = new BitSet(); in computePermanentRandomizedResponse() local
581 BitSet masked = new BitSet(); in computeInstantaneousRandomizedResponse() local
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| /external/libvncserver/test/ |
| D | cursortest.c | 257 rfbBool masked=(c->mask[(i/8)+maskStride*j]<<(i&7))&0x80; in SetAlphaCursor() local
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| /external/webrtc/webrtc/base/ |
| D | ipaddress.cc | 350 in_addr masked; in TruncateIP() local
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_swizzle.c | 535 LLVMValueRef masked; in lp_build_swizzle_aos() local
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| D | lp_bld_format_aos.c | 226 LLVMValueRef shifted, casted, scaled, masked; in lp_build_unpack_arith_rgba_aos() local
|
| /external/deqp/modules/gles3/functional/ |
| D | es3fDepthStencilClearTests.cpp | 145 …har* description, int numIters, int numClears, bool depth, bool stencil, bool scissor, bool masked) in DepthStencilClearCase()
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| /external/deqp/modules/gles2/functional/ |
| D | es2fDepthStencilClearTests.cpp | 145 …har* description, int numIters, int numClears, bool depth, bool stencil, bool scissor, bool masked) in DepthStencilClearCase()
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| /external/elfutils/libcpu/ |
| D | i386_disasm.c | 427 uint_fast8_t masked = *codep++ & *curr++; in i386_disasm() local
|
| /external/webrtc/webrtc/examples/objc/AppRTCDemo/third_party/SocketRocket/ |
| D | SRWebSocket.m | 68 BOOL masked; field
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_vec4_nir.cpp | 2098 dst_reg masked = dst_reg(this, glsl_type::int_type); in nir_emit_alu() local
|
| D | brw_fs_nir.cpp | 1353 fs_reg masked = vgrf(glsl_type::int_type); in nir_emit_alu() local
|
| /external/pdfium/third_party/base/allocator/partition_allocator/ |
| D | partition_alloc.h | 504 uintptr_t masked = ~reinterpret_cast<uintptr_t>(ptr); in PartitionFreelistMask() local
|
| /external/mesa3d/src/intel/blorp/ |
| D | blorp_blit.c | 279 nir_ssa_def *masked = nir_iand(b, src, nir_imm_int(b, src_mask)); in nir_mask_shift_or() local
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| /external/selinux/libsepol/src/ |
| D | services.c | 850 sepol_access_vector_t masked = 0; in type_attribute_bounds_av() local
|
| /external/kernel-headers/original/uapi/asm-x86/asm/ |
| D | kvm.h | 314 __u8 masked; member
|
| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_lowering_nvc0.cpp | 2490 Value *masked = in handleRDSV() local
|
| /external/v8/src/compiler/ |
| D | wasm-compiler.cc | 1147 int32_t masked = (match.Value() & kMask32); in MaskShiftCount32() local
1163 int64_t masked = (match.Value() & kMask64); in MaskShiftCount64() local
|
| /external/tensorflow/tensorflow/contrib/lite/kernels/internal/reference/ |
| D | reference_ops.h | 2688 inline int StartIndex(int start, int stride, int dim, bool masked) { in StartIndex()
2692 inline int StopIndex(int start, int stop, int stride, int dim, bool masked, in StopIndex()
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| /external/wpa_supplicant_8/wpa_supplicant/ |
| D | config.c | 265 u8 abort_on_error, u8 masked) in wpa_config_parse_addr_list()
|
| /external/webrtc/webrtc/examples/androidapp/third_party/autobanh/ |
| D | autobanh.jar | META-INF/MANIFEST.MF
de/tavendo/autobahn/ByteBufferInputStream.class
ByteBufferInputStream.java
... |
| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_tgsi_vgpu10.c | 1530 struct tgsi_full_dst_register masked = *reg; in writemask_dst() local
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| /external/valgrind/VEX/priv/ |
| D | guest_arm_toIR.c | 1012 IRTemp masked = newTemp(Ity_I32); in put_GEFLAG32() local
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| D | guest_amd64_toIR.c | 30068 IRExpr* masked = binop(mkSizedOp(ty,Iop_And8), in dis_ESC_0F38__VEX() local
|