| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 253 __ mvn(w8, w9); in GenerateTestSequenceBase() local
254 __ mvn(x10, x11); in GenerateTestSequenceBase() local
1290 __ mvn(v13.V16B(), v21.V16B()); in GenerateTestSequenceNEON() local
1291 __ mvn(v28.V8B(), v19.V8B()); in GenerateTestSequenceNEON() local
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| D | test-assembler-aarch64.cc | 414 TEST(mvn) { in TEST() argument
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| /external/vixl/benchmarks/aarch32/ |
| D | asm-disasm-speed-test.cc | 4376 __ mvn(r2, 2147483648U); in Generate_33() local
4438 __ mvn(r4, 3U); in Generate_33() local
4700 __ mvn(r6, 2147483648U); in Generate_35() local
4718 __ mvn(r9, r2); in Generate_36() local
4761 __ mvn(r3, 2147483648U); in Generate_36() local
4783 __ mvn(ip, 23U); in Generate_36() local
4954 __ mvn(r3, 15U); in Generate_37() local
5154 __ mvn(eq, r3, 2147483648U); in Generate_39() local
5170 __ mvn(r1, 2147483648U); in Generate_39() local
5204 __ mvn(r1, 2147483648U); in Generate_39() local
[all …]
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| /external/v8/src/compiler/arm/ |
| D | code-generator-arm.cc | 938 __ mvn(i.OutputRegister(), i.InputOperand2(0), i.OutputSBit()); in AssembleArchInstruction() local
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| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 2044 void Assembler::mvn(const Register& rd, const Operand& operand) { in mvn() function in vixl::aarch64::Assembler
2855 void Assembler::mvn(const VRegister& vd, const VRegister& vn) { in mvn() function in vixl::aarch64::Assembler
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| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 1787 void Assembler::mvn(const Register& rd, const Operand& operand) { in mvn() function in v8::internal::Assembler
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2657 void mvn(Register rd, const Operand& operand) { mvn(al, Best, rd, operand); } in mvn() function
2658 void mvn(Condition cond, Register rd, const Operand& operand) { in mvn() function
2661 void mvn(EncodingSize size, Register rd, const Operand& operand) { in mvn() function
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| D | assembler-aarch32.cc | 7486 void Assembler::mvn(Condition cond, in mvn() function in vixl::aarch32::Assembler
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| D | disasm-aarch32.cc | 1965 void Disassembler::mvn(Condition cond, in mvn() function in vixl::aarch32::Disassembler
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.cpp | 1819 void AssemblerARM32::mvn(const Operand *OpRd, const Operand *OpSrc, in mvn() function in Ice::ARM32::AssemblerARM32
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| /external/v8/src/arm/ |
| D | assembler-arm.cc | 1656 void Assembler::mvn(Register dst, const Operand& src, SBit s, Condition cond) { in mvn() function in v8::internal::Assembler
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| /external/v8/src/crankshaft/arm/ |
| D | lithium-codegen-arm.cc | 1578 __ mvn(result, Operand(left)); in DoBitI() local
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