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Searched defs:operand (Results 1 – 5 of 5) sorted by relevance

/art/disassembler/
Ddisassembler_arm.cc85 DisassemblerStream& operator<<(const MemOperand& operand) OVERRIDE { in operator <<()
99 DisassemblerStream& operator<<(const vixl::aarch32::AlignedMemOperand& operand) OVERRIDE { in operator <<()
/art/compiler/utils/arm/
Dassembler_arm_vixl.h125 void Add(vixl32::Register rd, vixl32::Register rn, const vixl32::Operand& operand) { in Add()
/art/compiler/utils/x86_64/
Dassembler_x86_64.cc2833 void X86_64Assembler::shll(CpuRegister operand, CpuRegister shifter) { in shll()
2838 void X86_64Assembler::shlq(CpuRegister operand, CpuRegister shifter) { in shlq()
2853 void X86_64Assembler::shrl(CpuRegister operand, CpuRegister shifter) { in shrl()
2858 void X86_64Assembler::shrq(CpuRegister operand, CpuRegister shifter) { in shrq()
2868 void X86_64Assembler::sarl(CpuRegister operand, CpuRegister shifter) { in sarl()
2878 void X86_64Assembler::sarq(CpuRegister operand, CpuRegister shifter) { in sarq()
2888 void X86_64Assembler::roll(CpuRegister operand, CpuRegister shifter) { in roll()
2898 void X86_64Assembler::rorl(CpuRegister operand, CpuRegister shifter) { in rorl()
2908 void X86_64Assembler::rolq(CpuRegister operand, CpuRegister shifter) { in rolq()
2918 void X86_64Assembler::rorq(CpuRegister operand, CpuRegister shifter) { in rorq()
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/art/compiler/optimizing/
Dloop_optimization.cc98 /*out*/ HInstruction** operand) { in IsSignExtensionAndGet()
163 /*out*/ HInstruction** operand) { in IsZeroExtensionAndGet()
Dcode_generator_arm_vixl.cc2223 Operand operand(0); in GenerateConditionIntegralOrNonPrimitive() local