1 /* tc-xtensa.h -- Header file for tc-xtensa.c. 2 Copyright (C) 2003-2016 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to the Free 18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 19 02110-1301, USA. */ 20 21 #ifndef TC_XTENSA 22 #define TC_XTENSA 1 23 24 struct fix; 25 26 #ifndef OBJ_ELF 27 #error Xtensa support requires ELF object format 28 #endif 29 30 #include "xtensa-isa.h" 31 #include "xtensa-config.h" 32 33 #define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE 34 35 36 /* Maximum number of opcode slots in a VLIW instruction. */ 37 #define MAX_SLOTS 15 38 39 40 /* For all xtensa relax states except RELAX_DESIRE_ALIGN and 41 RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored 42 in the fr_var field. For the two exceptions, fr_var is a float value 43 that records the frequency with which the following instruction is 44 executed as a branch target. The aligner uses this information to 45 tell which targets are most important to be aligned. */ 46 47 enum xtensa_relax_statesE 48 { 49 RELAX_XTENSA_NONE, 50 51 RELAX_ALIGN_NEXT_OPCODE, 52 /* Use the first opcode of the next fragment to determine the 53 alignment requirements. This is ONLY used for LOOPs currently. */ 54 55 RELAX_CHECK_ALIGN_NEXT_OPCODE, 56 /* The next non-empty frag contains a loop instruction. Check to see 57 if it is correctly aligned, but do not align it. */ 58 59 RELAX_DESIRE_ALIGN_IF_TARGET, 60 /* These are placed in front of labels and converted to either 61 RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before 62 relaxation begins. */ 63 64 RELAX_ADD_NOP_IF_A0_B_RETW, 65 /* These are placed in front of conditional branches. Before 66 relaxation begins, they are turned into either NOPs for branches 67 immediately followed by RETW or RETW.N or rs_fills of 0. This is 68 used to avoid a hardware bug in some early versions of the 69 processor. */ 70 71 RELAX_ADD_NOP_IF_PRE_LOOP_END, 72 /* These are placed after JX instructions. Before relaxation begins, 73 they are turned into either NOPs, if the JX is one instruction 74 before a loop end label, or rs_fills of 0. This is used to avoid a 75 hardware interlock issue prior to Xtensa version T1040. */ 76 77 RELAX_ADD_NOP_IF_SHORT_LOOP, 78 /* These are placed after LOOP instructions and turned into NOPs when: 79 (1) there are less than 3 instructions in the loop; we place 2 of 80 these in a row to add up to 2 NOPS in short loops; or (2) the 81 instructions in the loop do not include a branch or jump. 82 Otherwise they are turned into rs_fills of 0 before relaxation 83 begins. This is used to avoid hardware bug PR3830. */ 84 85 RELAX_ADD_NOP_IF_CLOSE_LOOP_END, 86 /* These are placed after LOOP instructions and turned into NOPs if 87 there are less than 12 bytes to the end of some other loop's end. 88 Otherwise they are turned into rs_fills of 0 before relaxation 89 begins. This is used to avoid hardware bug PR3830. */ 90 91 RELAX_DESIRE_ALIGN, 92 /* The next fragment would like its first instruction to NOT cross an 93 instruction fetch boundary. */ 94 95 RELAX_MAYBE_DESIRE_ALIGN, 96 /* The next fragment might like its first instruction to NOT cross an 97 instruction fetch boundary. These are placed after a branch that 98 might be relaxed. If the branch is relaxed, then this frag will be 99 a branch target and this frag will be changed to RELAX_DESIRE_ALIGN 100 frag. */ 101 102 RELAX_LOOP_END, 103 /* This will be turned into a NOP or NOP.N if the previous instruction 104 is expanded to negate a loop. */ 105 106 RELAX_LOOP_END_ADD_NOP, 107 /* When the code density option is available, this will generate a 108 NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill 109 fragment with a NOP in it. Once a frag has been converted to 110 RELAX_LOOP_END_ADD_NOP, it should never be changed back to 111 RELAX_LOOP_END. */ 112 113 RELAX_LITERAL, 114 /* Another fragment could generate an expansion here but has not yet. */ 115 116 RELAX_LITERAL_NR, 117 /* Expansion has been generated by an instruction that generates a 118 literal. However, the stretch has NOT been reported yet in this 119 fragment. */ 120 121 RELAX_LITERAL_FINAL, 122 /* Expansion has been generated by an instruction that generates a 123 literal. */ 124 125 RELAX_LITERAL_POOL_BEGIN, 126 RELAX_LITERAL_POOL_END, 127 RELAX_LITERAL_POOL_CANDIDATE_BEGIN, 128 /* Technically these are not relaxations at all but mark a location 129 to store literals later. Note that fr_var stores the frchain for 130 BEGIN frags and fr_var stores now_seg for END frags. */ 131 132 RELAX_NARROW, 133 /* The last instruction in this fragment (at->fr_opcode) can be 134 freely replaced with a single wider instruction if a future 135 alignment desires or needs it. */ 136 137 RELAX_IMMED, 138 /* The last instruction in this fragment (at->fr_opcode) contains 139 an immediate or symbol. If the value does not fit, relax the 140 opcode using expansions from the relax table. */ 141 142 RELAX_IMMED_STEP1, 143 /* The last instruction in this fragment (at->fr_opcode) contains a 144 literal. It has already been expanded 1 step. */ 145 146 RELAX_IMMED_STEP2, 147 /* The last instruction in this fragment (at->fr_opcode) contains a 148 literal. It has already been expanded 2 steps. */ 149 150 RELAX_IMMED_STEP3, 151 /* The last instruction in this fragment (at->fr_opcode) contains a 152 literal. It has already been expanded 3 steps. */ 153 154 RELAX_SLOTS, 155 /* There are instructions within the last VLIW instruction that need 156 relaxation. Find the relaxation based on the slot info in 157 xtensa_frag_type. Relaxations that deal with particular opcodes 158 are slot-based (e.g., converting a MOVI to an L32R). Relaxations 159 that deal with entire instructions, such as alignment, are not 160 slot-based. */ 161 162 RELAX_FILL_NOP, 163 /* This marks the location of a pipeline stall. We can fill these guys 164 in for alignment of any size. */ 165 166 RELAX_UNREACHABLE, 167 /* This marks the location as unreachable. The assembler may widen or 168 narrow this area to meet alignment requirements of nearby 169 instructions. */ 170 171 RELAX_MAYBE_UNREACHABLE, 172 /* This marks the location as possibly unreachable. These are placed 173 after a branch that may be relaxed into a branch and jump. If the 174 branch is relaxed, then this frag will be converted to a 175 RELAX_UNREACHABLE frag. */ 176 177 RELAX_ORG, 178 /* This marks the location as having previously been an rs_org frag. 179 rs_org frags are converted to fill-zero frags immediately after 180 relaxation. However, we need to remember where they were so we can 181 prevent the linker from changing the size of any frag between the 182 section start and the org frag. */ 183 184 RELAX_TRAMPOLINE, 185 /* Every few thousand frags, we insert one of these, just in case we may 186 need some space for a trampoline (jump to a jump) because the function 187 has gotten too big. If not needed, it disappears. */ 188 189 RELAX_NONE 190 }; 191 192 /* This is used as a stopper to bound the number of steps that 193 can be taken. */ 194 #define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP3 - RELAX_IMMED) 195 196 struct xtensa_frag_type 197 { 198 /* Info about the current state of assembly, e.g., transform, 199 absolute_literals, etc. These need to be passed to the backend and 200 then to the object file. 201 202 When is_assembly_state_set is false, the frag inherits some of the 203 state settings from the previous frag in this segment. Because it 204 is not possible to intercept all fragment closures (frag_more and 205 frag_append_1_char can close a frag), we use a pass after initial 206 assembly to fill in the assembly states. */ 207 208 unsigned int is_assembly_state_set : 1; 209 unsigned int is_no_density : 1; 210 unsigned int is_no_transform : 1; 211 unsigned int use_longcalls : 1; 212 unsigned int use_absolute_literals : 1; 213 214 /* Inhibits relaxation of machine-dependent alignment frags the 215 first time through a relaxation.... */ 216 unsigned int relax_seen : 1; 217 218 /* Information that is needed in the object file and set when known. */ 219 unsigned int is_literal : 1; 220 unsigned int is_loop_target : 1; 221 unsigned int is_branch_target : 1; 222 unsigned int is_insn : 1; 223 unsigned int is_unreachable : 1; 224 225 unsigned int is_specific_opcode : 1; /* also implies no_transform */ 226 227 unsigned int is_align : 1; 228 unsigned int is_text_align : 1; 229 unsigned int alignment : 5; 230 231 /* A frag with this bit set is the first in a loop that actually 232 contains an instruction. */ 233 unsigned int is_first_loop_insn : 1; 234 235 /* A frag with this bit set is a branch that we are using to 236 align branch targets as if it were a normal narrow instruction. */ 237 unsigned int is_aligning_branch : 1; 238 239 /* For text fragments that can generate literals at relax time, this 240 variable points to the frag where the literal will be stored. For 241 literal frags, this variable points to the nearest literal pool 242 location frag. This literal frag will be moved to after this 243 location. For RELAX_LITERAL_POOL_BEGIN frags, this field points 244 to the frag immediately before the corresponding RELAX_LITERAL_POOL_END 245 frag, to make moving frags for this literal pool efficient. */ 246 fragS *literal_frag; 247 248 /* The destination segment for literal frags. (Note that this is only 249 valid after xtensa_move_literals.) This field is also used for 250 LITERAL_POOL_END frags. */ 251 segT lit_seg; 252 253 /* Frag chain for LITERAL_POOL_BEGIN frags. */ 254 struct frchain *lit_frchain; 255 256 /* For the relaxation scheme, some literal fragments can have their 257 expansions modified by an instruction that relaxes. */ 258 int text_expansion[MAX_SLOTS]; 259 int literal_expansion[MAX_SLOTS]; 260 int unreported_expansion; 261 262 /* For slots that have a free register for relaxation, record that 263 register. */ 264 expressionS free_reg[MAX_SLOTS]; 265 266 /* For text fragments that can generate literals at relax time: */ 267 fragS *literal_frags[MAX_SLOTS]; 268 enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS]; 269 symbolS *slot_symbols[MAX_SLOTS]; 270 offsetT slot_offsets[MAX_SLOTS]; 271 272 /* When marking frags after this one in the chain as no transform, 273 cache the last one in the chain, so that we can skip to the 274 end of the chain. */ 275 fragS *no_transform_end; 276 }; 277 278 279 /* For VLIW support, we need to know what slot a fixup applies to. */ 280 typedef struct xtensa_fix_data_struct 281 { 282 int slot; 283 symbolS *X_add_symbol; 284 offsetT X_add_number; 285 } xtensa_fix_data; 286 287 288 /* Structure to record xtensa-specific symbol information. */ 289 typedef struct xtensa_symfield_type 290 { 291 unsigned int is_loop_target : 1; 292 unsigned int is_branch_target : 1; 293 symbolS *next_expr_symbol; 294 } xtensa_symfield_type; 295 296 297 /* Structure for saving information about a block of property data 298 for frags that have the same flags. The forward reference is 299 in this header file. The actual definition is in tc-xtensa.c. */ 300 struct xtensa_block_info_struct; 301 typedef struct xtensa_block_info_struct xtensa_block_info; 302 303 304 /* Property section types. */ 305 typedef enum 306 { 307 xt_literal_sec, 308 xt_prop_sec, 309 max_xt_sec 310 } xt_section_type; 311 312 typedef struct xtensa_segment_info_struct 313 { 314 fragS *literal_pool_loc; 315 xtensa_block_info *blocks[max_xt_sec]; 316 } xtensa_segment_info; 317 318 319 extern const char *xtensa_target_format (void); 320 extern void xtensa_init_fix_data (struct fix *); 321 extern void xtensa_frag_init (fragS *); 322 extern int xtensa_force_relocation (struct fix *); 323 extern int xtensa_validate_fix_sub (struct fix *); 324 extern void xtensa_frob_label (struct symbol *); 325 extern void xtensa_end (void); 326 extern void xtensa_post_relax_hook (void); 327 extern void xtensa_file_arch_init (bfd *); 328 extern void xtensa_flush_pending_output (void); 329 extern bfd_boolean xtensa_fix_adjustable (struct fix *); 330 extern void xtensa_symbol_new_hook (symbolS *); 331 extern long xtensa_relax_frag (fragS *, long, int *); 332 extern void xtensa_elf_section_change_hook (void); 333 extern int xtensa_unrecognized_line (int); 334 extern bfd_boolean xtensa_check_inside_bundle (void); 335 extern void xtensa_handle_align (fragS *); 336 extern char *xtensa_section_rename (const char *); 337 338 #define TARGET_FORMAT xtensa_target_format () 339 #define TARGET_ARCH bfd_arch_xtensa 340 #define TC_SEGMENT_INFO_TYPE xtensa_segment_info 341 #define TC_SYMFIELD_TYPE struct xtensa_symfield_type 342 #define TC_FIX_TYPE xtensa_fix_data 343 #define TC_INIT_FIX_DATA(x) xtensa_init_fix_data (x) 344 #define TC_FRAG_TYPE struct xtensa_frag_type 345 #define TC_FRAG_INIT(frag) xtensa_frag_init (frag) 346 #define TC_FORCE_RELOCATION(fix) xtensa_force_relocation (fix) 347 #define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \ 348 (! SEG_NORMAL (seg) || xtensa_force_relocation (fix)) 349 #define TC_VALIDATE_FIX_SUB(fix, seg) xtensa_validate_fix_sub (fix) 350 #define NO_PSEUDO_DOT xtensa_check_inside_bundle () 351 #define tc_canonicalize_symbol_name(s) xtensa_section_rename (s) 352 #define tc_canonicalize_section_name(s) xtensa_section_rename (s) 353 #define tc_init_after_args() xtensa_file_arch_init (stdoutput) 354 #define tc_fix_adjustable(fix) xtensa_fix_adjustable (fix) 355 #define tc_frob_label(sym) xtensa_frob_label (sym) 356 #define tc_unrecognized_line(ch) xtensa_unrecognized_line (ch) 357 #define tc_symbol_new_hook(sym) xtensa_symbol_new_hook (sym) 358 #define md_do_align(a,b,c,d,e) xtensa_flush_pending_output () 359 #define md_elf_section_change_hook xtensa_elf_section_change_hook 360 #define md_end xtensa_end 361 #define md_flush_pending_output() xtensa_flush_pending_output () 362 #define md_operand(x) 363 #define TEXT_SECTION_NAME xtensa_section_rename (".text") 364 #define DATA_SECTION_NAME xtensa_section_rename (".data") 365 #define BSS_SECTION_NAME xtensa_section_rename (".bss") 366 #define HANDLE_ALIGN(fragP) xtensa_handle_align (fragP) 367 #define MAX_MEM_FOR_RS_ALIGN_CODE 1 368 369 370 /* The renumber_section function must be mapped over all the sections 371 after calling xtensa_post_relax_hook. That function is static in 372 write.c so it cannot be called from xtensa_post_relax_hook itself. */ 373 374 #define md_post_relax_hook \ 375 do \ 376 { \ 377 int i = 0; \ 378 xtensa_post_relax_hook (); \ 379 bfd_map_over_sections (stdoutput, renumber_sections, &i); \ 380 } \ 381 while (0) 382 383 384 /* Because xtensa relaxation can insert a new literal into the middle of 385 fragment and thus require re-running the relaxation pass on the 386 section, we need an explicit flag here. We explicitly use the name 387 "stretched" here to avoid changing the source code in write.c. */ 388 389 #define md_relax_frag(segment, fragP, stretch) \ 390 xtensa_relax_frag (fragP, stretch, &stretched) 391 392 /* Only allow call frame debug info optimization when linker relaxation is 393 not enabled as otherwise we could generate the DWARF directives without 394 the relocs necessary to patch them up. */ 395 #define md_allow_eh_opt (linkrelax == 0) 396 397 #define LOCAL_LABELS_FB 1 398 #define WORKING_DOT_WORD 1 399 #define DOUBLESLASH_LINE_COMMENTS 400 #define TC_HANDLES_FX_DONE 401 #define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0 402 #define TC_LINKRELAX_FIXUP(SEG) 0 403 #define MD_APPLY_SYM_VALUE(FIX) 0 404 #define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0 405 406 /* Use line number format that is amenable to linker relaxation. */ 407 #define DWARF2_USE_FIXED_ADVANCE_PC (linkrelax != 0) 408 409 410 /* Resource reservation info functions. */ 411 412 /* Returns the number of copies of a particular unit. */ 413 typedef int (*unit_num_copies_func) (void *, xtensa_funcUnit); 414 415 /* Returns the number of units the opcode uses. */ 416 typedef int (*opcode_num_units_func) (void *, xtensa_opcode); 417 418 /* Given an opcode and an index into the opcode's funcUnit list, 419 returns the unit used for the index. */ 420 typedef int (*opcode_funcUnit_use_unit_func) (void *, xtensa_opcode, int); 421 422 /* Given an opcode and an index into the opcode's funcUnit list, 423 returns the cycle during which the unit is used. */ 424 typedef int (*opcode_funcUnit_use_stage_func) (void *, xtensa_opcode, int); 425 426 /* The above typedefs parameterize the resource_table so that the 427 optional scheduler doesn't need its own resource reservation system. 428 429 For simple resource checking, which is all that happens normally, 430 the functions will be as follows (with some wrapping to make the 431 interface more convenient): 432 433 unit_num_copies_func = xtensa_funcUnit_num_copies 434 opcode_num_units_func = xtensa_opcode_num_funcUnit_uses 435 opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit 436 opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage 437 438 Of course the optional scheduler has its own reservation table 439 and functions. */ 440 441 int opcode_funcUnit_use_unit (void *, xtensa_opcode, int); 442 int opcode_funcUnit_use_stage (void *, xtensa_opcode, int); 443 444 typedef struct 445 { 446 void *data; 447 int cycles; 448 int allocated_cycles; 449 int num_units; 450 unit_num_copies_func unit_num_copies; 451 opcode_num_units_func opcode_num_units; 452 opcode_funcUnit_use_unit_func opcode_unit_use; 453 opcode_funcUnit_use_stage_func opcode_unit_stage; 454 unsigned char **units; 455 } resource_table; 456 457 resource_table *new_resource_table 458 (void *, int, int, unit_num_copies_func, opcode_num_units_func, 459 opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func); 460 void resize_resource_table (resource_table *, int); 461 void clear_resource_table (resource_table *); 462 bfd_boolean resources_available (resource_table *, xtensa_opcode, int); 463 void reserve_resources (resource_table *, xtensa_opcode, int); 464 void release_resources (resource_table *, xtensa_opcode, int); 465 466 #endif /* TC_XTENSA */ 467