1 /****************************************************************************** 2 * * 3 * Copyright (C) 2018 The Android Open Source Project 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ***************************************************************************** 18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore 19 */ 20 #ifndef IXHEAACD_CONFIG_H 21 #define IXHEAACD_CONFIG_H 22 23 #define USAC_MAX_ELEMENTS (16) 24 25 #define USAC_MAX_CONFIG_EXTENSIONS (16) 26 27 #define ID_USAC_SCE 0 28 #define ID_USAC_CPE 1 29 #define ID_USAC_LFE 2 30 #define ID_USAC_EXT 3 31 #define ID_USAC_INVALID 0xFF 32 33 #define USAC_SBR_RATIO_NO_SBR 0 34 #define USAC_SBR_RATIO_INDEX_2_1 1 35 #define USAC_SBR_RATIO_INDEX_8_3 2 36 #define USAC_SBR_RATIO_INDEX_4_1 3 37 38 #define USAC_OUT_FRAMELENGTH_768 768 39 #define USAC_OUT_FRAMELENGTH_1024 1024 40 #define USAC_OUT_FRAMELENGTH_2048 2048 41 #define USAC_OUT_FRAMELENGTH_4096 4096 42 43 #define ID_EXT_ELE_FILL 0 44 #define ID_EXT_ELE_MPEGS 1 45 #define ID_EXT_ELE_SAOC 2 46 #define ID_EXT_ELE_AUDIOPREROLL 3 47 #define ID_EXT_ELE_UNI_DRC 4 48 49 #define ID_CONFIG_EXT_FILL 0 50 #define ID_CONFIG_EXT_LOUDNESS_INFO (2) 51 52 typedef UWORD8 UINT8; 53 typedef UWORD32 UINT32; 54 55 typedef struct { 56 UINT32 harmonic_sbr; 57 UINT32 bs_inter_tes; 58 UINT32 bs_pvc; 59 WORD16 dflt_start_freq; 60 WORD16 dflt_stop_freq; 61 WORD16 dflt_header_extra1; 62 WORD16 dflt_header_extra2; 63 WORD16 dflt_freq_scale; 64 WORD16 dflt_alter_scale; 65 WORD16 dflt_noise_bands; 66 WORD16 dflt_limiter_bands; 67 WORD16 dflt_limiter_gains; 68 WORD16 dflt_interpol_freq; 69 WORD16 dflt_smoothing_mode; 70 } ia_usac_dec_sbr_config_struct; 71 72 typedef struct { 73 UINT32 bs_freq_res; 74 UINT32 bs_fixed_gain_dmx; 75 UINT32 bs_temp_shape_config; 76 UINT32 bs_decorr_config; 77 UINT32 bs_high_rate_mode; 78 UINT32 bs_phase_coding; 79 UINT32 bs_ott_bands_phase_present; 80 UINT32 bs_ott_bands_phase; 81 UINT32 bs_residual_bands; 82 UINT32 bs_pseudo_lr; 83 UINT32 bs_env_quant_mode; 84 } ia_usac_dec_mps_config_struct; 85 86 #define BS_OUTPUT_CHANNEL_POS_NA -1 /* n/a */ 87 #define BS_OUTPUT_CHANNEL_POS_L 0 /* Left Front */ 88 #define BS_OUTPUT_CHANNEL_POS_R 1 /* Right Front */ 89 #define BS_OUTPUT_CHANNEL_POS_C 2 /* Center Front */ 90 #define BS_OUTPUT_CHANNEL_POS_LFE 3 /* Low Frequency Enhancement */ 91 #define BS_OUTPUT_CHANNEL_POS_LS 4 /* Left Surround */ 92 #define BS_OUTPUT_CHANNEL_POS_RS 5 /* Right Surround */ 93 #define BS_OUTPUT_CHANNEL_POS_LC 6 /* Left Front Center */ 94 #define BS_OUTPUT_CHANNEL_POS_RC 7 /* Right Front Center */ 95 #define BS_OUTPUT_CHANNEL_POS_LSR 8 /* Rear Surround Left */ 96 #define BS_OUTPUT_CHANNEL_POS_RSR 9 /* Rear Surround Right */ 97 #define BS_OUTPUT_CHANNEL_POS_CS 10 /* Rear Center */ 98 #define BS_OUTPUT_CHANNEL_POS_LSD 11 /* Left Surround Direct */ 99 #define BS_OUTPUT_CHANNEL_POS_RSD 12 /* Right Surround Direct */ 100 #define BS_OUTPUT_CHANNEL_POS_LSS 13 /* Left Side Surround */ 101 #define BS_OUTPUT_CHANNEL_POS_RSS 14 /* Right Side Surround */ 102 #define BS_OUTPUT_CHANNEL_POS_LW 15 /* Left Wide Front */ 103 #define BS_OUTPUT_CHANNEL_POS_RW 16 /* Right Wide Front */ 104 #define BS_OUTPUT_CHANNEL_POS_LV 17 /* Left Front Vertical Height */ 105 #define BS_OUTPUT_CHANNEL_POS_RV 18 /* Right Front Vertical Height */ 106 #define BS_OUTPUT_CHANNEL_POS_CV 19 /* Center Front Vertical Height */ 107 #define BS_OUTPUT_CHANNEL_POS_LVR 20 /* Left Surround Vertical Height Rear */ 108 #define BS_OUTPUT_CHANNEL_POS_RVR 21 /* Right Surround Vertical Height Rear */ 109 #define BS_OUTPUT_CHANNEL_POS_CVR 22 /* Center Vertical Height Rear */ 110 #define BS_OUTPUT_CHANNEL_POS_LVSS 23 /* Left Vertical Height Side Surround */ 111 #define BS_OUTPUT_CHANNEL_POS_RVSS \ 112 24 /* Right Vertical Height Side Surround \ \ \ 113 */ 114 #define BS_OUTPUT_CHANNEL_POS_TS 25 /* Top Center Surround */ 115 #define BS_OUTPUT_CHANNEL_POS_LFE2 26 /* Low Frequency Enhancement 2 */ 116 #define BS_OUTPUT_CHANNEL_POS_LB 27 /* Left Front Vertical Bottom */ 117 #define BS_OUTPUT_CHANNEL_POS_RB 28 /* Right Front Vertical Bottom */ 118 #define BS_OUTPUT_CHANNEL_POS_CB 29 /* Center Front Vertical Bottom */ 119 #define BS_OUTPUT_CHANNEL_POS_LVS 30 /* Left Vertical Height Surround */ 120 #define BS_OUTPUT_CHANNEL_POS_RVS 31 /* Right Vertical Height Surround */ 121 122 #define BS_MAX_NUM_OUT_CHANNELS (255) 123 124 #define EXT_COUNT_MAX (2) 125 #define MAX_CHANNEL_COUNT (128) 126 #define SEQUENCE_COUNT_MAX (24) 127 #define PARAM_DRC_TYPE_FF_NODE_COUNT_MAX (9) 128 #define PARAM_DRC_INSTRUCTIONS_COUNT_MAX (8) 129 #define DOWNMIX_ID_COUNT_MAX (8) 130 #define DRC_SET_ID_COUNT_MAX (16) 131 #define EQ_SET_ID_COUNT_MAX (8) 132 #define LOUD_EQ_GAIN_SEQUENCE_COUNT_MAX (4) 133 #define LOUD_EQ_INSTRUCTIONS_COUNT_MAX (8) 134 #define FILTER_ELEMENT_COUNT_MAX (16) 135 #define FILTER_BLOCK_COUNT_MAX (16) 136 #define REAL_ZERO_RADIUS_ONE_COUNT_MAX (14) 137 #define REAL_ZERO_COUNT_MAX (64) 138 #define COMPLEX_ZERO_COUNT_MAX (64) 139 #define REAL_POLE_COUNT_MAX (16) 140 #define COMPLEX_POLE_COUNT_MAX (16) 141 #define FIR_ORDER_MAX (128) 142 #define EQ_NODE_COUNT_MAX (33) 143 #define UNIQUE_SUBBAND_GAIN_COUNT_MAX (16) 144 #define EQ_SUBBAND_GAIN_COUNT_MAX (135) 145 #define EQ_CHANNEL_GROUP_COUNT_MAX (4) 146 #define EQ_FILTER_BLOCK_COUNT_MAX (4) 147 #define EQ_INSTRUCTIONS_COUNT_MAX (8) 148 #define DRC_COEFF_COUNT_MAX (8) 149 #define DOWNMIX_INSTRUCTION_COUNT_MAX (16) 150 #define DRC_INSTRUCTIONS_COUNT_MAX (DOWNMIX_INSTRUCTION_COUNT_MAX + 20) 151 #define BAND_COUNT_MAX (8) 152 153 #define N_DELTA_TIME_CODE_TABLE_ENTRIES_MAX (512 + 14) 154 #define GAIN_SET_COUNT_MAX SEQUENCE_COUNT_MAX 155 #define SPLIT_CHARACTERISTIC_NODE_COUNT_MAX (4) 156 #define SPLIT_CHARACTERISTIC_COUNT_MAX (8) 157 #define SHAPE_FILTER_COUNT_MAX (8) 158 #define CHANNEL_GROUP_COUNT_MAX SEQUENCE_COUNT_MAX 159 #define DRC_BAND_COUNT_MAX BAND_COUNT_MAX 160 #define SPEAKER_POS_COUNT_MAX (128) 161 #define DOWNMIX_COEFF_COUNT_MAX (32 * 32) 162 163 typedef struct { 164 UINT32 tw_mdct; 165 UINT32 noise_filling; 166 UINT32 stereo_config_index; 167 168 UINT32 usac_ext_eleme_def_len; 169 UINT32 usac_ext_elem_pld_frag; 170 171 ia_usac_dec_sbr_config_struct str_usac_sbr_config; 172 ia_usac_dec_mps_config_struct str_usac_mps212_config; 173 174 } ia_usac_dec_element_config_struct; 175 176 typedef struct { 177 UWORD32 num_elements; 178 UWORD32 num_config_extensions; 179 UWORD32 usac_element_type[USAC_MAX_ELEMENTS]; 180 ia_usac_dec_element_config_struct str_usac_element_config[USAC_MAX_ELEMENTS]; 181 182 WORD32 usac_cfg_ext_info_present[USAC_MAX_CONFIG_EXTENSIONS]; 183 WORD32 usac_ext_ele_payload_present[USAC_MAX_ELEMENTS]; 184 WORD32 usac_cfg_ext_info_len[USAC_MAX_CONFIG_EXTENSIONS]; 185 WORD32 usac_ext_ele_payload_len[USAC_MAX_ELEMENTS]; 186 WORD32 usac_ext_gain_payload_len; 187 UWORD8 usac_cfg_ext_info_buf[USAC_MAX_CONFIG_EXTENSIONS][768]; 188 UWORD8 usac_ext_ele_payload_buf[USAC_MAX_ELEMENTS][768]; 189 UWORD8 usac_ext_gain_payload_buf[768]; 190 191 WORD32 preroll_flag; 192 193 } ia_usac_decoder_config_struct; 194 195 typedef struct { 196 UINT32 usac_sampling_frequency_index; 197 UINT32 usac_sampling_frequency; 198 UINT32 core_sbr_framelength_index; 199 UINT32 channel_configuration_index; 200 201 UINT32 num_out_channels; 202 UINT32 output_channel_pos[BS_MAX_NUM_OUT_CHANNELS]; 203 ia_usac_decoder_config_struct str_usac_dec_config; 204 205 } ia_usac_config_struct; 206 207 typedef struct { 208 WORD32 parametric_lim_threshold_present; 209 FLOAT32 parametric_lim_threshold; 210 WORD32 parametric_lim_attack; 211 WORD32 parametric_lim_release_present; 212 WORD32 parametric_lim_release; 213 WORD32 drc_characteristic; 214 215 WORD32 disable_paramteric_drc; 216 } ia_parametric_drc_lim_struct; 217 typedef struct { 218 WORD32 level_estim_k_weighting_type; 219 WORD32 level_estim_integration_time_present; 220 WORD32 level_estim_integration_time; 221 WORD32 drc_curve_definition_type; 222 WORD32 drc_characteristic; 223 WORD32 node_count; 224 WORD32 node_level[PARAM_DRC_TYPE_FF_NODE_COUNT_MAX]; 225 WORD32 node_gain[PARAM_DRC_TYPE_FF_NODE_COUNT_MAX]; 226 WORD32 drc_gain_smooth_parameters_present; 227 WORD32 gain_smooth_attack_time_slow; 228 WORD32 gain_smooth_release_time_slow; 229 WORD32 gain_smooth_time_fast_present; 230 WORD32 gain_smooth_attack_time_fast; 231 WORD32 gain_smooth_release_time_fast; 232 WORD32 gain_smooth_threshold_present; 233 WORD32 gain_smooth_attack_threshold; 234 WORD32 gain_smooth_rel_threshold; 235 WORD32 gain_smooth_hold_off_count_present; 236 WORD32 gain_smooth_hold_off; 237 238 WORD32 disable_paramteric_drc; 239 } ia_parametric_drc_type_feed_forward_struct; 240 typedef struct { 241 WORD32 parametric_drc_id; 242 WORD32 parametric_drc_look_ahead_flag; 243 WORD32 parametric_drc_look_ahead; 244 WORD32 parametric_drc_preset_id_present; 245 WORD32 parametric_drc_preset_id; 246 WORD32 parametric_drc_type; 247 WORD32 len_bit_size; 248 ia_parametric_drc_type_feed_forward_struct 249 str_parametric_drc_type_feed_forward; 250 ia_parametric_drc_lim_struct parametric_drc_lim; 251 252 WORD32 drc_characteristic; 253 WORD32 disable_paramteric_drc; 254 } ia_parametric_drc_instructions_struct; 255 256 typedef struct { 257 WORD32 parametric_drc_id; 258 WORD32 side_chain_config_type; 259 WORD32 downmix_id; 260 WORD32 level_estim_channel_weight_format; 261 FLOAT32 level_estim_ch_weight[MAX_CHANNEL_COUNT]; 262 WORD32 drc_input_loudness_present; 263 FLOAT32 drc_input_loudness; 264 265 WORD32 ch_count_from_dwnmix_id; 266 } ia_parametric_drc_gain_set_params_struct; 267 268 typedef struct { 269 WORD32 drc_location; 270 WORD32 parametric_drc_frame_size_format; 271 WORD32 parametric_drc_frame_size; 272 WORD32 parametric_drc_delay_max_present; 273 WORD32 parametric_drc_delay_max; 274 WORD32 reset_parametric_drc; 275 WORD32 parametric_drc_gain_set_count; 276 ia_parametric_drc_gain_set_params_struct 277 str_parametric_drc_gain_set_params[SEQUENCE_COUNT_MAX]; 278 } ia_drc_coeff_parametric_drc_struct; 279 280 typedef struct { 281 WORD32 loud_eq_set_id; 282 WORD32 drc_location; 283 WORD32 dwnmix_id_count; 284 WORD32 downmix_id[DOWNMIX_ID_COUNT_MAX]; 285 WORD32 drc_set_id_count; 286 WORD32 drc_set_id[DRC_SET_ID_COUNT_MAX]; 287 WORD32 eq_set_id_count; 288 WORD32 eq_set_id[EQ_SET_ID_COUNT_MAX]; 289 WORD32 loudness_after_drc; 290 WORD32 loudness_after_eq; 291 WORD32 loud_eq_gain_sequence_count; 292 WORD32 gain_seq_idx[LOUD_EQ_GAIN_SEQUENCE_COUNT_MAX]; 293 WORD32 drc_characteristic_format_is_cicp[LOUD_EQ_GAIN_SEQUENCE_COUNT_MAX]; 294 WORD32 drc_characteristic[LOUD_EQ_GAIN_SEQUENCE_COUNT_MAX]; 295 WORD32 drc_characteristic_left_index[LOUD_EQ_GAIN_SEQUENCE_COUNT_MAX]; 296 WORD32 drc_characteristic_right_index[LOUD_EQ_GAIN_SEQUENCE_COUNT_MAX]; 297 WORD32 frequency_range_index[LOUD_EQ_GAIN_SEQUENCE_COUNT_MAX]; 298 FLOAT32 loud_eq_scaling[LOUD_EQ_GAIN_SEQUENCE_COUNT_MAX]; 299 FLOAT32 loud_eq_offset[LOUD_EQ_GAIN_SEQUENCE_COUNT_MAX]; 300 } ia_loud_eq_instructions_struct; 301 302 typedef struct { 303 WORD32 filt_ele_idx; 304 WORD32 filt_ele_gain_flag; 305 FLOAT32 filt_ele_gain; 306 } ia_filt_ele_struct; 307 308 typedef struct { 309 WORD32 filter_element_count; 310 ia_filt_ele_struct str_filter_element[FILTER_ELEMENT_COUNT_MAX]; 311 } ia_filt_block_struct; 312 313 typedef struct { 314 WORD32 eq_filter_format; 315 WORD32 bs_real_zero_radius_one_count; 316 WORD32 real_zero_count; 317 WORD32 generic_zero_count; 318 WORD32 real_pole_count; 319 WORD32 cmplx_pole_count; 320 WORD32 zero_sign[REAL_ZERO_RADIUS_ONE_COUNT_MAX]; 321 FLOAT32 real_zero_radius[REAL_ZERO_COUNT_MAX]; 322 FLOAT32 generic_zero_radius[COMPLEX_ZERO_COUNT_MAX]; 323 FLOAT32 generic_zero_angle[COMPLEX_ZERO_COUNT_MAX]; 324 FLOAT32 real_pole_radius[REAL_POLE_COUNT_MAX]; 325 FLOAT32 complex_pole_radius[COMPLEX_POLE_COUNT_MAX]; 326 FLOAT32 complex_pole_angle[COMPLEX_POLE_COUNT_MAX]; 327 WORD32 fir_filt_order; 328 WORD32 fir_symmetry; 329 FLOAT32 fir_coeff[FIR_ORDER_MAX / 2]; 330 } ia_unique_td_filt_element; 331 typedef struct { 332 WORD32 num_eq_nodes; 333 FLOAT32 eq_slope[EQ_NODE_COUNT_MAX]; 334 WORD32 eq_freq_delta[EQ_NODE_COUNT_MAX]; 335 FLOAT32 eq_gain_initial; 336 FLOAT32 eq_gain_delta[EQ_NODE_COUNT_MAX]; 337 } ia_eq_subband_gain_spline_struct; 338 typedef struct { 339 FLOAT32 eq_subband_gain[EQ_SUBBAND_GAIN_COUNT_MAX]; 340 } ia_eq_subband_gain_vector; 341 typedef struct { 342 WORD32 eq_delay_max_present; 343 WORD32 eq_delay_max; 344 WORD32 unique_filter_block_count; 345 ia_filt_block_struct str_filter_block[FILTER_BLOCK_COUNT_MAX]; 346 WORD32 unique_td_filter_element_count; 347 ia_unique_td_filt_element unique_td_filt_ele[FILTER_ELEMENT_COUNT_MAX]; 348 WORD32 unique_eq_subband_gains_count; 349 WORD32 eq_subband_gain_representation; 350 WORD32 eq_subband_gain_format; 351 WORD32 eq_subband_gain_count; 352 ia_eq_subband_gain_spline_struct 353 str_eq_subband_gain_spline[UNIQUE_SUBBAND_GAIN_COUNT_MAX]; 354 ia_eq_subband_gain_vector 355 str_eq_subband_gain_vector[UNIQUE_SUBBAND_GAIN_COUNT_MAX]; 356 } ia_eq_coeff_struct; 357 typedef struct { 358 WORD32 filter_block_count; 359 WORD32 filter_block_index[EQ_FILTER_BLOCK_COUNT_MAX]; 360 } ia_filter_block_refs_struct; 361 typedef struct { 362 WORD32 eq_cascade_gain_present[EQ_CHANNEL_GROUP_COUNT_MAX]; 363 FLOAT32 eq_cascade_gain[EQ_CHANNEL_GROUP_COUNT_MAX]; 364 ia_filter_block_refs_struct str_filter_block_refs[EQ_CHANNEL_GROUP_COUNT_MAX]; 365 WORD32 eq_phase_alignment_present; 366 WORD32 eq_phase_alignment[EQ_CHANNEL_GROUP_COUNT_MAX] 367 [EQ_CHANNEL_GROUP_COUNT_MAX]; 368 } ia_td_filter_cascade_struct; 369 370 typedef struct { 371 WORD32 eq_set_id; 372 WORD32 eq_set_complexity_level; 373 WORD32 dwnmix_id_count; 374 WORD32 downmix_id[DOWNMIX_ID_COUNT_MAX]; 375 WORD32 eq_apply_to_downmix; 376 WORD32 drc_set_id_count; 377 WORD32 drc_set_id[DRC_SET_ID_COUNT_MAX]; 378 WORD32 eq_set_purpose; 379 WORD32 depends_on_eq_set_present; 380 WORD32 depends_on_eq_set; 381 WORD32 no_independent_eq_use; 382 WORD32 eq_channel_count; 383 WORD32 eq_ch_group_count; 384 WORD32 eq_ch_group_of_channel[MAX_CHANNEL_COUNT]; 385 WORD32 td_filter_cascade_present; 386 ia_td_filter_cascade_struct str_td_filter_cascade; 387 WORD32 subband_gains_present; 388 WORD32 subband_gains_index[EQ_CHANNEL_GROUP_COUNT_MAX]; 389 WORD32 eq_transition_duration_present; 390 WORD32 eq_transition_duration; 391 } ia_eq_instructions_struct; 392 393 typedef struct { 394 WORD32 drc_config_ext_type[EXT_COUNT_MAX]; 395 WORD32 ext_bit_size[EXT_COUNT_MAX - 1]; 396 397 WORD32 parametric_drc_present; 398 ia_drc_coeff_parametric_drc_struct str_drc_coeff_param_drc; 399 WORD32 parametric_drc_instructions_count; 400 ia_parametric_drc_instructions_struct 401 str_parametric_drc_instructions[PARAM_DRC_INSTRUCTIONS_COUNT_MAX]; 402 WORD32 drc_extension_v1_present; 403 WORD32 loud_eq_instructions_flag; 404 WORD32 loud_eq_instructions_count; 405 ia_loud_eq_instructions_struct 406 loud_eq_instructions[LOUD_EQ_INSTRUCTIONS_COUNT_MAX]; 407 WORD32 eq_flag; 408 ia_eq_coeff_struct str_eq_coeff; 409 WORD32 eq_instructions_count; 410 ia_eq_instructions_struct str_eq_instructions[EQ_INSTRUCTIONS_COUNT_MAX]; 411 } ia_drc_config_ext; 412 413 typedef struct { 414 WORD32 drc_location; 415 WORD32 drc_characteristic; 416 } ia_drc_coefficients_basic_struct; 417 418 typedef struct { 419 WORD32 drc_set_id; 420 WORD32 drc_location; 421 WORD32 dwnmix_id_count; 422 WORD32 downmix_id[DOWNMIX_ID_COUNT_MAX]; 423 WORD32 drc_set_effect; 424 WORD32 limiter_peak_target_present; 425 FLOAT32 limiter_peak_target; 426 WORD32 drc_set_target_loudness_present; 427 WORD32 drc_set_target_loudness_value_upper; 428 WORD32 drc_set_target_loudness_value_lower_present; 429 WORD32 drc_set_target_loudness_value_lower; 430 } ia_drc_instructions_basic_struct; 431 432 typedef struct { 433 WORD32 gain_seq_idx; 434 WORD32 drc_characteristic; 435 WORD32 drc_characteristic_present; 436 WORD32 drc_characteristic_format_is_cicp; 437 WORD32 drc_characteristic_left_index; 438 WORD32 drc_characteristic_right_index; 439 WORD32 crossover_freq_idx; 440 WORD32 start_subband_index; 441 } ia_gain_params_struct; 442 typedef struct { 443 WORD32 size; 444 WORD32 code; 445 WORD32 value; 446 } ia_delta_time_code_table_entry_struct; 447 typedef struct { 448 ia_delta_time_code_table_entry_struct 449 delta_time_code_table[N_DELTA_TIME_CODE_TABLE_ENTRIES_MAX]; 450 } ia_tables_struct; 451 452 typedef struct { 453 WORD32 gain_coding_profile; 454 WORD32 gain_interpolation_type; 455 WORD32 full_frame; 456 WORD32 time_alignment; 457 WORD32 time_delt_min_flag; 458 WORD32 time_delt_min_val; 459 WORD32 band_count; 460 WORD32 drc_band_type; 461 ia_gain_params_struct gain_params[BAND_COUNT_MAX]; 462 463 WORD32 num_gain_max_values; 464 ia_tables_struct str_tables; 465 } ia_gain_set_params_struct; 466 467 typedef struct { 468 WORD32 characteristic_format; 469 FLOAT32 in_out_ratio; 470 FLOAT32 gain; 471 FLOAT32 exp; 472 WORD32 flip_sign; 473 WORD32 characteristic_node_count; 474 FLOAT32 node_level[SPLIT_CHARACTERISTIC_NODE_COUNT_MAX + 1]; 475 FLOAT32 node_gain[SPLIT_CHARACTERISTIC_NODE_COUNT_MAX + 1]; 476 } ia_split_drc_characteristic_struct; 477 478 typedef struct { 479 WORD32 corner_freq_index; 480 WORD32 filter_strength_index; 481 } ia_shape_filter_params_struct; 482 483 typedef struct { 484 WORD32 lf_cut_filter_present; 485 ia_shape_filter_params_struct str_lf_cut_params; 486 WORD32 lf_boost_filter_present; 487 ia_shape_filter_params_struct str_lf_boost_params; 488 WORD32 hf_cut_filter_present; 489 ia_shape_filter_params_struct str_hf_cut_params; 490 WORD32 hf_boost_filter_present; 491 ia_shape_filter_params_struct str_hf_boost_params; 492 } ia_shape_filter_block_params_struct; 493 494 typedef struct { 495 WORD32 version; 496 WORD32 drc_location; 497 WORD32 drc_frame_size_present; 498 WORD32 drc_frame_size; 499 WORD32 gain_set_count; 500 ia_gain_set_params_struct gain_set_params[GAIN_SET_COUNT_MAX]; 501 WORD32 drc_characteristic_left_present; 502 WORD32 characteristic_left_count; 503 ia_split_drc_characteristic_struct 504 str_split_characteristic_left[SPLIT_CHARACTERISTIC_COUNT_MAX]; 505 WORD32 drc_characteristic_right_present; 506 WORD32 characteristic_right_count; 507 ia_split_drc_characteristic_struct 508 str_split_characteristic_right[SPLIT_CHARACTERISTIC_COUNT_MAX]; 509 WORD32 shape_filters_present; 510 WORD32 shape_num_filter; 511 ia_shape_filter_block_params_struct 512 str_shape_filter_block_params[SHAPE_FILTER_COUNT_MAX + 1]; 513 WORD32 gain_sequence_count; 514 WORD32 gain_set_params_index_for_gain_sequence[SEQUENCE_COUNT_MAX]; 515 WORD32 gain_set_count_plus; 516 517 } ia_uni_drc_coeffs_struct; 518 519 typedef struct { 520 WORD32 target_characteristic_left_present[DRC_BAND_COUNT_MAX]; 521 WORD32 target_characteristic_left_index[DRC_BAND_COUNT_MAX]; 522 WORD32 target_characteristic_right_present[DRC_BAND_COUNT_MAX]; 523 WORD32 target_characteristic_right_index[DRC_BAND_COUNT_MAX]; 524 WORD32 shape_filter_flag; 525 WORD32 shape_filter_idx; 526 WORD32 gain_scaling_flag[BAND_COUNT_MAX]; 527 FLOAT32 attn_scaling[BAND_COUNT_MAX]; 528 FLOAT32 ampl_scaling[BAND_COUNT_MAX]; 529 WORD32 gain_offset_flag[BAND_COUNT_MAX]; 530 FLOAT32 gain_offset[BAND_COUNT_MAX]; 531 } ia_gain_modifiers_struct; 532 533 typedef struct { 534 WORD32 ducking_scaling_flag; 535 FLOAT32 ducking_scaling; 536 FLOAT32 ducking_scaling_quantized; 537 } ia_ducking_modifiers_struct; 538 539 typedef struct { 540 WORD32 drc_set_id; 541 WORD32 drc_set_complexity_level; 542 WORD32 requires_eq; 543 WORD32 drc_apply_to_dwnmix; 544 WORD32 drc_location; 545 WORD32 dwnmix_id_count; 546 WORD32 downmix_id[DOWNMIX_ID_COUNT_MAX]; 547 WORD32 depends_on_drc_set_present; 548 WORD32 depends_on_drc_set; 549 WORD32 no_independent_use; 550 WORD32 drc_set_effect; 551 WORD32 gain_set_index[MAX_CHANNEL_COUNT]; 552 ia_gain_modifiers_struct 553 str_gain_modifiers_of_ch_group[CHANNEL_GROUP_COUNT_MAX]; 554 ia_ducking_modifiers_struct 555 str_ducking_modifiers_for_channel[MAX_CHANNEL_COUNT]; 556 WORD32 limiter_peak_target_present; 557 FLOAT32 limiter_peak_target; 558 WORD32 drc_set_target_loudness_present; 559 WORD32 drc_set_target_loudness_value_upper; 560 WORD32 drc_set_target_loudness_value_lower_present; 561 WORD32 drc_set_target_loudness_value_lower; 562 563 WORD32 audio_num_chan; 564 WORD32 num_drc_ch_groups; 565 WORD32 gain_set_index_for_channel_group[CHANNEL_GROUP_COUNT_MAX]; 566 WORD32 band_count_of_ch_group[CHANNEL_GROUP_COUNT_MAX]; 567 WORD32 gain_interpolation_type_for_channel_group[CHANNEL_GROUP_COUNT_MAX]; 568 WORD32 time_delta_min_for_channel_group[CHANNEL_GROUP_COUNT_MAX]; 569 WORD32 time_alignment_for_channel_group[CHANNEL_GROUP_COUNT_MAX]; 570 ia_ducking_modifiers_struct 571 str_ducking_modifiers_for_channel_group[CHANNEL_GROUP_COUNT_MAX]; 572 WORD32 channel_group_of_ch[MAX_CHANNEL_COUNT]; 573 WORD32 num_chan_per_ch_group[CHANNEL_GROUP_COUNT_MAX]; 574 WORD32 gain_element_count; 575 WORD32 multiband_audio_sig_count; 576 WORD32 ch_group_parametric_drc_flag[CHANNEL_GROUP_COUNT_MAX]; 577 WORD32 gain_set_idx_of_ch_group_parametric_drc[CHANNEL_GROUP_COUNT_MAX]; 578 WORD32 parametric_drc_look_ahead_samples[CHANNEL_GROUP_COUNT_MAX]; 579 WORD32 parametric_drc_look_ahead_samples_max; 580 } ia_drc_instructions_struct; 581 582 typedef struct { 583 WORD32 base_channel_count; 584 WORD32 layout_signaling_present; 585 WORD32 defined_layout; 586 WORD32 speaker_position[SPEAKER_POS_COUNT_MAX]; 587 } ia_channel_layout_struct; 588 typedef struct { 589 WORD32 downmix_id; 590 WORD32 target_channel_count; 591 WORD32 target_layout; 592 WORD32 downmix_coefficients_present; 593 FLOAT32 downmix_coefficient[DOWNMIX_COEFF_COUNT_MAX]; 594 } ia_downmix_instructions_struct; 595 typedef struct ia_drc_config { 596 WORD32 sample_rate_present; 597 WORD32 sampling_rate; 598 WORD32 dwnmix_instructions_count; 599 WORD32 drc_coefficients_drc_count; 600 WORD32 drc_instructions_uni_drc_count; 601 WORD32 drc_instructions_count_plus; 602 WORD32 drc_description_basic_present; 603 WORD32 drc_coefficients_basic_count; 604 WORD32 drc_instructions_basic_count; 605 WORD32 drc_config_ext_present; 606 WORD32 apply_drc; 607 ia_drc_config_ext str_drc_config_ext; 608 ia_drc_coefficients_basic_struct 609 str_drc_coefficients_basic[DRC_COEFF_COUNT_MAX]; 610 ia_drc_instructions_basic_struct 611 str_drc_instructions_basic[DRC_INSTRUCTIONS_COUNT_MAX]; 612 ia_uni_drc_coeffs_struct 613 str_p_loc_drc_coefficients_uni_drc[DRC_COEFF_COUNT_MAX]; 614 ia_drc_instructions_struct 615 str_drc_instruction_str[DRC_INSTRUCTIONS_COUNT_MAX]; 616 ia_channel_layout_struct channel_layout; 617 ia_downmix_instructions_struct 618 dwnmix_instructions[DOWNMIX_INSTRUCTION_COUNT_MAX]; 619 } ia_drc_config; 620 621 VOID ixheaacd_conf_default(ia_usac_config_struct *pstr_usac_conf); 622 623 UWORD32 ixheaacd_sbr_ratio(UWORD32 core_sbr_frame_len_idx); 624 625 UWORD32 ixheaacd_sbr_params(UWORD32 core_sbr_frame_len_idx, 626 WORD32 *output_frame_length, WORD32 *block_size, 627 WORD32 *output_samples, WORD32 *sampling_freq, 628 UWORD32 *sample_freq_indx); 629 630 WORD32 ixheaacd_config(ia_bit_buf_struct *bit_buff, 631 ia_usac_config_struct *pstr_usac_conf, UINT32 *chan); 632 633 #endif /* IXHEAACD_CONFIG_H */ 634