1/* bitfield-alias.s Test file for AArch64 bitfield instructions
2   alias mnemonics.
3
4   Copyright (C) 2011-2016 Free Software Foundation, Inc.
5   Contributed by ARM Ltd.
6
7   This file is part of GAS.
8
9   GAS is free software; you can redistribute it and/or modify
10   it under the terms of the GNU General Public License as published by
11   the Free Software Foundation; either version 3 of the license, or
12   (at your option) any later version.
13
14   GAS is distributed in the hope that it will be useful,
15   but WITHOUT ANY WARRANTY; without even the implied warranty of
16   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17   GNU General Public License for more details.
18
19   You should have received a copy of the GNU General Public License
20   along with this program; see the file COPYING3. If not,
21   see <http://www.gnu.org/licenses/>.  */
22
23/* This file tests the GAS's ability in assembling the alias mnemonics
24   of sbfm, bfm and ubfm.  Disassembler should prefer to use alias
25   mnemonics to display {[u|s]}bfm instructions.
26   bitfield-bfm.s and bitfield-alias.s will be assembled into idential
27   binary, which is why the two tests share the same dump match
28   file 'bitfield-dump'.
29   This assembly file is also used for the bitfield-no-aliases test.  */
30
31	// <op>	<Wd>, <Wn>
32	.macro bf_32r op
33	\op	wzr, w7
34	.endm
35
36	// <op>	<Xd>, <Wn>
37	.macro bf_64x op
38	\op	xzr, w7
39	.endm
40
41	// <op>	<Wd>, <Wn>, #<shift>
42	.macro bf_32s op, shift
43	\op	wzr, w7, \shift
44	.endm
45
46	// <op>	<Xd>, <Xn>, #<shift>
47	.macro bf_64s op, shift
48	\op	xzr, x7, \shift
49	.endm
50
51	// <op>	<Wd>, <Wn>, #<lsb>, #<width>
52	.macro bf_32 op, lsb, width
53	\op	wzr, w7, #\lsb, #\width
54	.endm
55
56	// <op>	<Xd>, <Xn>, #<lsb>, #<width>
57	.macro bf_64 op, lsb, width
58	\op	xzr, x7, #\lsb, #\width
59	.endm
60
61.text
62	/*
63	 * extend
64	 */
65
66	bf_32r	sxtb
67	bf_64x	sxtb
68	bf_32r	sxth
69	bf_64x	sxth
70	bf_64x	sxtw
71
72	bf_32r	uxtb
73	bf_64x	uxtb
74	bf_32r	uxth
75	bf_64x	uxth
76	bf_32r	uxtw
77	bf_64x	uxtw
78
79	/*
80	 * shift
81	 */
82
83	.irp	op, asr, lsr, lsl
84	.irp	shift, 0, 16, 31
85	bf_32s	\op, \shift
86	.endr
87	.irp	shift, 0, 31, 63
88	bf_64s	\op, \shift
89	.endr
90	.endr
91
92	/*
93	 * Insert & Extract
94	 */
95
96	.irp	op, sbfiz, sbfx, bfi, bfxil, ubfiz, ubfx
97	bf_32	\op, 0, 1
98	bf_32	\op, 0, 16
99	bf_32	\op, 0, 32
100	bf_32	\op, 16, 1
101	bf_32	\op, 16, 8
102	bf_32	\op, 16, 16
103	bf_32	\op, 31, 1
104
105	bf_64	\op, 0, 1
106	bf_64	\op, 0, 32
107	bf_64	\op, 0, 64
108	bf_64	\op, 32, 1
109	bf_64	\op, 32, 16
110	bf_64	\op, 32, 32
111	bf_64	\op, 63, 1
112	.endr
113