1
2.EXTERN MY_LABEL2;
3.section .text;
4
5//
6//6 CONTROL CODE BIT MANAGEMENT
7//
8
9//CC = Dreg == Dreg ; /* equal, register, signed (a) */
10CC = R7 == R0;
11CC = R6 == R1;
12CC = R0 == R7;
13
14//CC = Dreg == imm3 ; /* equal, immediate, signed (a) */
15CC = R7 == -4;
16CC = R7 == 3;
17CC = R0 == -4;
18CC = R0 == 3;
19
20//CC = Dreg < Dreg ; /* less than, register, signed (a) */
21CC = R7 < R0;
22CC = R6 < R0;
23CC = R7 < R1;
24CC = R1 < R7;
25CC = R0 < R6;
26
27//CC = Dreg < imm3 ; /* less than, immediate, signed (a) */
28CC = R7 < -4;
29CC = R6 < -4;
30CC = R7 < 3;
31CC = R1 < 3;
32
33//CC = Dreg <= Dreg ; /* less than or equal, register, signed (a) */
34CC = R7 <= R0;
35CC = R6 <= R0;
36CC = R7 <= R1;
37CC = R1 <= R7;
38CC = R0 <= R6;
39
40//CC = Dreg <= imm3 ; /* less than or equal, immediate, signed (a) */
41CC = R7 <= -4;
42CC = R6 <= -4;
43CC = R7 <= 3;
44CC = R1 <= 3;
45
46//CC = Dreg < Dreg (IU) ; /* less than, register, unsigned (a) */
47CC = R7 < R0(IU);
48CC = R6 < R0(IU);
49CC = R7 < R1(IU);
50CC = R1 < R7(IU);
51CC = R0 < R6(IU);
52
53//CC = Dreg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */
54CC = R7 < 0(IU);
55CC = R6 < 0(IU);
56CC = R7 < 7(IU);
57CC = R1 < 7(IU);
58//CC = Dreg <= Dreg (IU) ; /* less than or equal, register, unsigned (a) */
59CC = R7 <= R0(IU);
60CC = R6 <= R0(IU);
61CC = R7 <= R1(IU);
62CC = R1 <= R7(IU);
63CC = R0 <= R6(IU);
64
65
66//CC = Dreg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */
67CC = R7 <= 0(IU);
68CC = R6 <= 0(IU);
69CC = R7 <= 7(IU);
70CC = R1 <= 7(IU);
71
72//CC = Preg == Preg ; /* equal, register, signed (a) */
73CC = P5 == P0;
74CC = P5 == P1;
75CC = P0 == P2;
76CC = P3 == P5;
77
78//CC = Preg == imm3 ; /* equal, immediate, signed (a) */
79CC = P5 == -4;
80CC = P5 == 0;
81CC = P5 == 3;
82CC = P2 == -4;
83CC = P2 == 0;
84CC = P2 == 3;
85
86//CC = Preg < Preg ; /* less than, register, signed (a) */
87CC = P5 < P0;
88CC = P5 < P1;
89CC = P0 < P2;
90CC = P3 < P5;
91
92//CC = Preg < imm3 ; /* less than, immediate, signed (a) */
93CC = P5 < -4;
94CC = P5 < 0;
95CC = P5 < 3;
96CC = P2 < -4;
97CC = P2 < 0;
98CC = P2 < 3;
99
100
101//CC = Preg <= Preg ; /* less than or equal, register, signed (a) */
102CC = P5 <= P0;
103CC = P5 <= P1;
104CC = P0 <= P2;
105CC = P3 <= P5;
106
107//CC = Preg <= imm3 ; /* less than or equal, immediate, signed (a) */
108CC = P5 <= -4;
109CC = P5 <= 0;
110CC = P5 <= 3;
111CC = P2 <= -4;
112CC = P2 <= 0;
113CC = P2 <= 3;
114
115//CC = Preg < Preg (IU) ; /* less than, register, unsigned (a) */
116CC = P5 < P0(IU);
117CC = P5 < P1(IU);
118CC = P0 < P2(IU);
119CC = P3 < P5(IU);
120
121//CC = Preg < uimm3 (IU) ; /* less than, immediate, unsigned (a) */
122CC = P5 < 0(IU);
123CC = P5 < 7(IU);
124CC = P2 < 0(IU);
125CC = P2 < 7(IU);
126
127//CC = Preg <= Preg (IU) ; /* less than or equal, register, unsigned (a) */
128CC = P5 <= P0(IU);
129CC = P5 <= P1(IU);
130CC = P0 <= P2(IU);
131CC = P3 <= P5(IU);
132
133//CC = Preg <= uimm3 (IU) ; /* less than or equal, immediate unsigned (a) */
134CC = P5 <= 0(IU);
135CC = P5 <= 7(IU);
136CC = P2 <= 0(IU);
137CC = P2 <= 7(IU);
138
139CC = A0 == A1 ; /* equal, signed (a) */
140CC = A0 < A1 ; /* less than, Accumulator, signed (a) */
141CC = A0 <= A1 ; /* less than or equal, Accumulator, signed (a) */
142
143//Dreg = CC ; /* CC into 32-bit data register, zero-extended (a) */
144R7 = CC;
145R0 = CC;
146
147//statbit = CC ; /* status bit equals CC (a) */
148AZ = CC;
149AN = CC;
150AC0= CC;
151AC1= CC;
152//V  = CC;
153VS = CC;
154AV0= CC;
155AV0S= CC;
156AV1 = CC;
157AV1S= CC;
158AQ  = CC;
159//statbit |= CC ; /* status bit equals status bit OR CC (a) */
160AZ |= CC;
161AN |= CC;
162AC0|= CC;
163AC1|= CC;
164//V  |= CC;
165VS |= CC;
166AV0|= CC;
167AV0S|= CC;
168AV1 |= CC;
169AV1S|= CC;
170AQ  |= CC;
171
172//statbit &= CC ; /* status bit equals status bit AND CC (a) */
173AZ &= CC;
174AN &= CC;
175AC0&= CC;
176AC1&= CC;
177//V  &= CC;
178VS &= CC;
179AV0&= CC;
180AV0S&= CC;
181AV1 &= CC;
182AV1S&= CC;
183AQ  &= CC;
184
185//statbit ^= CC ; /* status bit equals status bit XOR CC (a) */
186
187AZ ^= CC;
188AN ^= CC;
189AC0^= CC;
190AC1^= CC;
191//V  ^= CC;
192VS ^= CC;
193AV0^= CC;
194AV0S^= CC;
195AV1 ^= CC;
196AV1S^= CC;
197AQ  ^= CC;
198//CC = Dreg ; /* CC set if the register is non-zero (a) */
199CC = R7;
200CC = R6;
201CC = R1;
202CC = R0;
203
204
205//CC = statbit ; /* CC equals status bit (a) */
206CC = AZ;
207CC = AN;
208CC = AC0;
209CC = AC1;
210//CC = V;
211CC = VS;
212CC = AV0;
213CC = AV0S;
214CC = AV1;
215CC = AV1S;
216CC = AQ;
217
218//CC |= statbit ; /* CC equals CC OR status bit (a) */
219CC |= AZ;
220CC |= AN;
221CC |= AC0;
222CC |= AC1;
223//CC |= V;
224CC |= VS;
225CC |= AV0;
226CC |= AV0S;
227CC |= AV1;
228CC |= AV1S;
229CC |= AQ;
230
231//CC &= statbit ; /* CC equals CC AND status bit (a) */
232CC &= AZ;
233CC &= AN;
234CC &= AC0;
235CC &= AC1;
236//CC &= V;
237CC &= VS;
238CC &= AV0;
239CC &= AV0S;
240CC &= AV1;
241CC &= AV1S;
242CC &= AQ;
243
244//CC ^= statbit ; /* CC equals CC XOR status bit (a) */
245CC ^= AZ;
246CC ^= AN;
247CC ^= AC0;
248CC ^= AC1;
249//CC ^= V;
250CC ^= VS;
251CC ^= AV0;
252CC ^= AV0S;
253CC ^= AV1;
254CC ^= AV1S;
255CC ^= AQ;
256
257CC = ! CC ; /* (a) */
258