1@c Copyright (C) 2006-2016 Free Software Foundation, Inc. 2@c This is part of the GAS manual. 3@c For copying conditions, see the file as.texinfo. 4 5@ifset GENERIC 6@page 7@node AVR-Dependent 8@chapter AVR Dependent Features 9@end ifset 10 11@ifclear GENERIC 12@node Machine Dependencies 13@chapter AVR Dependent Features 14@end ifclear 15 16@cindex AVR support 17@menu 18* AVR Options:: Options 19* AVR Syntax:: Syntax 20* AVR Opcodes:: Opcodes 21@end menu 22 23@node AVR Options 24@section Options 25@cindex AVR options (none) 26@cindex options for AVR (none) 27 28@table @code 29 30@cindex @code{-mmcu=} command line option, AVR 31@item -mmcu=@var{mcu} 32Specify ATMEL AVR instruction set or MCU type. 33 34Instruction set avr1 is for the minimal AVR core, not supported by the C 35compiler, only for assembler programs (MCU types: at90s1200, 36attiny11, attiny12, attiny15, attiny28). 37 38Instruction set avr2 (default) is for the classic AVR core with up to 398K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343, 40attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534, 41at90s8535). 42 43Instruction set avr25 is for the classic AVR core with up to 8K program memory 44space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313, 45attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84, 46attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny461, 47attiny461a, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88, 48attiny828, at86rf401, ata6289, ata5272). 49 50Instruction set avr3 is for the classic AVR core with up to 128K program 51memory space (MCU types: at43usb355, at76c711). 52 53Instruction set avr31 is for the classic AVR core with exactly 128K program 54memory space (MCU types: atmega103, at43usb320). 55 56Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP 57instructions (MCU types: attiny167, attiny1634, at90usb82, at90usb162, 58atmega8u2, atmega16u2, atmega32u2, ata5505). 59 60Instruction set avr4 is for the enhanced AVR core with up to 8K program 61memory space (MCU types: atmega48, atmega48a, atmega48pa, atmega48p, atmega8, 62atmega8a, atmega88, atmega88a, atmega88p, atmega88pa, atmega8515, atmega8535, 63atmega8hva, at90pwm1, at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81, 64ata6285, ata6286). 65 66Instruction set avr5 is for the enhanced AVR core with up to 128K program 67memory space (MCU types: at90pwm161, atmega16, atmega16a, atmega161, atmega162, 68atmega163, atmega164a, atmega164p, atmega164pa, atmega165, atmega165a, 69atmega165p, atmega165pa, atmega168, atmega168a, atmega168p, atmega168pa, 70atmega169, atmega169a, atmega169p, atmega169pa, atmega32, atmega323, atmega324a, 71atmega324p, atmega324pa, atmega325, atmega325a, atmega32, atmega32a, atmega323, 72atmega324a, atmega324p, atmega324pa, atmega325, atmega325a, atmega325p, 73atmega325p, atmega325pa, atmega3250, atmega3250a, atmega3250p, atmega3250pa, 74atmega328, atmega328p, atmega329, atmega329a, atmega329p, atmega329pa, 75atmega3290a, atmega3290p, atmega3290pa, atmega406, atmega64, atmega64a, 76atmega64rfr2, atmega644rfr2, atmega640, atmega644, atmega644a, atmega644p, 77atmega644pa, atmega645, atmega645a, atmega645p, atmega6450, atmega6450a, 78atmega6450p, atmega649, atmega649a, atmega649p, atmega6490, atmega6490a, 79atmega6490p, atmega16hva, atmega16hva2, atmega16hvb, atmega16hvbrevb, 80atmega32hvb, atmega32hvbrevb, atmega64hve, at90can32, at90can64, at90pwm161, 81at90pwm216, at90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1, 82atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646, at90usb647, at94k, 83at90scr100, ata5790, ata5795). 84 85Instruction set avr51 is for the enhanced AVR core with exactly 128K 86program memory space (MCU types: atmega128, atmega128a, atmega1280, 87atmega1281, atmega1284, atmega1284p, atmega128rfa1, atmega128rfr2, 88atmega1284rfr2, at90can128, at90usb1286, at90usb1287, m3000). 89 90Instruction set avr6 is for the enhanced AVR core with a 3-byte PC 91(MCU types: atmega2560, atmega2561, atmega256rfr2, atmega2564rfr2). 92 93Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K 94program memory space and less than 64K data space (MCU types: 95atxmega16a4, atxmega16a4u, atxmega16c4, atxmega16d4, atxmega16x1, 96atxmega32a4, atxmega32a4u, atxmega32c4, atxmega32d4, atxmega16e5, 97atxmega8e5, atxmega32e5, atxmega32x1). 98 99Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K 100program memory space and greater than 64K data space (MCU types: 101none). 102 103Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K 104program memory space and less than 64K data space (MCU types: 105atxmega64a3, atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3, 106atxmega64c3, atxmega64d3, atxmega64d4). 107 108Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K 109program memory space and greater than 64K data space (MCU types: 110atxmega64a1, atxmega64a1u). 111 112Instruction set avrxmega6 is for the XMEGA AVR core with larger than 11364K program memory space and less than 64K data space (MCU types: 114atxmega128a3, atxmega128a3u, atxmega128c3, atxmega128d3, atxmega128d4, 115atxmega192a3, atxmega192a3u, atxmega128b1, atxmega128b3, atxmega192c3, 116atxmega192d3, atxmega256a3, atxmega256a3u, atxmega256a3b, 117atxmega256a3bu, atxmega256c3, atxmega256d3, atxmega384c3, 118atxmega256d3). 119 120Instruction set avrxmega7 is for the XMEGA AVR core with larger than 12164K program memory space and greater than 64K data space (MCU types: 122atxmega128a1, atxmega128a1u, atxmega128a4u). 123 124Instruction set avrtiny is for the ATtiny4/5/9/10/20/40 125microcontrollers. 126 127@cindex @code{-mall-opcodes} command line option, AVR 128@item -mall-opcodes 129Accept all AVR opcodes, even if not supported by @code{-mmcu}. 130 131@cindex @code{-mno-skip-bug} command line option, AVR 132@item -mno-skip-bug 133This option disable warnings for skipping two-word instructions. 134 135@cindex @code{-mno-wrap} command line option, AVR 136@item -mno-wrap 137This option reject @code{rjmp/rcall} instructions with 8K wrap-around. 138 139@cindex @code{-mrmw} command line option, AVR 140@item -mrmw 141Accept Read-Modify-Write (@code{XCH,LAC,LAS,LAT}) instructions. 142 143@cindex @code{-mlink-relax} command line option, AVR 144@item -mlink-relax 145Enable support for link-time relaxation. This is now on by default 146and this flag no longer has any effect. 147 148@cindex @code{-mno-link-relax} command line option, AVR 149@item -mno-link-relax 150Disable support for link-time relaxation. The assembler will resolve 151relocations when it can, and may be able to better compress some debug 152information. 153 154@end table 155 156 157@node AVR Syntax 158@section Syntax 159@menu 160* AVR-Chars:: Special Characters 161* AVR-Regs:: Register Names 162* AVR-Modifiers:: Relocatable Expression Modifiers 163@end menu 164 165@node AVR-Chars 166@subsection Special Characters 167 168@cindex line comment character, AVR 169@cindex AVR line comment character 170 171The presence of a @samp{;} anywhere on a line indicates the start of a 172comment that extends to the end of that line. 173 174If a @samp{#} appears as the first character of a line, the whole line 175is treated as a comment, but in this case the line can also be a 176logical line number directive (@pxref{Comments}) or a preprocessor 177control command (@pxref{Preprocessing}). 178 179@cindex line separator, AVR 180@cindex statement separator, AVR 181@cindex AVR line separator 182 183The @samp{$} character can be used instead of a newline to separate 184statements. 185 186@node AVR-Regs 187@subsection Register Names 188 189@cindex AVR register names 190@cindex register names, AVR 191 192The AVR has 32 x 8-bit general purpose working registers @samp{r0}, 193@samp{r1}, ... @samp{r31}. 194Six of the 32 registers can be used as three 16-bit indirect address 195register pointers for Data Space addressing. One of the these address 196pointers can also be used as an address pointer for look up tables in 197Flash program memory. These added function registers are the 16-bit 198@samp{X}, @samp{Y} and @samp{Z} - registers. 199 200@smallexample 201X = @r{r26:r27} 202Y = @r{r28:r29} 203Z = @r{r30:r31} 204@end smallexample 205 206@node AVR-Modifiers 207@subsection Relocatable Expression Modifiers 208 209@cindex AVR modifiers 210@cindex syntax, AVR 211 212The assembler supports several modifiers when using relocatable addresses 213in AVR instruction operands. The general syntax is the following: 214 215@smallexample 216modifier(relocatable-expression) 217@end smallexample 218 219@table @code 220@cindex symbol modifiers 221 222@item lo8 223 224This modifier allows you to use bits 0 through 7 of 225an address expression as 8 bit relocatable expression. 226 227@item hi8 228 229This modifier allows you to use bits 7 through 15 of an address expression 230as 8 bit relocatable expression. This is useful with, for example, the 231AVR @samp{ldi} instruction and @samp{lo8} modifier. 232 233For example 234 235@smallexample 236ldi r26, lo8(sym+10) 237ldi r27, hi8(sym+10) 238@end smallexample 239 240@item hh8 241 242This modifier allows you to use bits 16 through 23 of 243an address expression as 8 bit relocatable expression. 244Also, can be useful for loading 32 bit constants. 245 246@item hlo8 247 248Synonym of @samp{hh8}. 249 250@item hhi8 251 252This modifier allows you to use bits 24 through 31 of 253an expression as 8 bit expression. This is useful with, for example, the 254AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8}, 255@samp{hhi8}, modifier. 256 257For example 258 259@smallexample 260ldi r26, lo8(285774925) 261ldi r27, hi8(285774925) 262ldi r28, hlo8(285774925) 263ldi r29, hhi8(285774925) 264; r29,r28,r27,r26 = 285774925 265@end smallexample 266 267@item pm_lo8 268 269This modifier allows you to use bits 0 through 7 of 270an address expression as 8 bit relocatable expression. 271This modifier useful for addressing data or code from 272Flash/Program memory. The using of @samp{pm_lo8} similar 273to @samp{lo8}. 274 275@item pm_hi8 276 277This modifier allows you to use bits 8 through 15 of 278an address expression as 8 bit relocatable expression. 279This modifier useful for addressing data or code from 280Flash/Program memory. 281 282@item pm_hh8 283 284This modifier allows you to use bits 15 through 23 of 285an address expression as 8 bit relocatable expression. 286This modifier useful for addressing data or code from 287Flash/Program memory. 288 289@end table 290 291@node AVR Opcodes 292@section Opcodes 293 294@cindex AVR opcode summary 295@cindex opcode summary, AVR 296@cindex mnemonics, AVR 297@cindex instruction summary, AVR 298For detailed information on the AVR machine instruction set, see 299@url{www.atmel.com/products/AVR}. 300 301@code{@value{AS}} implements all the standard AVR opcodes. 302The following table summarizes the AVR opcodes, and their arguments. 303 304@smallexample 305@i{Legend:} 306 r @r{any register} 307 d @r{`ldi' register (r16-r31)} 308 v @r{`movw' even register (r0, r2, ..., r28, r30)} 309 a @r{`fmul' register (r16-r23)} 310 w @r{`adiw' register (r24,r26,r28,r30)} 311 e @r{pointer registers (X,Y,Z)} 312 b @r{base pointer register and displacement ([YZ]+disp)} 313 z @r{Z pointer register (for [e]lpm Rd,Z[+])} 314 M @r{immediate value from 0 to 255} 315 n @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible} 316 s @r{immediate value from 0 to 7} 317 P @r{Port address value from 0 to 63. (in, out)} 318 p @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)} 319 K @r{immediate value from 0 to 63 (used in `adiw', `sbiw')} 320 i @r{immediate value} 321 l @r{signed pc relative offset from -64 to 63} 322 L @r{signed pc relative offset from -2048 to 2047} 323 h @r{absolute code address (call, jmp)} 324 S @r{immediate value from 0 to 7 (S = s << 4)} 325 ? @r{use this opcode entry if no parameters, else use next opcode entry} 326 3271001010010001000 clc 3281001010011011000 clh 3291001010011111000 cli 3301001010010101000 cln 3311001010011001000 cls 3321001010011101000 clt 3331001010010111000 clv 3341001010010011000 clz 3351001010000001000 sec 3361001010001011000 seh 3371001010001111000 sei 3381001010000101000 sen 3391001010001001000 ses 3401001010001101000 set 3411001010000111000 sev 3421001010000011000 sez 343100101001SSS1000 bclr S 344100101000SSS1000 bset S 3451001010100001001 icall 3461001010000001001 ijmp 3471001010111001000 lpm ? 3481001000ddddd010+ lpm r,z 3491001010111011000 elpm ? 3501001000ddddd011+ elpm r,z 3510000000000000000 nop 3521001010100001000 ret 3531001010100011000 reti 3541001010110001000 sleep 3551001010110011000 break 3561001010110101000 wdr 3571001010111101000 spm 358000111rdddddrrrr adc r,r 359000011rdddddrrrr add r,r 360001000rdddddrrrr and r,r 361000101rdddddrrrr cp r,r 362000001rdddddrrrr cpc r,r 363000100rdddddrrrr cpse r,r 364001001rdddddrrrr eor r,r 365001011rdddddrrrr mov r,r 366100111rdddddrrrr mul r,r 367001010rdddddrrrr or r,r 368000010rdddddrrrr sbc r,r 369000110rdddddrrrr sub r,r 370001001rdddddrrrr clr r 371000011rdddddrrrr lsl r 372000111rdddddrrrr rol r 373001000rdddddrrrr tst r 3740111KKKKddddKKKK andi d,M 3750111KKKKddddKKKK cbr d,n 3761110KKKKddddKKKK ldi d,M 37711101111dddd1111 ser d 3780110KKKKddddKKKK ori d,M 3790110KKKKddddKKKK sbr d,M 3800011KKKKddddKKKK cpi d,M 3810100KKKKddddKKKK sbci d,M 3820101KKKKddddKKKK subi d,M 3831111110rrrrr0sss sbrc r,s 3841111111rrrrr0sss sbrs r,s 3851111100ddddd0sss bld r,s 3861111101ddddd0sss bst r,s 38710110PPdddddPPPP in r,P 38810111PPrrrrrPPPP out P,r 38910010110KKddKKKK adiw w,K 39010010111KKddKKKK sbiw w,K 39110011000pppppsss cbi p,s 39210011010pppppsss sbi p,s 39310011001pppppsss sbic p,s 39410011011pppppsss sbis p,s 395111101lllllll000 brcc l 396111100lllllll000 brcs l 397111100lllllll001 breq l 398111101lllllll100 brge l 399111101lllllll101 brhc l 400111100lllllll101 brhs l 401111101lllllll111 brid l 402111100lllllll111 brie l 403111100lllllll000 brlo l 404111100lllllll100 brlt l 405111100lllllll010 brmi l 406111101lllllll001 brne l 407111101lllllll010 brpl l 408111101lllllll000 brsh l 409111101lllllll110 brtc l 410111100lllllll110 brts l 411111101lllllll011 brvc l 412111100lllllll011 brvs l 413111101lllllllsss brbc s,l 414111100lllllllsss brbs s,l 4151101LLLLLLLLLLLL rcall L 4161100LLLLLLLLLLLL rjmp L 4171001010hhhhh111h call h 4181001010hhhhh110h jmp h 4191001010rrrrr0101 asr r 4201001010rrrrr0000 com r 4211001010rrrrr1010 dec r 4221001010rrrrr0011 inc r 4231001010rrrrr0110 lsr r 4241001010rrrrr0001 neg r 4251001000rrrrr1111 pop r 4261001001rrrrr1111 push r 4271001010rrrrr0111 ror r 4281001010rrrrr0010 swap r 42900000001ddddrrrr movw v,v 43000000010ddddrrrr muls d,d 431000000110ddd0rrr mulsu a,a 432000000110ddd1rrr fmul a,a 433000000111ddd0rrr fmuls a,a 434000000111ddd1rrr fmulsu a,a 4351001001ddddd0000 sts i,r 4361001000ddddd0000 lds r,i 43710o0oo0dddddbooo ldd r,b 438100!000dddddee-+ ld r,e 43910o0oo1rrrrrbooo std b,r 440100!001rrrrree-+ st e,r 4411001010100011001 eicall 4421001010000011001 eijmp 443@end smallexample 444