1# Copyright (C) 2014-2016 Free Software Foundation, Inc. 2# 3# Copying and distribution of this file, with or without modification, 4# are permitted in any medium without royalty provided the copyright 5# notice and this notice are preserved. 6 7# In microcomputer (MC) mode, the vectors are mapped into the on-chip ROM, 8# otherwise in microprocessor (MP) mode the vectors are mapped to address 0 9# on the external bus. In MC mode, the on-chip ROM contains a bootloader program 10# that loads the internal RAM from the serial port or external ROM. 11# 12# Common configurations: 13# 1. MC mode, no external memory (serial boot). 14# 2. MC mode, external RAM (serial boot). 15# 3. MC mode, external ROM. 16# 4. MC mode, external ROM, external RAM. 17# 5. MP mode, external ROM. 18# 6. MP mode, external ROM, external RAM. 19# 7. MP mode, external RAM (dual-port with hosting CPU or external debugger). 20# 21# Config TEXT DATA/BSS 22# 1. INT_RAM INT_RAM (mcmode,onchip) 23# 2. EXT_RAM EXT_RAM (mcmode,extram) 24# 3. INT_RAM INT_RAM (mcmode,onchip) 25# 4. EXT_RAM EXT_RAM (mcmode,extram) 26# 5. EXT_ROM INT_RAM (mpmode,onchip,extrom) 27# 6. EXT_ROM EXT_RAM (mpmode,extram,extrom) 28# 7. EXT_RAM EXT_RAM (mpmode,extram) 29# 30# In MC mode, TEXT and DATA are copied into RAM by the bootloader. 31# 32# In MP mode with external ROM, DATA needs to be copied into RAM at boot time. 33# 34# If there is external RAM it is better to use that and reserve the internal RAM 35# for data buffers. However, the address of the external RAM needs to be specified. 36# 37# This emulation assumes config 7. 38 39case $OUTPUT_ARCH in 40 tic3x) OUTPUT_ARCHNAME="TMS320C3x" ;; 41 tic4x) OUTPUT_ARCHNAME="TMS320C4x" ;; 42esac 43 44case $ONCHIP in 45 yes) RAM=RAM; 46 STACK_SIZE_DEFAULT=128; 47 HEAP_SIZE_DEFAULT=0; 48 ;; 49 *) RAM=EXT0; 50 STACK_SIZE_DEFAULT=0x1000; 51 HEAP_SIZE_DEFAULT=0x4000; 52 ;; 53esac 54 55TEXT_MEMORY=$RAM; 56DATA_MEMORY=$RAM; 57 58 59MEMORY_DEF=" 60/* C30 memory space. */ 61MEMORY 62{ 63 EXT0 : org = 0x0000000, len = 0x800000 /* External address bus. */ 64 XBUS : org = 0x0800000, len = 0x002000 /* Expansion bus. */ 65 IOBUS : org = 0x0804000, len = 0x002000 /* I/O BUS. */ 66 RAM0 : org = 0x0809800, len = 0x000400 /* Internal RAM block 0. */ 67 RAM1 : org = 0x0809a00, len = 0x000400 /* Internal RAM block 1. */ 68 RAM : org = 0x0809800, len = 0x000800 /* Internal RAM. */ 69 EXT1 : org = 0x080a000, len = 0x7f6000 /* External address bus. */ 70} 71" 72 73test -z "$ENTRY" && ENTRY=_start 74 75cat <<EOF 76${RELOCATING+/* Linker script for $OUTPUT_ARCHNAME executable. */} 77${RELOCATING-/* Linker script for $OUTPUT_ARCHNAME object file (ld -r). */} 78 79/* Copyright (C) 2014-2016 Free Software Foundation, Inc. 80 81 Copying and distribution of this script, with or without modification, 82 are permitted in any medium without royalty provided the copyright 83 notice and this notice are preserved. */ 84 85OUTPUT_FORMAT("${OUTPUT_FORMAT}") 86OUTPUT_ARCH("${OUTPUT_ARCH}") 87${LIB_SEARCH_DIRS} 88${RELOCATING+ENTRY (${ENTRY})} 89 90${RELOCATING+ __HEAP_SIZE = DEFINED(__HEAP_SIZE) ? __HEAP_SIZE : ${HEAP_SIZE_DEFAULT};} 91${RELOCATING+ __STACK_SIZE = DEFINED(__STACK_SIZE) ? __STACK_SIZE : ${STACK_SIZE_DEFAULT};} 92 93${RELOCATING+${MEMORY_DEF}} 94 95/* In the small memory model the .data and .bss sections must be contiguous 96 when loaded and fit within the same page. The DP register is loaded 97 with the page address. */ 98 99SECTIONS 100{ 101 /* Reset, interrupt, and trap vectors. */ 102 .vectors ${RELOCATING+ 0} : { 103 *(.vectors) 104 } ${RELOCATING+ > ${TEXT_MEMORY}} 105 /* Constants. */ 106 .const : { 107 *(.const) 108 } ${RELOCATING+ > ${TEXT_MEMORY}} 109 /* Program code. */ 110 .text : { 111 ${RELOCATING+ __text = .;} 112 ${RELOCATING+ *(.init)} 113 *(.text) 114 ${CONSTRUCTING+ ___CTOR_LIST__ = .;} 115 ${CONSTRUCTING+ LONG(___CTOR_END__ - ___CTOR_LIST__ - 2)} 116 ${CONSTRUCTING+ *(.ctors)} 117 ${CONSTRUCTING+ LONG(0);} 118 ${CONSTRUCTING+ ___CTOR_END__ = .;} 119 ${CONSTRUCTING+ ___DTOR_LIST__ = .;} 120 ${CONSTRUCTING+ LONG(___DTOR_END__ - ___DTOR_LIST__ - 2)} 121 ${CONSTRUCTING+ *(.dtors)} 122 ${CONSTRUCTING+ LONG(0)} 123 ${CONSTRUCTING+ ___DTOR_END__ = .;} 124 ${RELOCATING+ *(.fini)} 125 ${RELOCATING+ __etext = .;} 126 } ${RELOCATING+ > ${TEXT_MEMORY}} 127 /* Global initialised variables. */ 128 .data : 129 { 130 ${RELOCATING+ __data = .;} 131 *(.data) 132 ${RELOCATING+ __edata = .;} 133 } ${RELOCATING+ > ${DATA_MEMORY}} 134 /* Global uninitialised variables. */ 135 .bss : { 136 ${RELOCATING+ __bss = .;} 137 *(.bss) 138 *(COMMON) 139 ${RELOCATING+ __end = .;} 140 } ${RELOCATING+ > ${DATA_MEMORY}} 141 /* Heap. */ 142 .heap : 143 { 144 ${RELOCATING+ __heap = .;} 145 ${RELOCATING+ . += __HEAP_SIZE}; 146 } ${RELOCATING+ > ${DATA_MEMORY}} 147 /* Stack (grows upward). */ 148 .stack : 149 { 150 ${RELOCATING+ __stack = .;} 151 *(.stack) 152 ${RELOCATING+ . = . + __STACK_SIZE}; 153 } ${RELOCATING+ > ${DATA_MEMORY}} 154 .stab 0 ${RELOCATING+(NOLOAD)} : 155 { 156 [ .stab ] 157 } 158 .stabstr 0 ${RELOCATING+(NOLOAD)} : 159 { 160 [ .stabstr ] 161 } 162} 163EOF 164