1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2016 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22 #include "as.h"
23 #include "safe-ctype.h"
24 #include "subsegs.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
27
28 #ifdef OBJ_ELF
29 #include "elf/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
32 #endif
33
34 #ifdef TE_PE
35 #include "coff/pe.h"
36 #endif
37
38 #ifdef OBJ_XCOFF
39 #include "coff/xcoff.h"
40 #include "libxcoff.h"
41 #endif
42
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
44
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian;
47
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian = 0;
50
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
53 #ifdef TE_PE
54 #define TARGET_REG_NAMES_P TRUE
55 #else
56 #define TARGET_REG_NAMES_P FALSE
57 #endif
58 #endif
59
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
61 HIGHESTA. */
62
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
65
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
68
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
71 signed number. */
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
73
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
76
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
80
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
83
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
87
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
89
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
93
94 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
95
96 static void ppc_macro (char *, const struct powerpc_macro *);
97 static void ppc_byte (int);
98
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
102 #endif
103
104 #ifdef OBJ_XCOFF
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS *, offsetT);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
129 #endif
130
131 #ifdef OBJ_ELF
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
137 #endif
138
139 #ifdef TE_PE
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
151 #endif
152
153 /* Generic assembler global variables which must be defined by all
154 targets. */
155
156 #ifdef OBJ_ELF
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars[] = "#!";
162 static const char ppc_eabi_comment_chars[] = "#";
163
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars = ppc_solaris_comment_chars;
166 #else
167 const char *ppc_comment_chars = ppc_eabi_comment_chars;
168 #endif
169 #else
170 const char comment_chars[] = "#";
171 #endif
172
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars[] = "#";
175
176 /* Characters which may be used to separate multiple commands on a
177 single line. */
178 const char line_separator_chars[] = ";";
179
180 /* Characters which are used to indicate an exponent in a floating
181 point number. */
182 const char EXP_CHARS[] = "eE";
183
184 /* Characters which mean that a number is a floating point constant,
185 as in 0d1.0. */
186 const char FLT_CHARS[] = "dD";
187
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars[] = "%[";
191
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment;
194
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length;
197
198 /* More than this number of nops in an alignment op gets a branch
199 instead. */
200 unsigned long nop_limit = 4;
201
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu = 0;
205 ppc_cpu_t sticky = 0;
206
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion = 0;
209
210 #ifdef OBJ_ELF
211 /* Flags set on encountering toc relocs. */
212 static enum {
213 has_large_toc_reloc = 1,
214 has_small_toc_reloc = 2
215 } toc_reloc_types;
216 #endif
217
218 /* Warn on emitting data to code sections. */
219 int warn_476;
220 unsigned long last_insn;
221 segT last_seg;
222 subsegT last_subseg;
223
224 /* The target specific pseudo-ops which we support. */
225
226 const pseudo_typeS md_pseudo_table[] =
227 {
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte, 0 },
230
231 #ifdef OBJ_XCOFF
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm, 0 },
237 { "lcomm", ppc_comm, 1 },
238 { "bb", ppc_bb, 0 },
239 { "bc", ppc_bc, 0 },
240 { "bf", ppc_bf, 0 },
241 { "bi", ppc_biei, 0 },
242 { "bs", ppc_bs, 0 },
243 { "csect", ppc_csect, 0 },
244 { "dwsect", ppc_dwsect, 0 },
245 { "data", ppc_section, 'd' },
246 { "eb", ppc_eb, 0 },
247 { "ec", ppc_ec, 0 },
248 { "ef", ppc_ef, 0 },
249 { "ei", ppc_biei, 1 },
250 { "es", ppc_es, 0 },
251 { "extern", ppc_extern, 0 },
252 { "function", ppc_function, 0 },
253 { "lglobl", ppc_lglobl, 0 },
254 { "ref", ppc_ref, 0 },
255 { "rename", ppc_rename, 0 },
256 { "section", ppc_named_section, 0 },
257 { "stabx", ppc_stabx, 0 },
258 { "text", ppc_section, 't' },
259 { "toc", ppc_toc, 0 },
260 { "long", ppc_xcoff_cons, 2 },
261 { "llong", ppc_xcoff_cons, 3 },
262 { "word", ppc_xcoff_cons, 1 },
263 { "short", ppc_xcoff_cons, 1 },
264 { "vbyte", ppc_vbyte, 0 },
265 #endif
266
267 #ifdef OBJ_ELF
268 { "llong", cons, 8 },
269 { "rdata", ppc_elf_rdata, 0 },
270 { "rodata", ppc_elf_rdata, 0 },
271 { "lcomm", ppc_elf_lcomm, 0 },
272 { "localentry", ppc_elf_localentry, 0 },
273 { "abiversion", ppc_elf_abiversion, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute, 0},
275 #endif
276
277 #ifdef TE_PE
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous, 0 },
280 { "pdata", ppc_pdata, 0 },
281 { "ydata", ppc_ydata, 0 },
282 { "reldata", ppc_reldata, 0 },
283 { "rdata", ppc_rdata, 0 },
284 { "ualong", ppc_ualong, 0 },
285 { "znop", ppc_znop, 0 },
286 { "comm", ppc_pe_comm, 0 },
287 { "lcomm", ppc_pe_comm, 1 },
288 { "section", ppc_pe_section, 0 },
289 { "function", ppc_pe_function,0 },
290 { "tocd", ppc_pe_tocd, 0 },
291 #endif
292
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
294 { "tc", ppc_tc, 0 },
295 { "machine", ppc_machine, 0 },
296 #endif
297
298 { NULL, NULL, 0 }
299 };
300
301
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
305
306 /* Structure to hold information about predefined registers. */
307 struct pd_reg
308 {
309 const char *name;
310 int value;
311 };
312
313 /* List of registers that are pre-defined:
314
315 Each general register has predefined names of the form:
316 1. r<reg_num> which has the value <reg_num>.
317 2. r.<reg_num> which has the value <reg_num>.
318
319 Each floating point register has predefined names of the form:
320 1. f<reg_num> which has the value <reg_num>.
321 2. f.<reg_num> which has the value <reg_num>.
322
323 Each vector unit register has predefined names of the form:
324 1. v<reg_num> which has the value <reg_num>.
325 2. v.<reg_num> which has the value <reg_num>.
326
327 Each condition register has predefined names of the form:
328 1. cr<reg_num> which has the value <reg_num>.
329 2. cr.<reg_num> which has the value <reg_num>.
330
331 There are individual registers as well:
332 sp or r.sp has the value 1
333 rtoc or r.toc has the value 2
334 fpscr has the value 0
335 xer has the value 1
336 lr has the value 8
337 ctr has the value 9
338 pmr has the value 0
339 dar has the value 19
340 dsisr has the value 18
341 dec has the value 22
342 sdr1 has the value 25
343 srr0 has the value 26
344 srr1 has the value 27
345
346 The table is sorted. Suitable for searching by a binary search. */
347
348 static const struct pd_reg pre_defined_registers[] =
349 {
350 { "cr.0", 0 }, /* Condition Registers */
351 { "cr.1", 1 },
352 { "cr.2", 2 },
353 { "cr.3", 3 },
354 { "cr.4", 4 },
355 { "cr.5", 5 },
356 { "cr.6", 6 },
357 { "cr.7", 7 },
358
359 { "cr0", 0 },
360 { "cr1", 1 },
361 { "cr2", 2 },
362 { "cr3", 3 },
363 { "cr4", 4 },
364 { "cr5", 5 },
365 { "cr6", 6 },
366 { "cr7", 7 },
367
368 { "ctr", 9 },
369
370 { "dar", 19 }, /* Data Access Register */
371 { "dec", 22 }, /* Decrementer */
372 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
373
374 { "f.0", 0 }, /* Floating point registers */
375 { "f.1", 1 },
376 { "f.10", 10 },
377 { "f.11", 11 },
378 { "f.12", 12 },
379 { "f.13", 13 },
380 { "f.14", 14 },
381 { "f.15", 15 },
382 { "f.16", 16 },
383 { "f.17", 17 },
384 { "f.18", 18 },
385 { "f.19", 19 },
386 { "f.2", 2 },
387 { "f.20", 20 },
388 { "f.21", 21 },
389 { "f.22", 22 },
390 { "f.23", 23 },
391 { "f.24", 24 },
392 { "f.25", 25 },
393 { "f.26", 26 },
394 { "f.27", 27 },
395 { "f.28", 28 },
396 { "f.29", 29 },
397 { "f.3", 3 },
398 { "f.30", 30 },
399 { "f.31", 31 },
400
401 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
402 { "f.33", 33 },
403 { "f.34", 34 },
404 { "f.35", 35 },
405 { "f.36", 36 },
406 { "f.37", 37 },
407 { "f.38", 38 },
408 { "f.39", 39 },
409 { "f.4", 4 },
410 { "f.40", 40 },
411 { "f.41", 41 },
412 { "f.42", 42 },
413 { "f.43", 43 },
414 { "f.44", 44 },
415 { "f.45", 45 },
416 { "f.46", 46 },
417 { "f.47", 47 },
418 { "f.48", 48 },
419 { "f.49", 49 },
420 { "f.5", 5 },
421 { "f.50", 50 },
422 { "f.51", 51 },
423 { "f.52", 52 },
424 { "f.53", 53 },
425 { "f.54", 54 },
426 { "f.55", 55 },
427 { "f.56", 56 },
428 { "f.57", 57 },
429 { "f.58", 58 },
430 { "f.59", 59 },
431 { "f.6", 6 },
432 { "f.60", 60 },
433 { "f.61", 61 },
434 { "f.62", 62 },
435 { "f.63", 63 },
436 { "f.7", 7 },
437 { "f.8", 8 },
438 { "f.9", 9 },
439
440 { "f0", 0 },
441 { "f1", 1 },
442 { "f10", 10 },
443 { "f11", 11 },
444 { "f12", 12 },
445 { "f13", 13 },
446 { "f14", 14 },
447 { "f15", 15 },
448 { "f16", 16 },
449 { "f17", 17 },
450 { "f18", 18 },
451 { "f19", 19 },
452 { "f2", 2 },
453 { "f20", 20 },
454 { "f21", 21 },
455 { "f22", 22 },
456 { "f23", 23 },
457 { "f24", 24 },
458 { "f25", 25 },
459 { "f26", 26 },
460 { "f27", 27 },
461 { "f28", 28 },
462 { "f29", 29 },
463 { "f3", 3 },
464 { "f30", 30 },
465 { "f31", 31 },
466
467 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
468 { "f33", 33 },
469 { "f34", 34 },
470 { "f35", 35 },
471 { "f36", 36 },
472 { "f37", 37 },
473 { "f38", 38 },
474 { "f39", 39 },
475 { "f4", 4 },
476 { "f40", 40 },
477 { "f41", 41 },
478 { "f42", 42 },
479 { "f43", 43 },
480 { "f44", 44 },
481 { "f45", 45 },
482 { "f46", 46 },
483 { "f47", 47 },
484 { "f48", 48 },
485 { "f49", 49 },
486 { "f5", 5 },
487 { "f50", 50 },
488 { "f51", 51 },
489 { "f52", 52 },
490 { "f53", 53 },
491 { "f54", 54 },
492 { "f55", 55 },
493 { "f56", 56 },
494 { "f57", 57 },
495 { "f58", 58 },
496 { "f59", 59 },
497 { "f6", 6 },
498 { "f60", 60 },
499 { "f61", 61 },
500 { "f62", 62 },
501 { "f63", 63 },
502 { "f7", 7 },
503 { "f8", 8 },
504 { "f9", 9 },
505
506 { "fpscr", 0 },
507
508 /* Quantization registers used with pair single instructions. */
509 { "gqr.0", 0 },
510 { "gqr.1", 1 },
511 { "gqr.2", 2 },
512 { "gqr.3", 3 },
513 { "gqr.4", 4 },
514 { "gqr.5", 5 },
515 { "gqr.6", 6 },
516 { "gqr.7", 7 },
517 { "gqr0", 0 },
518 { "gqr1", 1 },
519 { "gqr2", 2 },
520 { "gqr3", 3 },
521 { "gqr4", 4 },
522 { "gqr5", 5 },
523 { "gqr6", 6 },
524 { "gqr7", 7 },
525
526 { "lr", 8 }, /* Link Register */
527
528 { "pmr", 0 },
529
530 { "r.0", 0 }, /* General Purpose Registers */
531 { "r.1", 1 },
532 { "r.10", 10 },
533 { "r.11", 11 },
534 { "r.12", 12 },
535 { "r.13", 13 },
536 { "r.14", 14 },
537 { "r.15", 15 },
538 { "r.16", 16 },
539 { "r.17", 17 },
540 { "r.18", 18 },
541 { "r.19", 19 },
542 { "r.2", 2 },
543 { "r.20", 20 },
544 { "r.21", 21 },
545 { "r.22", 22 },
546 { "r.23", 23 },
547 { "r.24", 24 },
548 { "r.25", 25 },
549 { "r.26", 26 },
550 { "r.27", 27 },
551 { "r.28", 28 },
552 { "r.29", 29 },
553 { "r.3", 3 },
554 { "r.30", 30 },
555 { "r.31", 31 },
556 { "r.4", 4 },
557 { "r.5", 5 },
558 { "r.6", 6 },
559 { "r.7", 7 },
560 { "r.8", 8 },
561 { "r.9", 9 },
562
563 { "r.sp", 1 }, /* Stack Pointer */
564
565 { "r.toc", 2 }, /* Pointer to the table of contents */
566
567 { "r0", 0 }, /* More general purpose registers */
568 { "r1", 1 },
569 { "r10", 10 },
570 { "r11", 11 },
571 { "r12", 12 },
572 { "r13", 13 },
573 { "r14", 14 },
574 { "r15", 15 },
575 { "r16", 16 },
576 { "r17", 17 },
577 { "r18", 18 },
578 { "r19", 19 },
579 { "r2", 2 },
580 { "r20", 20 },
581 { "r21", 21 },
582 { "r22", 22 },
583 { "r23", 23 },
584 { "r24", 24 },
585 { "r25", 25 },
586 { "r26", 26 },
587 { "r27", 27 },
588 { "r28", 28 },
589 { "r29", 29 },
590 { "r3", 3 },
591 { "r30", 30 },
592 { "r31", 31 },
593 { "r4", 4 },
594 { "r5", 5 },
595 { "r6", 6 },
596 { "r7", 7 },
597 { "r8", 8 },
598 { "r9", 9 },
599
600 { "rtoc", 2 }, /* Table of contents */
601
602 { "sdr1", 25 }, /* Storage Description Register 1 */
603
604 { "sp", 1 },
605
606 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
607 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
608
609 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
610 { "v.1", 1 },
611 { "v.10", 10 },
612 { "v.11", 11 },
613 { "v.12", 12 },
614 { "v.13", 13 },
615 { "v.14", 14 },
616 { "v.15", 15 },
617 { "v.16", 16 },
618 { "v.17", 17 },
619 { "v.18", 18 },
620 { "v.19", 19 },
621 { "v.2", 2 },
622 { "v.20", 20 },
623 { "v.21", 21 },
624 { "v.22", 22 },
625 { "v.23", 23 },
626 { "v.24", 24 },
627 { "v.25", 25 },
628 { "v.26", 26 },
629 { "v.27", 27 },
630 { "v.28", 28 },
631 { "v.29", 29 },
632 { "v.3", 3 },
633 { "v.30", 30 },
634 { "v.31", 31 },
635 { "v.4", 4 },
636 { "v.5", 5 },
637 { "v.6", 6 },
638 { "v.7", 7 },
639 { "v.8", 8 },
640 { "v.9", 9 },
641
642 { "v0", 0 },
643 { "v1", 1 },
644 { "v10", 10 },
645 { "v11", 11 },
646 { "v12", 12 },
647 { "v13", 13 },
648 { "v14", 14 },
649 { "v15", 15 },
650 { "v16", 16 },
651 { "v17", 17 },
652 { "v18", 18 },
653 { "v19", 19 },
654 { "v2", 2 },
655 { "v20", 20 },
656 { "v21", 21 },
657 { "v22", 22 },
658 { "v23", 23 },
659 { "v24", 24 },
660 { "v25", 25 },
661 { "v26", 26 },
662 { "v27", 27 },
663 { "v28", 28 },
664 { "v29", 29 },
665 { "v3", 3 },
666 { "v30", 30 },
667 { "v31", 31 },
668 { "v4", 4 },
669 { "v5", 5 },
670 { "v6", 6 },
671 { "v7", 7 },
672 { "v8", 8 },
673 { "v9", 9 },
674
675 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
676 { "vs.1", 1 },
677 { "vs.10", 10 },
678 { "vs.11", 11 },
679 { "vs.12", 12 },
680 { "vs.13", 13 },
681 { "vs.14", 14 },
682 { "vs.15", 15 },
683 { "vs.16", 16 },
684 { "vs.17", 17 },
685 { "vs.18", 18 },
686 { "vs.19", 19 },
687 { "vs.2", 2 },
688 { "vs.20", 20 },
689 { "vs.21", 21 },
690 { "vs.22", 22 },
691 { "vs.23", 23 },
692 { "vs.24", 24 },
693 { "vs.25", 25 },
694 { "vs.26", 26 },
695 { "vs.27", 27 },
696 { "vs.28", 28 },
697 { "vs.29", 29 },
698 { "vs.3", 3 },
699 { "vs.30", 30 },
700 { "vs.31", 31 },
701 { "vs.32", 32 },
702 { "vs.33", 33 },
703 { "vs.34", 34 },
704 { "vs.35", 35 },
705 { "vs.36", 36 },
706 { "vs.37", 37 },
707 { "vs.38", 38 },
708 { "vs.39", 39 },
709 { "vs.4", 4 },
710 { "vs.40", 40 },
711 { "vs.41", 41 },
712 { "vs.42", 42 },
713 { "vs.43", 43 },
714 { "vs.44", 44 },
715 { "vs.45", 45 },
716 { "vs.46", 46 },
717 { "vs.47", 47 },
718 { "vs.48", 48 },
719 { "vs.49", 49 },
720 { "vs.5", 5 },
721 { "vs.50", 50 },
722 { "vs.51", 51 },
723 { "vs.52", 52 },
724 { "vs.53", 53 },
725 { "vs.54", 54 },
726 { "vs.55", 55 },
727 { "vs.56", 56 },
728 { "vs.57", 57 },
729 { "vs.58", 58 },
730 { "vs.59", 59 },
731 { "vs.6", 6 },
732 { "vs.60", 60 },
733 { "vs.61", 61 },
734 { "vs.62", 62 },
735 { "vs.63", 63 },
736 { "vs.7", 7 },
737 { "vs.8", 8 },
738 { "vs.9", 9 },
739
740 { "vs0", 0 },
741 { "vs1", 1 },
742 { "vs10", 10 },
743 { "vs11", 11 },
744 { "vs12", 12 },
745 { "vs13", 13 },
746 { "vs14", 14 },
747 { "vs15", 15 },
748 { "vs16", 16 },
749 { "vs17", 17 },
750 { "vs18", 18 },
751 { "vs19", 19 },
752 { "vs2", 2 },
753 { "vs20", 20 },
754 { "vs21", 21 },
755 { "vs22", 22 },
756 { "vs23", 23 },
757 { "vs24", 24 },
758 { "vs25", 25 },
759 { "vs26", 26 },
760 { "vs27", 27 },
761 { "vs28", 28 },
762 { "vs29", 29 },
763 { "vs3", 3 },
764 { "vs30", 30 },
765 { "vs31", 31 },
766 { "vs32", 32 },
767 { "vs33", 33 },
768 { "vs34", 34 },
769 { "vs35", 35 },
770 { "vs36", 36 },
771 { "vs37", 37 },
772 { "vs38", 38 },
773 { "vs39", 39 },
774 { "vs4", 4 },
775 { "vs40", 40 },
776 { "vs41", 41 },
777 { "vs42", 42 },
778 { "vs43", 43 },
779 { "vs44", 44 },
780 { "vs45", 45 },
781 { "vs46", 46 },
782 { "vs47", 47 },
783 { "vs48", 48 },
784 { "vs49", 49 },
785 { "vs5", 5 },
786 { "vs50", 50 },
787 { "vs51", 51 },
788 { "vs52", 52 },
789 { "vs53", 53 },
790 { "vs54", 54 },
791 { "vs55", 55 },
792 { "vs56", 56 },
793 { "vs57", 57 },
794 { "vs58", 58 },
795 { "vs59", 59 },
796 { "vs6", 6 },
797 { "vs60", 60 },
798 { "vs61", 61 },
799 { "vs62", 62 },
800 { "vs63", 63 },
801 { "vs7", 7 },
802 { "vs8", 8 },
803 { "vs9", 9 },
804
805 { "xer", 1 },
806
807 };
808
809 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
810
811 /* Given NAME, find the register number associated with that name, return
812 the integer value associated with the given name or -1 on failure. */
813
814 static int
reg_name_search(const struct pd_reg * regs,int regcount,const char * name)815 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
816 {
817 int middle, low, high;
818 int cmp;
819
820 low = 0;
821 high = regcount - 1;
822
823 do
824 {
825 middle = (low + high) / 2;
826 cmp = strcasecmp (name, regs[middle].name);
827 if (cmp < 0)
828 high = middle - 1;
829 else if (cmp > 0)
830 low = middle + 1;
831 else
832 return regs[middle].value;
833 }
834 while (low <= high);
835
836 return -1;
837 }
838
839 /*
840 * Summary of register_name.
841 *
842 * in: Input_line_pointer points to 1st char of operand.
843 *
844 * out: A expressionS.
845 * The operand may have been a register: in this case, X_op == O_register,
846 * X_add_number is set to the register number, and truth is returned.
847 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 * original state.
849 */
850
851 static bfd_boolean
register_name(expressionS * expressionP)852 register_name (expressionS *expressionP)
853 {
854 int reg_number;
855 char *name;
856 char *start;
857 char c;
858
859 /* Find the spelling of the operand. */
860 start = name = input_line_pointer;
861 if (name[0] == '%' && ISALPHA (name[1]))
862 name = ++input_line_pointer;
863
864 else if (!reg_names_p || !ISALPHA (name[0]))
865 return FALSE;
866
867 c = get_symbol_name (&name);
868 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
869
870 /* Put back the delimiting char. */
871 *input_line_pointer = c;
872
873 /* Look to see if it's in the register table. */
874 if (reg_number >= 0)
875 {
876 expressionP->X_op = O_register;
877 expressionP->X_add_number = reg_number;
878
879 /* Make the rest nice. */
880 expressionP->X_add_symbol = NULL;
881 expressionP->X_op_symbol = NULL;
882 return TRUE;
883 }
884
885 /* Reset the line as if we had not done anything. */
886 input_line_pointer = start;
887 return FALSE;
888 }
889
890 /* This function is called for each symbol seen in an expression. It
891 handles the special parsing which PowerPC assemblers are supposed
892 to use for condition codes. */
893
894 /* Whether to do the special parsing. */
895 static bfd_boolean cr_operand;
896
897 /* Names to recognize in a condition code. This table is sorted. */
898 static const struct pd_reg cr_names[] =
899 {
900 { "cr0", 0 },
901 { "cr1", 1 },
902 { "cr2", 2 },
903 { "cr3", 3 },
904 { "cr4", 4 },
905 { "cr5", 5 },
906 { "cr6", 6 },
907 { "cr7", 7 },
908 { "eq", 2 },
909 { "gt", 1 },
910 { "lt", 0 },
911 { "so", 3 },
912 { "un", 3 }
913 };
914
915 /* Parsing function. This returns non-zero if it recognized an
916 expression. */
917
918 int
ppc_parse_name(const char * name,expressionS * exp)919 ppc_parse_name (const char *name, expressionS *exp)
920 {
921 int val;
922
923 if (! cr_operand)
924 return 0;
925
926 if (*name == '%')
927 ++name;
928 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
929 name);
930 if (val < 0)
931 return 0;
932
933 exp->X_op = O_constant;
934 exp->X_add_number = val;
935
936 return 1;
937 }
938
939 /* Local variables. */
940
941 /* Whether to target xcoff64/elf64. */
942 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
943
944 /* Opcode hash table. */
945 static struct hash_control *ppc_hash;
946
947 /* Macro hash table. */
948 static struct hash_control *ppc_macro_hash;
949
950 #ifdef OBJ_ELF
951 /* What type of shared library support to use. */
952 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
953
954 /* Flags to set in the elf header. */
955 static flagword ppc_flags = 0;
956
957 /* Whether this is Solaris or not. */
958 #ifdef TARGET_SOLARIS_COMMENT
959 #define SOLARIS_P TRUE
960 #else
961 #define SOLARIS_P FALSE
962 #endif
963
964 static bfd_boolean msolaris = SOLARIS_P;
965 #endif
966
967 #ifdef OBJ_XCOFF
968
969 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
970 using a bunch of different sections. These assembler sections,
971 however, are all encompassed within the .text or .data sections of
972 the final output file. We handle this by using different
973 subsegments within these main segments. */
974
975 /* Next subsegment to allocate within the .text segment. */
976 static subsegT ppc_text_subsegment = 2;
977
978 /* Linked list of csects in the text section. */
979 static symbolS *ppc_text_csects;
980
981 /* Next subsegment to allocate within the .data segment. */
982 static subsegT ppc_data_subsegment = 2;
983
984 /* Linked list of csects in the data section. */
985 static symbolS *ppc_data_csects;
986
987 /* The current csect. */
988 static symbolS *ppc_current_csect;
989
990 /* The RS/6000 assembler uses a TOC which holds addresses of functions
991 and variables. Symbols are put in the TOC with the .tc pseudo-op.
992 A special relocation is used when accessing TOC entries. We handle
993 the TOC as a subsegment within the .data segment. We set it up if
994 we see a .toc pseudo-op, and save the csect symbol here. */
995 static symbolS *ppc_toc_csect;
996
997 /* The first frag in the TOC subsegment. */
998 static fragS *ppc_toc_frag;
999
1000 /* The first frag in the first subsegment after the TOC in the .data
1001 segment. NULL if there are no subsegments after the TOC. */
1002 static fragS *ppc_after_toc_frag;
1003
1004 /* The current static block. */
1005 static symbolS *ppc_current_block;
1006
1007 /* The COFF debugging section; set by md_begin. This is not the
1008 .debug section, but is instead the secret BFD section which will
1009 cause BFD to set the section number of a symbol to N_DEBUG. */
1010 static asection *ppc_coff_debug_section;
1011
1012 /* Structure to set the length field of the dwarf sections. */
1013 struct dw_subsection {
1014 /* Subsections are simply linked. */
1015 struct dw_subsection *link;
1016
1017 /* The subsection number. */
1018 subsegT subseg;
1019
1020 /* Expression to compute the length of the section. */
1021 expressionS end_exp;
1022 };
1023
1024 static struct dw_section {
1025 /* Corresponding section. */
1026 segT sect;
1027
1028 /* Simply linked list of subsections with a label. */
1029 struct dw_subsection *list_subseg;
1030
1031 /* The anonymous subsection. */
1032 struct dw_subsection *anon_subseg;
1033 } dw_sections[XCOFF_DWSECT_NBR_NAMES];
1034 #endif /* OBJ_XCOFF */
1035
1036 #ifdef TE_PE
1037
1038 /* Various sections that we need for PE coff support. */
1039 static segT ydata_section;
1040 static segT pdata_section;
1041 static segT reldata_section;
1042 static segT rdata_section;
1043 static segT tocdata_section;
1044
1045 /* The current section and the previous section. See ppc_previous. */
1046 static segT ppc_previous_section;
1047 static segT ppc_current_section;
1048
1049 #endif /* TE_PE */
1050
1051 #ifdef OBJ_ELF
1052 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1053 unsigned long *ppc_apuinfo_list;
1054 unsigned int ppc_apuinfo_num;
1055 unsigned int ppc_apuinfo_num_alloc;
1056 #endif /* OBJ_ELF */
1057
1058 #ifdef OBJ_ELF
1059 const char *const md_shortopts = "b:l:usm:K:VQ:";
1060 #else
1061 const char *const md_shortopts = "um:";
1062 #endif
1063 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1064 const struct option md_longopts[] = {
1065 {"nops", required_argument, NULL, OPTION_NOPS},
1066 {"ppc476-workaround", no_argument, &warn_476, 1},
1067 {"no-ppc476-workaround", no_argument, &warn_476, 0},
1068 {NULL, no_argument, NULL, 0}
1069 };
1070 const size_t md_longopts_size = sizeof (md_longopts);
1071
1072 int
md_parse_option(int c,const char * arg)1073 md_parse_option (int c, const char *arg)
1074 {
1075 ppc_cpu_t new_cpu;
1076
1077 switch (c)
1078 {
1079 case 'u':
1080 /* -u means that any undefined symbols should be treated as
1081 external, which is the default for gas anyhow. */
1082 break;
1083
1084 #ifdef OBJ_ELF
1085 case 'l':
1086 /* Solaris as takes -le (presumably for little endian). For completeness
1087 sake, recognize -be also. */
1088 if (strcmp (arg, "e") == 0)
1089 {
1090 target_big_endian = 0;
1091 set_target_endian = 1;
1092 if (ppc_cpu & PPC_OPCODE_VLE)
1093 as_bad (_("the use of -mvle requires big endian."));
1094 }
1095 else
1096 return 0;
1097
1098 break;
1099
1100 case 'b':
1101 if (strcmp (arg, "e") == 0)
1102 {
1103 target_big_endian = 1;
1104 set_target_endian = 1;
1105 }
1106 else
1107 return 0;
1108
1109 break;
1110
1111 case 'K':
1112 /* Recognize -K PIC. */
1113 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1114 {
1115 shlib = SHLIB_PIC;
1116 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1117 }
1118 else
1119 return 0;
1120
1121 break;
1122 #endif
1123
1124 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1125 case 'a':
1126 if (strcmp (arg, "64") == 0)
1127 {
1128 #ifdef BFD64
1129 ppc_obj64 = 1;
1130 if (ppc_cpu & PPC_OPCODE_VLE)
1131 as_bad (_("the use of -mvle requires -a32."));
1132 #else
1133 as_fatal (_("%s unsupported"), "-a64");
1134 #endif
1135 }
1136 else if (strcmp (arg, "32") == 0)
1137 ppc_obj64 = 0;
1138 else
1139 return 0;
1140 break;
1141
1142 case 'm':
1143 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
1144 if (new_cpu != 0)
1145 {
1146 ppc_cpu = new_cpu;
1147 if (strcmp (arg, "vle") == 0)
1148 {
1149 if (set_target_endian && target_big_endian == 0)
1150 as_bad (_("the use of -mvle requires big endian."));
1151 if (ppc_obj64)
1152 as_bad (_("the use of -mvle requires -a32."));
1153 }
1154 }
1155
1156 else if (strcmp (arg, "regnames") == 0)
1157 reg_names_p = TRUE;
1158
1159 else if (strcmp (arg, "no-regnames") == 0)
1160 reg_names_p = FALSE;
1161
1162 #ifdef OBJ_ELF
1163 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1164 that require relocation. */
1165 else if (strcmp (arg, "relocatable") == 0)
1166 {
1167 shlib = SHLIB_MRELOCATABLE;
1168 ppc_flags |= EF_PPC_RELOCATABLE;
1169 }
1170
1171 else if (strcmp (arg, "relocatable-lib") == 0)
1172 {
1173 shlib = SHLIB_MRELOCATABLE;
1174 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1175 }
1176
1177 /* -memb, set embedded bit. */
1178 else if (strcmp (arg, "emb") == 0)
1179 ppc_flags |= EF_PPC_EMB;
1180
1181 /* -mlittle/-mbig set the endianness. */
1182 else if (strcmp (arg, "little") == 0
1183 || strcmp (arg, "little-endian") == 0)
1184 {
1185 target_big_endian = 0;
1186 set_target_endian = 1;
1187 if (ppc_cpu & PPC_OPCODE_VLE)
1188 as_bad (_("the use of -mvle requires big endian."));
1189 }
1190
1191 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1192 {
1193 target_big_endian = 1;
1194 set_target_endian = 1;
1195 }
1196
1197 else if (strcmp (arg, "solaris") == 0)
1198 {
1199 msolaris = TRUE;
1200 ppc_comment_chars = ppc_solaris_comment_chars;
1201 }
1202
1203 else if (strcmp (arg, "no-solaris") == 0)
1204 {
1205 msolaris = FALSE;
1206 ppc_comment_chars = ppc_eabi_comment_chars;
1207 }
1208 #endif
1209 else
1210 {
1211 as_bad (_("invalid switch -m%s"), arg);
1212 return 0;
1213 }
1214 break;
1215
1216 #ifdef OBJ_ELF
1217 /* -V: SVR4 argument to print version ID. */
1218 case 'V':
1219 print_version_id ();
1220 break;
1221
1222 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1223 should be emitted or not. FIXME: Not implemented. */
1224 case 'Q':
1225 break;
1226
1227 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1228 rather than .stabs.excl, which is ignored by the linker.
1229 FIXME: Not implemented. */
1230 case 's':
1231 if (arg)
1232 return 0;
1233
1234 break;
1235 #endif
1236
1237 case OPTION_NOPS:
1238 {
1239 char *end;
1240 nop_limit = strtoul (optarg, &end, 0);
1241 if (*end)
1242 as_bad (_("--nops needs a numeric argument"));
1243 }
1244 break;
1245
1246 case 0:
1247 break;
1248
1249 default:
1250 return 0;
1251 }
1252
1253 return 1;
1254 }
1255
1256 void
md_show_usage(FILE * stream)1257 md_show_usage (FILE *stream)
1258 {
1259 fprintf (stream, _("\
1260 PowerPC options:\n\
1261 -a32 generate ELF32/XCOFF32\n\
1262 -a64 generate ELF64/XCOFF64\n\
1263 -u ignored\n\
1264 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1265 -mpwr generate code for POWER (RIOS1)\n\
1266 -m601 generate code for PowerPC 601\n\
1267 -mppc, -mppc32, -m603, -m604\n\
1268 generate code for PowerPC 603/604\n\
1269 -m403 generate code for PowerPC 403\n\
1270 -m405 generate code for PowerPC 405\n\
1271 -m440 generate code for PowerPC 440\n\
1272 -m464 generate code for PowerPC 464\n\
1273 -m476 generate code for PowerPC 476\n\
1274 -m7400, -m7410, -m7450, -m7455\n\
1275 generate code for PowerPC 7400/7410/7450/7455\n\
1276 -m750cl generate code for PowerPC 750cl\n\
1277 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1278 fprintf (stream, _("\
1279 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1280 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1281 -mbooke generate code for 32-bit PowerPC BookE\n\
1282 -ma2 generate code for A2 architecture\n\
1283 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1284 -mpower5, -mpwr5, -mpwr5x\n\
1285 generate code for Power5 architecture\n\
1286 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1287 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1288 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1289 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1290 -mcell generate code for Cell Broadband Engine architecture\n\
1291 -mcom generate code Power/PowerPC common instructions\n\
1292 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1293 fprintf (stream, _("\
1294 -maltivec generate code for AltiVec\n\
1295 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1296 -mhtm generate code for Hardware Transactional Memory\n\
1297 -me300 generate code for PowerPC e300 family\n\
1298 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1299 -me500mc, generate code for Freescale e500mc core complex\n\
1300 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1301 -me5500, generate code for Freescale e5500 core complex\n\
1302 -me6500, generate code for Freescale e6500 core complex\n\
1303 -mspe generate code for Motorola SPE instructions\n\
1304 -mvle generate code for Freescale VLE instructions\n\
1305 -mtitan generate code for AppliedMicro Titan core complex\n\
1306 -mregnames Allow symbolic names for registers\n\
1307 -mno-regnames Do not allow symbolic names for registers\n"));
1308 #ifdef OBJ_ELF
1309 fprintf (stream, _("\
1310 -mrelocatable support for GCC's -mrelocatble option\n\
1311 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1312 -memb set PPC_EMB bit in ELF flags\n\
1313 -mlittle, -mlittle-endian, -le\n\
1314 generate code for a little endian machine\n\
1315 -mbig, -mbig-endian, -be\n\
1316 generate code for a big endian machine\n\
1317 -msolaris generate code for Solaris\n\
1318 -mno-solaris do not generate code for Solaris\n\
1319 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1320 -V print assembler version number\n\
1321 -Qy, -Qn ignored\n"));
1322 #endif
1323 fprintf (stream, _("\
1324 -nops=count when aligning, more than COUNT nops uses a branch\n\
1325 -ppc476-workaround warn if emitting data to code sections\n"));
1326 }
1327
1328 /* Set ppc_cpu if it is not already set. */
1329
1330 static void
ppc_set_cpu(void)1331 ppc_set_cpu (void)
1332 {
1333 const char *default_os = TARGET_OS;
1334 const char *default_cpu = TARGET_CPU;
1335
1336 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1337 {
1338 if (ppc_obj64)
1339 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1340 else if (strncmp (default_os, "aix", 3) == 0
1341 && default_os[3] >= '4' && default_os[3] <= '9')
1342 ppc_cpu |= PPC_OPCODE_COMMON;
1343 else if (strncmp (default_os, "aix3", 4) == 0)
1344 ppc_cpu |= PPC_OPCODE_POWER;
1345 else if (strcmp (default_cpu, "rs6000") == 0)
1346 ppc_cpu |= PPC_OPCODE_POWER;
1347 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1348 ppc_cpu |= PPC_OPCODE_PPC;
1349 else
1350 as_fatal (_("unknown default cpu = %s, os = %s"),
1351 default_cpu, default_os);
1352 }
1353 }
1354
1355 /* Figure out the BFD architecture to use. This function and ppc_mach
1356 are called well before md_begin, when the output file is opened. */
1357
1358 enum bfd_architecture
ppc_arch(void)1359 ppc_arch (void)
1360 {
1361 const char *default_cpu = TARGET_CPU;
1362 ppc_set_cpu ();
1363
1364 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1365 return bfd_arch_powerpc;
1366 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1367 return bfd_arch_powerpc;
1368 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1369 return bfd_arch_rs6000;
1370 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1371 {
1372 if (strcmp (default_cpu, "rs6000") == 0)
1373 return bfd_arch_rs6000;
1374 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1375 return bfd_arch_powerpc;
1376 }
1377
1378 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1379 return bfd_arch_unknown;
1380 }
1381
1382 unsigned long
ppc_mach(void)1383 ppc_mach (void)
1384 {
1385 if (ppc_obj64)
1386 return bfd_mach_ppc64;
1387 else if (ppc_arch () == bfd_arch_rs6000)
1388 return bfd_mach_rs6k;
1389 else if (ppc_cpu & PPC_OPCODE_TITAN)
1390 return bfd_mach_ppc_titan;
1391 else if (ppc_cpu & PPC_OPCODE_VLE)
1392 return bfd_mach_ppc_vle;
1393 else
1394 return bfd_mach_ppc;
1395 }
1396
1397 extern const char*
ppc_target_format(void)1398 ppc_target_format (void)
1399 {
1400 #ifdef OBJ_COFF
1401 #ifdef TE_PE
1402 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1403 #elif TE_POWERMAC
1404 return "xcoff-powermac";
1405 #else
1406 # ifdef TE_AIX5
1407 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1408 # else
1409 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1410 # endif
1411 #endif
1412 #endif
1413 #ifdef OBJ_ELF
1414 # ifdef TE_FreeBSD
1415 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1416 # elif defined (TE_VXWORKS)
1417 return "elf32-powerpc-vxworks";
1418 # else
1419 return (target_big_endian
1420 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1421 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1422 # endif
1423 #endif
1424 }
1425
1426 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1427 Return TRUE if there's a problem, otherwise FALSE. */
1428
1429 static bfd_boolean
insn_validate(const struct powerpc_opcode * op)1430 insn_validate (const struct powerpc_opcode *op)
1431 {
1432 const unsigned char *o;
1433 unsigned long omask = op->mask;
1434
1435 /* The mask had better not trim off opcode bits. */
1436 if ((op->opcode & omask) != op->opcode)
1437 {
1438 as_bad (_("mask trims opcode bits for %s"), op->name);
1439 return TRUE;
1440 }
1441
1442 /* The operands must not overlap the opcode or each other. */
1443 for (o = op->operands; *o; ++o)
1444 {
1445 if (*o >= num_powerpc_operands)
1446 {
1447 as_bad (_("operand index error for %s"), op->name);
1448 return TRUE;
1449 }
1450 else
1451 {
1452 const struct powerpc_operand *operand = &powerpc_operands[*o];
1453 if (operand->shift != (int) PPC_OPSHIFT_INV)
1454 {
1455 unsigned long mask;
1456
1457 if (operand->shift >= 0)
1458 mask = operand->bitm << operand->shift;
1459 else
1460 mask = operand->bitm >> -operand->shift;
1461 if (omask & mask)
1462 {
1463 as_bad (_("operand %d overlap in %s"),
1464 (int) (o - op->operands), op->name);
1465 return TRUE;
1466 }
1467 omask |= mask;
1468 }
1469 }
1470 }
1471 return FALSE;
1472 }
1473
1474 /* Insert opcodes and macros into hash tables. Called at startup and
1475 for .machine pseudo. */
1476
1477 static void
ppc_setup_opcodes(void)1478 ppc_setup_opcodes (void)
1479 {
1480 const struct powerpc_opcode *op;
1481 const struct powerpc_opcode *op_end;
1482 const struct powerpc_macro *macro;
1483 const struct powerpc_macro *macro_end;
1484 bfd_boolean bad_insn = FALSE;
1485
1486 if (ppc_hash != NULL)
1487 hash_die (ppc_hash);
1488 if (ppc_macro_hash != NULL)
1489 hash_die (ppc_macro_hash);
1490
1491 /* Insert the opcodes into a hash table. */
1492 ppc_hash = hash_new ();
1493
1494 if (ENABLE_CHECKING)
1495 {
1496 unsigned int i;
1497
1498 /* An index into powerpc_operands is stored in struct fix
1499 fx_pcrel_adjust which is 8 bits wide. */
1500 gas_assert (num_powerpc_operands < 256);
1501
1502 /* Check operand masks. Code here and in the disassembler assumes
1503 all the 1's in the mask are contiguous. */
1504 for (i = 0; i < num_powerpc_operands; ++i)
1505 {
1506 unsigned long mask = powerpc_operands[i].bitm;
1507 unsigned long right_bit;
1508 unsigned int j;
1509
1510 right_bit = mask & -mask;
1511 mask += right_bit;
1512 right_bit = mask & -mask;
1513 if (mask != right_bit)
1514 {
1515 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1516 bad_insn = TRUE;
1517 }
1518 for (j = i + 1; j < num_powerpc_operands; ++j)
1519 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1520 sizeof (powerpc_operands[0])) == 0)
1521 {
1522 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1523 j, i);
1524 bad_insn = TRUE;
1525 }
1526 }
1527 }
1528
1529 op_end = powerpc_opcodes + powerpc_num_opcodes;
1530 for (op = powerpc_opcodes; op < op_end; op++)
1531 {
1532 if (ENABLE_CHECKING)
1533 {
1534 if (op != powerpc_opcodes)
1535 {
1536 int old_opcode = PPC_OP (op[-1].opcode);
1537 int new_opcode = PPC_OP (op[0].opcode);
1538
1539 #ifdef PRINT_OPCODE_TABLE
1540 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1541 op->name, (unsigned int) (op - powerpc_opcodes),
1542 (unsigned int) new_opcode, (unsigned int) op->opcode,
1543 (unsigned int) op->mask, (unsigned long long) op->flags);
1544 #endif
1545
1546 /* The major opcodes had better be sorted. Code in the
1547 disassembler assumes the insns are sorted according to
1548 major opcode. */
1549 if (new_opcode < old_opcode)
1550 {
1551 as_bad (_("major opcode is not sorted for %s"),
1552 op->name);
1553 bad_insn = TRUE;
1554 }
1555 }
1556 if ((op->flags & PPC_OPCODE_VLE) != 0)
1557 {
1558 as_bad (_("%s is enabled by vle flag"), op->name);
1559 bad_insn = TRUE;
1560 }
1561 if (PPC_OP (op->opcode) != 4
1562 && PPC_OP (op->opcode) != 31
1563 && (op->deprecated & PPC_OPCODE_VLE) == 0)
1564 {
1565 as_bad (_("%s not disabled by vle flag"), op->name);
1566 bad_insn = TRUE;
1567 }
1568 bad_insn |= insn_validate (op);
1569 }
1570
1571 if ((ppc_cpu & op->flags) != 0
1572 && !(ppc_cpu & op->deprecated))
1573 {
1574 const char *retval;
1575
1576 retval = hash_insert (ppc_hash, op->name, (void *) op);
1577 if (retval != NULL)
1578 {
1579 as_bad (_("duplicate instruction %s"),
1580 op->name);
1581 bad_insn = TRUE;
1582 }
1583 }
1584 }
1585
1586 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1587 for (op = powerpc_opcodes; op < op_end; op++)
1588 hash_insert (ppc_hash, op->name, (void *) op);
1589
1590 op_end = vle_opcodes + vle_num_opcodes;
1591 for (op = vle_opcodes; op < op_end; op++)
1592 {
1593 if (ENABLE_CHECKING)
1594 {
1595 if (op != vle_opcodes)
1596 {
1597 unsigned old_seg, new_seg;
1598
1599 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1600 old_seg = VLE_OP_TO_SEG (old_seg);
1601 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1602 new_seg = VLE_OP_TO_SEG (new_seg);
1603
1604 #ifdef PRINT_OPCODE_TABLE
1605 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1606 op->name, (unsigned int) (op - powerpc_opcodes),
1607 (unsigned int) new_seg, (unsigned int) op->opcode,
1608 (unsigned int) op->mask, (unsigned long long) op->flags);
1609 #endif
1610 /* The major opcodes had better be sorted. Code in the
1611 disassembler assumes the insns are sorted according to
1612 major opcode. */
1613 if (new_seg < old_seg)
1614 {
1615 as_bad (_("major opcode is not sorted for %s"),
1616 op->name);
1617 bad_insn = TRUE;
1618 }
1619 }
1620
1621 bad_insn |= insn_validate (op);
1622 }
1623
1624 if ((ppc_cpu & op->flags) != 0
1625 && !(ppc_cpu & op->deprecated))
1626 {
1627 const char *retval;
1628
1629 retval = hash_insert (ppc_hash, op->name, (void *) op);
1630 if (retval != NULL)
1631 {
1632 as_bad (_("duplicate instruction %s"),
1633 op->name);
1634 bad_insn = TRUE;
1635 }
1636 }
1637 }
1638
1639 /* Insert the macros into a hash table. */
1640 ppc_macro_hash = hash_new ();
1641
1642 macro_end = powerpc_macros + powerpc_num_macros;
1643 for (macro = powerpc_macros; macro < macro_end; macro++)
1644 {
1645 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1646 {
1647 const char *retval;
1648
1649 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1650 if (retval != (const char *) NULL)
1651 {
1652 as_bad (_("duplicate macro %s"), macro->name);
1653 bad_insn = TRUE;
1654 }
1655 }
1656 }
1657
1658 if (bad_insn)
1659 abort ();
1660 }
1661
1662 /* This function is called when the assembler starts up. It is called
1663 after the options have been parsed and the output file has been
1664 opened. */
1665
1666 void
md_begin(void)1667 md_begin (void)
1668 {
1669 ppc_set_cpu ();
1670
1671 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1672 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
1673
1674 #ifdef OBJ_ELF
1675 /* Set the ELF flags if desired. */
1676 if (ppc_flags && !msolaris)
1677 bfd_set_private_flags (stdoutput, ppc_flags);
1678 #endif
1679
1680 ppc_setup_opcodes ();
1681
1682 /* Tell the main code what the endianness is if it is not overridden
1683 by the user. */
1684 if (!set_target_endian)
1685 {
1686 set_target_endian = 1;
1687 target_big_endian = PPC_BIG_ENDIAN;
1688 }
1689
1690 #ifdef OBJ_XCOFF
1691 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1692
1693 /* Create dummy symbols to serve as initial csects. This forces the
1694 text csects to precede the data csects. These symbols will not
1695 be output. */
1696 ppc_text_csects = symbol_make ("dummy\001");
1697 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1698 ppc_data_csects = symbol_make ("dummy\001");
1699 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1700 #endif
1701
1702 #ifdef TE_PE
1703
1704 ppc_current_section = text_section;
1705 ppc_previous_section = 0;
1706
1707 #endif
1708 }
1709
1710 void
ppc_cleanup(void)1711 ppc_cleanup (void)
1712 {
1713 #ifdef OBJ_ELF
1714 if (ppc_apuinfo_list == NULL)
1715 return;
1716
1717 /* Ok, so write the section info out. We have this layout:
1718
1719 byte data what
1720 ---- ---- ----
1721 0 8 length of "APUinfo\0"
1722 4 (n*4) number of APU's (4 bytes each)
1723 8 2 note type 2
1724 12 "APUinfo\0" name
1725 20 APU#1 first APU's info
1726 24 APU#2 second APU's info
1727 ... ...
1728 */
1729 {
1730 char *p;
1731 asection *seg = now_seg;
1732 subsegT subseg = now_subseg;
1733 asection *apuinfo_secp = (asection *) NULL;
1734 unsigned int i;
1735
1736 /* Create the .PPC.EMB.apuinfo section. */
1737 apuinfo_secp = subseg_new (APUINFO_SECTION_NAME, 0);
1738 bfd_set_section_flags (stdoutput,
1739 apuinfo_secp,
1740 SEC_HAS_CONTENTS | SEC_READONLY);
1741
1742 p = frag_more (4);
1743 md_number_to_chars (p, (valueT) 8, 4);
1744
1745 p = frag_more (4);
1746 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1747
1748 p = frag_more (4);
1749 md_number_to_chars (p, (valueT) 2, 4);
1750
1751 p = frag_more (8);
1752 strcpy (p, APUINFO_LABEL);
1753
1754 for (i = 0; i < ppc_apuinfo_num; i++)
1755 {
1756 p = frag_more (4);
1757 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1758 }
1759
1760 frag_align (2, 0, 0);
1761
1762 /* We probably can't restore the current segment, for there likely
1763 isn't one yet... */
1764 if (seg && subseg)
1765 subseg_set (seg, subseg);
1766 }
1767 #endif
1768 }
1769
1770 /* Insert an operand value into an instruction. */
1771
1772 static unsigned long
ppc_insert_operand(unsigned long insn,const struct powerpc_operand * operand,offsetT val,ppc_cpu_t cpu,const char * file,unsigned int line)1773 ppc_insert_operand (unsigned long insn,
1774 const struct powerpc_operand *operand,
1775 offsetT val,
1776 ppc_cpu_t cpu,
1777 const char *file,
1778 unsigned int line)
1779 {
1780 long min, max, right;
1781
1782 max = operand->bitm;
1783 right = max & -max;
1784 min = 0;
1785
1786 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
1787 {
1788 /* Extend the allowed range for addis to [-32768, 65535].
1789 Similarly for cmpli and some VLE high part insns. For 64-bit
1790 it would be good to disable this for signed fields since the
1791 value is sign extended into the high 32 bits of the register.
1792 If the value is, say, an address, then we might care about
1793 the high bits. However, gcc as of 2014-06 uses unsigned
1794 values when loading the high part of 64-bit constants using
1795 lis. */
1796 min = ~(max >> 1) & -right;
1797 }
1798 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1799 {
1800 max = (max >> 1) & -right;
1801 min = ~max & -right;
1802 }
1803
1804 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1805 max++;
1806
1807 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1808 {
1809 long tmp = min;
1810 min = -max;
1811 max = -tmp;
1812 }
1813
1814 if (min <= max)
1815 {
1816 /* Some people write constants with the sign extension done by
1817 hand but only up to 32 bits. This shouldn't really be valid,
1818 but, to permit this code to assemble on a 64-bit host, we
1819 sign extend the 32-bit value to 64 bits if so doing makes the
1820 value valid. */
1821 if (val > max
1822 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1823 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1824 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1825 val = val - 0x80000000 - 0x80000000;
1826
1827 /* Similarly, people write expressions like ~(1<<15), and expect
1828 this to be OK for a 32-bit unsigned value. */
1829 else if (val < min
1830 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1831 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1832 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1833 val = val + 0x80000000 + 0x80000000;
1834
1835 else if (val < min
1836 || val > max
1837 || (val & (right - 1)) != 0)
1838 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1839 }
1840
1841 if (operand->insert)
1842 {
1843 const char *errmsg;
1844
1845 errmsg = NULL;
1846 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
1847 if (errmsg != (const char *) NULL)
1848 as_bad_where (file, line, "%s", errmsg);
1849 }
1850 else if (operand->shift >= 0)
1851 insn |= ((long) val & operand->bitm) << operand->shift;
1852 else
1853 insn |= ((long) val & operand->bitm) >> -operand->shift;
1854
1855 return insn;
1856 }
1857
1858
1859 #ifdef OBJ_ELF
1860 /* Parse @got, etc. and return the desired relocation. */
1861 static bfd_reloc_code_real_type
ppc_elf_suffix(char ** str_p,expressionS * exp_p)1862 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1863 {
1864 struct map_bfd {
1865 const char *string;
1866 unsigned int length : 8;
1867 unsigned int valid32 : 1;
1868 unsigned int valid64 : 1;
1869 unsigned int reloc;
1870 };
1871
1872 char ident[20];
1873 char *str = *str_p;
1874 char *str2;
1875 int ch;
1876 int len;
1877 const struct map_bfd *ptr;
1878
1879 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1880 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1881 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1882
1883 static const struct map_bfd mapping[] = {
1884 MAP ("l", BFD_RELOC_LO16),
1885 MAP ("h", BFD_RELOC_HI16),
1886 MAP ("ha", BFD_RELOC_HI16_S),
1887 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1888 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1889 MAP ("got", BFD_RELOC_16_GOTOFF),
1890 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1891 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1892 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1893 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1894 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1895 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1896 MAP ("copy", BFD_RELOC_PPC_COPY),
1897 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1898 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1899 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1900 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1901 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1902 MAP ("tls", BFD_RELOC_PPC_TLS),
1903 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1904 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1905 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1906 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1907 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1908 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1909 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1910 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1911 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1912 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1913 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1914 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1915 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1916 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1917 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1918 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1919 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1920 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1921 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1922 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1923 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1924 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1925 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1926 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1927 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1928 MAP32 ("fixup", BFD_RELOC_CTOR),
1929 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1930 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1931 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1932 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1933 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1934 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1935 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1936 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1937 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
1938 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1939 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1940 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1941 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1942 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1943 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1944 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1945 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1946 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1947 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
1948 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1949 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1950 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1951 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1952 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1953 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1954 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1955 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1956 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1957 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
1958 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1959 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1960 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1961 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1962 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1963 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1964 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1965 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1966 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1967 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1968 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
1969 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1970 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1971 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1972 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1973 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
1974 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1975 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
1976 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1977 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1978 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1979 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1980 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
1981 };
1982
1983 if (*str++ != '@')
1984 return BFD_RELOC_NONE;
1985
1986 for (ch = *str, str2 = ident;
1987 (str2 < ident + sizeof (ident) - 1
1988 && (ISALNUM (ch) || ch == '@'));
1989 ch = *++str)
1990 {
1991 *str2++ = TOLOWER (ch);
1992 }
1993
1994 *str2 = '\0';
1995 len = str2 - ident;
1996
1997 ch = ident[0];
1998 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1999 if (ch == ptr->string[0]
2000 && len == ptr->length
2001 && memcmp (ident, ptr->string, ptr->length) == 0
2002 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
2003 {
2004 int reloc = ptr->reloc;
2005
2006 if (!ppc_obj64 && exp_p->X_add_number != 0)
2007 {
2008 switch (reloc)
2009 {
2010 case BFD_RELOC_16_GOTOFF:
2011 case BFD_RELOC_LO16_GOTOFF:
2012 case BFD_RELOC_HI16_GOTOFF:
2013 case BFD_RELOC_HI16_S_GOTOFF:
2014 as_warn (_("identifier+constant@got means "
2015 "identifier@got+constant"));
2016 break;
2017
2018 case BFD_RELOC_PPC_GOT_TLSGD16:
2019 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2020 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2021 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2022 case BFD_RELOC_PPC_GOT_TLSLD16:
2023 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2024 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2025 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2026 case BFD_RELOC_PPC_GOT_DTPREL16:
2027 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2028 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2029 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2030 case BFD_RELOC_PPC_GOT_TPREL16:
2031 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2032 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2033 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2034 as_bad (_("symbol+offset not supported for got tls"));
2035 break;
2036 }
2037 }
2038
2039 /* Now check for identifier@suffix+constant. */
2040 if (*str == '-' || *str == '+')
2041 {
2042 char *orig_line = input_line_pointer;
2043 expressionS new_exp;
2044
2045 input_line_pointer = str;
2046 expression (&new_exp);
2047 if (new_exp.X_op == O_constant)
2048 {
2049 exp_p->X_add_number += new_exp.X_add_number;
2050 str = input_line_pointer;
2051 }
2052
2053 if (&input_line_pointer != str_p)
2054 input_line_pointer = orig_line;
2055 }
2056 *str_p = str;
2057
2058 if (reloc == (int) BFD_RELOC_PPC64_TOC
2059 && exp_p->X_op == O_symbol
2060 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
2061 {
2062 /* Change the symbol so that the dummy .TOC. symbol can be
2063 omitted from the object file. */
2064 exp_p->X_add_symbol = &abs_symbol;
2065 }
2066
2067 return (bfd_reloc_code_real_type) reloc;
2068 }
2069
2070 return BFD_RELOC_NONE;
2071 }
2072
2073 /* Support @got, etc. on constants emitted via .short, .int etc. */
2074
2075 bfd_reloc_code_real_type
ppc_elf_parse_cons(expressionS * exp,unsigned int nbytes)2076 ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2077 {
2078 expression (exp);
2079 if (nbytes >= 2 && *input_line_pointer == '@')
2080 return ppc_elf_suffix (&input_line_pointer, exp);
2081 return BFD_RELOC_NONE;
2082 }
2083
2084 /* Warn when emitting data to code sections, unless we are emitting
2085 a relocation that ld --ppc476-workaround uses to recognise data
2086 *and* there was an unconditional branch prior to the data. */
2087
2088 void
ppc_elf_cons_fix_check(expressionS * exp ATTRIBUTE_UNUSED,unsigned int nbytes,fixS * fix)2089 ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2090 unsigned int nbytes, fixS *fix)
2091 {
2092 if (warn_476
2093 && (now_seg->flags & SEC_CODE) != 0
2094 && (nbytes != 4
2095 || fix == NULL
2096 || !(fix->fx_r_type == BFD_RELOC_32
2097 || fix->fx_r_type == BFD_RELOC_CTOR
2098 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2099 || !(last_seg == now_seg && last_subseg == now_subseg)
2100 || !((last_insn & (0x3f << 26)) == (18u << 26)
2101 || ((last_insn & (0x3f << 26)) == (16u << 26)
2102 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2103 || ((last_insn & (0x3f << 26)) == (19u << 26)
2104 && (last_insn & (0x3ff << 1)) == (16u << 1)
2105 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2106 {
2107 /* Flag that we've warned. */
2108 if (fix != NULL)
2109 fix->fx_tcbit = 1;
2110
2111 as_warn (_("data in executable section"));
2112 }
2113 }
2114
2115 /* Solaris pseduo op to change to the .rodata section. */
2116 static void
ppc_elf_rdata(int xxx)2117 ppc_elf_rdata (int xxx)
2118 {
2119 char *save_line = input_line_pointer;
2120 static char section[] = ".rodata\n";
2121
2122 /* Just pretend this is .section .rodata */
2123 input_line_pointer = section;
2124 obj_elf_section (xxx);
2125
2126 input_line_pointer = save_line;
2127 }
2128
2129 /* Pseudo op to make file scope bss items. */
2130 static void
ppc_elf_lcomm(int xxx ATTRIBUTE_UNUSED)2131 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
2132 {
2133 char *name;
2134 char c;
2135 char *p;
2136 offsetT size;
2137 symbolS *symbolP;
2138 offsetT align;
2139 segT old_sec;
2140 int old_subsec;
2141 char *pfrag;
2142 int align2;
2143
2144 c = get_symbol_name (&name);
2145
2146 /* Just after name is now '\0'. */
2147 p = input_line_pointer;
2148 *p = c;
2149 SKIP_WHITESPACE_AFTER_NAME ();
2150 if (*input_line_pointer != ',')
2151 {
2152 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2153 ignore_rest_of_line ();
2154 return;
2155 }
2156
2157 input_line_pointer++; /* skip ',' */
2158 if ((size = get_absolute_expression ()) < 0)
2159 {
2160 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2161 ignore_rest_of_line ();
2162 return;
2163 }
2164
2165 /* The third argument to .lcomm is the alignment. */
2166 if (*input_line_pointer != ',')
2167 align = 8;
2168 else
2169 {
2170 ++input_line_pointer;
2171 align = get_absolute_expression ();
2172 if (align <= 0)
2173 {
2174 as_warn (_("ignoring bad alignment"));
2175 align = 8;
2176 }
2177 }
2178
2179 *p = 0;
2180 symbolP = symbol_find_or_make (name);
2181 *p = c;
2182
2183 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2184 {
2185 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2186 S_GET_NAME (symbolP));
2187 ignore_rest_of_line ();
2188 return;
2189 }
2190
2191 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2192 {
2193 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2194 S_GET_NAME (symbolP),
2195 (long) S_GET_VALUE (symbolP),
2196 (long) size);
2197
2198 ignore_rest_of_line ();
2199 return;
2200 }
2201
2202 /* Allocate_bss. */
2203 old_sec = now_seg;
2204 old_subsec = now_subseg;
2205 if (align)
2206 {
2207 /* Convert to a power of 2 alignment. */
2208 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2209 if (align != 1)
2210 {
2211 as_bad (_("common alignment not a power of 2"));
2212 ignore_rest_of_line ();
2213 return;
2214 }
2215 }
2216 else
2217 align2 = 0;
2218
2219 record_alignment (bss_section, align2);
2220 subseg_set (bss_section, 1);
2221 if (align2)
2222 frag_align (align2, 0, 0);
2223 if (S_GET_SEGMENT (symbolP) == bss_section)
2224 symbol_get_frag (symbolP)->fr_symbol = 0;
2225 symbol_set_frag (symbolP, frag_now);
2226 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2227 (char *) 0);
2228 *pfrag = 0;
2229 S_SET_SIZE (symbolP, size);
2230 S_SET_SEGMENT (symbolP, bss_section);
2231 subseg_set (old_sec, old_subsec);
2232 demand_empty_rest_of_line ();
2233 }
2234
2235 /* Pseudo op to set symbol local entry point. */
2236 static void
ppc_elf_localentry(int ignore ATTRIBUTE_UNUSED)2237 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2238 {
2239 char *name;
2240 char c = get_symbol_name (&name);
2241 char *p;
2242 expressionS exp;
2243 symbolS *sym;
2244 asymbol *bfdsym;
2245 elf_symbol_type *elfsym;
2246
2247 p = input_line_pointer;
2248 *p = c;
2249 SKIP_WHITESPACE_AFTER_NAME ();
2250 if (*input_line_pointer != ',')
2251 {
2252 *p = 0;
2253 as_bad (_("expected comma after name `%s' in .localentry directive"),
2254 name);
2255 *p = c;
2256 ignore_rest_of_line ();
2257 return;
2258 }
2259 input_line_pointer++;
2260 expression (&exp);
2261 if (exp.X_op == O_absent)
2262 {
2263 as_bad (_("missing expression in .localentry directive"));
2264 exp.X_op = O_constant;
2265 exp.X_add_number = 0;
2266 }
2267 *p = 0;
2268 sym = symbol_find_or_make (name);
2269 *p = c;
2270
2271 if (resolve_expression (&exp)
2272 && exp.X_op == O_constant)
2273 {
2274 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2275
2276 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
2277 as_bad (_(".localentry expression for `%s' "
2278 "is not a valid power of 2"), S_GET_NAME (sym));
2279 else
2280 {
2281 bfdsym = symbol_get_bfdsym (sym);
2282 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2283 gas_assert (elfsym);
2284 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2285 elfsym->internal_elf_sym.st_other |= encoded;
2286 if (ppc_abiversion == 0)
2287 ppc_abiversion = 2;
2288 }
2289 }
2290 else
2291 as_bad (_(".localentry expression for `%s' "
2292 "does not evaluate to a constant"), S_GET_NAME (sym));
2293
2294 demand_empty_rest_of_line ();
2295 }
2296
2297 /* Pseudo op to set ABI version. */
2298 static void
ppc_elf_abiversion(int ignore ATTRIBUTE_UNUSED)2299 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2300 {
2301 expressionS exp;
2302
2303 expression (&exp);
2304 if (exp.X_op == O_absent)
2305 {
2306 as_bad (_("missing expression in .abiversion directive"));
2307 exp.X_op = O_constant;
2308 exp.X_add_number = 0;
2309 }
2310
2311 if (resolve_expression (&exp)
2312 && exp.X_op == O_constant)
2313 ppc_abiversion = exp.X_add_number;
2314 else
2315 as_bad (_(".abiversion expression does not evaluate to a constant"));
2316 demand_empty_rest_of_line ();
2317 }
2318
2319 /* Parse a .gnu_attribute directive. */
2320 static void
ppc_elf_gnu_attribute(int ignored ATTRIBUTE_UNUSED)2321 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED)
2322 {
2323 int tag = obj_elf_vendor_attribute (OBJ_ATTR_GNU);
2324
2325 /* Check validity of defined powerpc tags. */
2326 if (tag == Tag_GNU_Power_ABI_FP
2327 || tag == Tag_GNU_Power_ABI_Vector
2328 || tag == Tag_GNU_Power_ABI_Struct_Return)
2329 {
2330 unsigned int val;
2331
2332 val = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU, tag);
2333
2334 if ((tag == Tag_GNU_Power_ABI_FP && val > 15)
2335 || (tag == Tag_GNU_Power_ABI_Vector && val > 3)
2336 || (tag == Tag_GNU_Power_ABI_Struct_Return && val > 2))
2337 as_warn (_("unknown .gnu_attribute value"));
2338 }
2339 }
2340
2341 /* Set ABI version in output file. */
2342 void
ppc_elf_end(void)2343 ppc_elf_end (void)
2344 {
2345 if (ppc_obj64 && ppc_abiversion != 0)
2346 {
2347 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2348 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2349 }
2350 }
2351
2352 /* Validate any relocations emitted for -mrelocatable, possibly adding
2353 fixups for word relocations in writable segments, so we can adjust
2354 them at runtime. */
2355 static void
ppc_elf_validate_fix(fixS * fixp,segT seg)2356 ppc_elf_validate_fix (fixS *fixp, segT seg)
2357 {
2358 if (fixp->fx_done || fixp->fx_pcrel)
2359 return;
2360
2361 switch (shlib)
2362 {
2363 case SHLIB_NONE:
2364 case SHLIB_PIC:
2365 return;
2366
2367 case SHLIB_MRELOCATABLE:
2368 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2369 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2370 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2371 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2372 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2373 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2374 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2375 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2376 && (seg->flags & SEC_LOAD) != 0
2377 && strcmp (segment_name (seg), ".got2") != 0
2378 && strcmp (segment_name (seg), ".dtors") != 0
2379 && strcmp (segment_name (seg), ".ctors") != 0
2380 && strcmp (segment_name (seg), ".fixup") != 0
2381 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2382 && strcmp (segment_name (seg), ".eh_frame") != 0
2383 && strcmp (segment_name (seg), ".ex_shared") != 0)
2384 {
2385 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2386 || fixp->fx_r_type != BFD_RELOC_CTOR)
2387 {
2388 as_bad_where (fixp->fx_file, fixp->fx_line,
2389 _("relocation cannot be done when using -mrelocatable"));
2390 }
2391 }
2392 return;
2393 }
2394 }
2395
2396 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2397 function descriptor sym if the corresponding code sym is used. */
2398
2399 void
ppc_frob_file_before_adjust(void)2400 ppc_frob_file_before_adjust (void)
2401 {
2402 symbolS *symp;
2403 asection *toc;
2404
2405 if (!ppc_obj64)
2406 return;
2407
2408 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2409 {
2410 const char *name;
2411 char *dotname;
2412 symbolS *dotsym;
2413
2414 name = S_GET_NAME (symp);
2415 if (name[0] == '.')
2416 continue;
2417
2418 if (! S_IS_WEAK (symp)
2419 || S_IS_DEFINED (symp))
2420 continue;
2421
2422 dotname = concat (".", name, (char *) NULL);
2423 dotsym = symbol_find_noref (dotname, 1);
2424 free (dotname);
2425 if (dotsym != NULL && (symbol_used_p (dotsym)
2426 || symbol_used_in_reloc_p (dotsym)))
2427 symbol_mark_used (symp);
2428
2429 }
2430
2431 toc = bfd_get_section_by_name (stdoutput, ".toc");
2432 if (toc != NULL
2433 && toc_reloc_types != has_large_toc_reloc
2434 && bfd_section_size (stdoutput, toc) > 0x10000)
2435 as_warn (_("TOC section size exceeds 64k"));
2436 }
2437
2438 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2439 emitted. Other uses of .TOC. will cause the symbol to be marked
2440 with BSF_KEEP in md_apply_fix. */
2441
2442 void
ppc_elf_adjust_symtab(void)2443 ppc_elf_adjust_symtab (void)
2444 {
2445 if (ppc_obj64)
2446 {
2447 symbolS *symp;
2448 symp = symbol_find (".TOC.");
2449 if (symp != NULL)
2450 {
2451 asymbol *bsym = symbol_get_bfdsym (symp);
2452 if ((bsym->flags & BSF_KEEP) == 0)
2453 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2454 }
2455 }
2456 }
2457 #endif /* OBJ_ELF */
2458
2459 #ifdef TE_PE
2460
2461 /*
2462 * Summary of parse_toc_entry.
2463 *
2464 * in: Input_line_pointer points to the '[' in one of:
2465 *
2466 * [toc] [tocv] [toc32] [toc64]
2467 *
2468 * Anything else is an error of one kind or another.
2469 *
2470 * out:
2471 * return value: success or failure
2472 * toc_kind: kind of toc reference
2473 * input_line_pointer:
2474 * success: first char after the ']'
2475 * failure: unchanged
2476 *
2477 * settings:
2478 *
2479 * [toc] - rv == success, toc_kind = default_toc
2480 * [tocv] - rv == success, toc_kind = data_in_toc
2481 * [toc32] - rv == success, toc_kind = must_be_32
2482 * [toc64] - rv == success, toc_kind = must_be_64
2483 *
2484 */
2485
2486 enum toc_size_qualifier
2487 {
2488 default_toc, /* The toc cell constructed should be the system default size */
2489 data_in_toc, /* This is a direct reference to a toc cell */
2490 must_be_32, /* The toc cell constructed must be 32 bits wide */
2491 must_be_64 /* The toc cell constructed must be 64 bits wide */
2492 };
2493
2494 static int
parse_toc_entry(enum toc_size_qualifier * toc_kind)2495 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2496 {
2497 char *start;
2498 char *toc_spec;
2499 char c;
2500 enum toc_size_qualifier t;
2501
2502 /* Save the input_line_pointer. */
2503 start = input_line_pointer;
2504
2505 /* Skip over the '[' , and whitespace. */
2506 ++input_line_pointer;
2507 SKIP_WHITESPACE ();
2508
2509 /* Find the spelling of the operand. */
2510 c = get_symbol_name (&toc_spec);
2511
2512 if (strcmp (toc_spec, "toc") == 0)
2513 {
2514 t = default_toc;
2515 }
2516 else if (strcmp (toc_spec, "tocv") == 0)
2517 {
2518 t = data_in_toc;
2519 }
2520 else if (strcmp (toc_spec, "toc32") == 0)
2521 {
2522 t = must_be_32;
2523 }
2524 else if (strcmp (toc_spec, "toc64") == 0)
2525 {
2526 t = must_be_64;
2527 }
2528 else
2529 {
2530 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2531 *input_line_pointer = c;
2532 input_line_pointer = start;
2533 return 0;
2534 }
2535
2536 /* Now find the ']'. */
2537 *input_line_pointer = c;
2538
2539 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2540 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2541
2542 if (c != ']')
2543 {
2544 as_bad (_("syntax error: expected `]', found `%c'"), c);
2545 input_line_pointer = start;
2546 return 0;
2547 }
2548
2549 *toc_kind = t;
2550 return 1;
2551 }
2552 #endif
2553
2554 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2555 /* See whether a symbol is in the TOC section. */
2556
2557 static int
ppc_is_toc_sym(symbolS * sym)2558 ppc_is_toc_sym (symbolS *sym)
2559 {
2560 #ifdef OBJ_XCOFF
2561 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2562 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
2563 #endif
2564 #ifdef OBJ_ELF
2565 const char *sname = segment_name (S_GET_SEGMENT (sym));
2566 if (ppc_obj64)
2567 return strcmp (sname, ".toc") == 0;
2568 else
2569 return strcmp (sname, ".got") == 0;
2570 #endif
2571 }
2572 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2573
2574
2575 #ifdef OBJ_ELF
2576 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2577 static void
ppc_apuinfo_section_add(unsigned int apu,unsigned int version)2578 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2579 {
2580 unsigned int i;
2581
2582 /* Check we don't already exist. */
2583 for (i = 0; i < ppc_apuinfo_num; i++)
2584 if (ppc_apuinfo_list[i] == APUID (apu, version))
2585 return;
2586
2587 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2588 {
2589 if (ppc_apuinfo_num_alloc == 0)
2590 {
2591 ppc_apuinfo_num_alloc = 4;
2592 ppc_apuinfo_list = XNEWVEC (unsigned long, ppc_apuinfo_num_alloc);
2593 }
2594 else
2595 {
2596 ppc_apuinfo_num_alloc += 4;
2597 ppc_apuinfo_list = XRESIZEVEC (unsigned long, ppc_apuinfo_list,
2598 ppc_apuinfo_num_alloc);
2599 }
2600 }
2601 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2602 }
2603 #undef APUID
2604 #endif
2605
2606
2607 /* We need to keep a list of fixups. We can't simply generate them as
2608 we go, because that would require us to first create the frag, and
2609 that would screw up references to ``.''. */
2610
2611 struct ppc_fixup
2612 {
2613 expressionS exp;
2614 int opindex;
2615 bfd_reloc_code_real_type reloc;
2616 };
2617
2618 #define MAX_INSN_FIXUPS (5)
2619
2620 /* Form I16L. */
2621 #define E_OR2I_INSN 0x7000C000
2622 #define E_AND2I_DOT_INSN 0x7000C800
2623 #define E_OR2IS_INSN 0x7000D000
2624 #define E_LIS_INSN 0x7000E000
2625 #define E_AND2IS_DOT_INSN 0x7000E800
2626
2627 /* Form I16A. */
2628 #define E_ADD2I_DOT_INSN 0x70008800
2629 #define E_ADD2IS_INSN 0x70009000
2630 #define E_CMP16I_INSN 0x70009800
2631 #define E_MULL2I_INSN 0x7000A000
2632 #define E_CMPL16I_INSN 0x7000A800
2633 #define E_CMPH16I_INSN 0x7000B000
2634 #define E_CMPHL16I_INSN 0x7000B800
2635
2636 /* This routine is called for each instruction to be assembled. */
2637
2638 void
md_assemble(char * str)2639 md_assemble (char *str)
2640 {
2641 char *s;
2642 const struct powerpc_opcode *opcode;
2643 unsigned long insn;
2644 const unsigned char *opindex_ptr;
2645 int skip_optional;
2646 int need_paren;
2647 int next_opindex;
2648 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2649 int fc;
2650 char *f;
2651 int addr_mod;
2652 int i;
2653 unsigned int insn_length;
2654
2655 /* Get the opcode. */
2656 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2657 ;
2658 if (*s != '\0')
2659 *s++ = '\0';
2660
2661 /* Look up the opcode in the hash table. */
2662 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2663 if (opcode == (const struct powerpc_opcode *) NULL)
2664 {
2665 const struct powerpc_macro *macro;
2666
2667 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2668 if (macro == (const struct powerpc_macro *) NULL)
2669 as_bad (_("unrecognized opcode: `%s'"), str);
2670 else
2671 ppc_macro (s, macro);
2672
2673 return;
2674 }
2675
2676 insn = opcode->opcode;
2677
2678 str = s;
2679 while (ISSPACE (*str))
2680 ++str;
2681
2682 /* PowerPC operands are just expressions. The only real issue is
2683 that a few operand types are optional. All cases which might use
2684 an optional operand separate the operands only with commas (in some
2685 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2686 have optional operands). Most instructions with optional operands
2687 have only one. Those that have more than one optional operand can
2688 take either all their operands or none. So, before we start seriously
2689 parsing the operands, we check to see if we have optional operands,
2690 and if we do, we count the number of commas to see which operands
2691 have been omitted. */
2692 skip_optional = 0;
2693 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2694 {
2695 const struct powerpc_operand *operand;
2696
2697 operand = &powerpc_operands[*opindex_ptr];
2698 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2699 {
2700 unsigned int opcount;
2701 unsigned int num_operands_expected;
2702
2703 /* There is an optional operand. Count the number of
2704 commas in the input line. */
2705 if (*str == '\0')
2706 opcount = 0;
2707 else
2708 {
2709 opcount = 1;
2710 s = str;
2711 while ((s = strchr (s, ',')) != (char *) NULL)
2712 {
2713 ++opcount;
2714 ++s;
2715 }
2716 }
2717
2718 /* Compute the number of expected operands.
2719 Do not count fake operands. */
2720 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2721 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2722 ++ num_operands_expected;
2723
2724 /* If there are fewer operands in the line then are called
2725 for by the instruction, we want to skip the optional
2726 operands. */
2727 if (opcount < num_operands_expected)
2728 skip_optional = 1;
2729
2730 break;
2731 }
2732 }
2733
2734 /* Gather the operands. */
2735 need_paren = 0;
2736 next_opindex = 0;
2737 fc = 0;
2738 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2739 {
2740 const struct powerpc_operand *operand;
2741 const char *errmsg;
2742 char *hold;
2743 expressionS ex;
2744 char endc;
2745
2746 if (next_opindex == 0)
2747 operand = &powerpc_operands[*opindex_ptr];
2748 else
2749 {
2750 operand = &powerpc_operands[next_opindex];
2751 next_opindex = 0;
2752 }
2753 errmsg = NULL;
2754
2755 /* If this is a fake operand, then we do not expect anything
2756 from the input. */
2757 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2758 {
2759 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2760 if (errmsg != (const char *) NULL)
2761 as_bad ("%s", errmsg);
2762 continue;
2763 }
2764
2765 /* If this is an optional operand, and we are skipping it, just
2766 insert a zero. */
2767 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2768 && skip_optional)
2769 {
2770 long val = ppc_optional_operand_value (operand);
2771 if (operand->insert)
2772 {
2773 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
2774 if (errmsg != (const char *) NULL)
2775 as_bad ("%s", errmsg);
2776 }
2777 else if (operand->shift >= 0)
2778 insn |= ((long) val & operand->bitm) << operand->shift;
2779 else
2780 insn |= ((long) val & operand->bitm) >> -operand->shift;
2781
2782 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2783 next_opindex = *opindex_ptr + 1;
2784 continue;
2785 }
2786
2787 /* Gather the operand. */
2788 hold = input_line_pointer;
2789 input_line_pointer = str;
2790
2791 #ifdef TE_PE
2792 if (*input_line_pointer == '[')
2793 {
2794 /* We are expecting something like the second argument here:
2795 *
2796 * lwz r4,[toc].GS.0.static_int(rtoc)
2797 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2798 * The argument following the `]' must be a symbol name, and the
2799 * register must be the toc register: 'rtoc' or '2'
2800 *
2801 * The effect is to 0 as the displacement field
2802 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2803 * the appropriate variation) reloc against it based on the symbol.
2804 * The linker will build the toc, and insert the resolved toc offset.
2805 *
2806 * Note:
2807 * o The size of the toc entry is currently assumed to be
2808 * 32 bits. This should not be assumed to be a hard coded
2809 * number.
2810 * o In an effort to cope with a change from 32 to 64 bits,
2811 * there are also toc entries that are specified to be
2812 * either 32 or 64 bits:
2813 * lwz r4,[toc32].GS.0.static_int(rtoc)
2814 * lwz r4,[toc64].GS.0.static_int(rtoc)
2815 * These demand toc entries of the specified size, and the
2816 * instruction probably requires it.
2817 */
2818
2819 int valid_toc;
2820 enum toc_size_qualifier toc_kind;
2821 bfd_reloc_code_real_type toc_reloc;
2822
2823 /* Go parse off the [tocXX] part. */
2824 valid_toc = parse_toc_entry (&toc_kind);
2825
2826 if (!valid_toc)
2827 {
2828 ignore_rest_of_line ();
2829 break;
2830 }
2831
2832 /* Now get the symbol following the ']'. */
2833 expression (&ex);
2834
2835 switch (toc_kind)
2836 {
2837 case default_toc:
2838 /* In this case, we may not have seen the symbol yet,
2839 since it is allowed to appear on a .extern or .globl
2840 or just be a label in the .data section. */
2841 toc_reloc = BFD_RELOC_PPC_TOC16;
2842 break;
2843 case data_in_toc:
2844 /* 1. The symbol must be defined and either in the toc
2845 section, or a global.
2846 2. The reloc generated must have the TOCDEFN flag set
2847 in upper bit mess of the reloc type.
2848 FIXME: It's a little confusing what the tocv
2849 qualifier can be used for. At the very least, I've
2850 seen three uses, only one of which I'm sure I can
2851 explain. */
2852 if (ex.X_op == O_symbol)
2853 {
2854 gas_assert (ex.X_add_symbol != NULL);
2855 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2856 != tocdata_section)
2857 {
2858 as_bad (_("[tocv] symbol is not a toc symbol"));
2859 }
2860 }
2861
2862 toc_reloc = BFD_RELOC_PPC_TOC16;
2863 break;
2864 case must_be_32:
2865 /* FIXME: these next two specifically specify 32/64 bit
2866 toc entries. We don't support them today. Is this
2867 the right way to say that? */
2868 toc_reloc = BFD_RELOC_NONE;
2869 as_bad (_("unimplemented toc32 expression modifier"));
2870 break;
2871 case must_be_64:
2872 /* FIXME: see above. */
2873 toc_reloc = BFD_RELOC_NONE;
2874 as_bad (_("unimplemented toc64 expression modifier"));
2875 break;
2876 default:
2877 fprintf (stderr,
2878 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2879 toc_kind);
2880 abort ();
2881 break;
2882 }
2883
2884 /* We need to generate a fixup for this expression. */
2885 if (fc >= MAX_INSN_FIXUPS)
2886 as_fatal (_("too many fixups"));
2887
2888 fixups[fc].reloc = toc_reloc;
2889 fixups[fc].exp = ex;
2890 fixups[fc].opindex = *opindex_ptr;
2891 ++fc;
2892
2893 /* Ok. We've set up the fixup for the instruction. Now make it
2894 look like the constant 0 was found here. */
2895 ex.X_unsigned = 1;
2896 ex.X_op = O_constant;
2897 ex.X_add_number = 0;
2898 ex.X_add_symbol = NULL;
2899 ex.X_op_symbol = NULL;
2900 }
2901
2902 else
2903 #endif /* TE_PE */
2904 {
2905 if ((reg_names_p
2906 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2907 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2908 || !register_name (&ex))
2909 {
2910 char save_lex = lex_type['%'];
2911
2912 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2913 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
2914 {
2915 cr_operand = TRUE;
2916 lex_type['%'] |= LEX_BEGIN_NAME;
2917 }
2918 expression (&ex);
2919 cr_operand = FALSE;
2920 lex_type['%'] = save_lex;
2921 }
2922 }
2923
2924 str = input_line_pointer;
2925 input_line_pointer = hold;
2926
2927 if (ex.X_op == O_illegal)
2928 as_bad (_("illegal operand"));
2929 else if (ex.X_op == O_absent)
2930 as_bad (_("missing operand"));
2931 else if (ex.X_op == O_register)
2932 {
2933 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2934 ppc_cpu, (char *) NULL, 0);
2935 }
2936 else if (ex.X_op == O_constant)
2937 {
2938 #ifdef OBJ_ELF
2939 /* Allow @HA, @L, @H on constants. */
2940 bfd_reloc_code_real_type reloc;
2941 char *orig_str = str;
2942
2943 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
2944 switch (reloc)
2945 {
2946 default:
2947 str = orig_str;
2948 break;
2949
2950 case BFD_RELOC_LO16:
2951 ex.X_add_number &= 0xffff;
2952 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2953 ex.X_add_number = SEX16 (ex.X_add_number);
2954 break;
2955
2956 case BFD_RELOC_HI16:
2957 if (REPORT_OVERFLOW_HI && ppc_obj64)
2958 {
2959 /* PowerPC64 @h is tested for overflow. */
2960 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2961 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2962 {
2963 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2964 ex.X_add_number
2965 = ((addressT) ex.X_add_number ^ sign) - sign;
2966 }
2967 break;
2968 }
2969 /* Fall thru */
2970
2971 case BFD_RELOC_PPC64_ADDR16_HIGH:
2972 ex.X_add_number = PPC_HI (ex.X_add_number);
2973 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2974 ex.X_add_number = SEX16 (ex.X_add_number);
2975 break;
2976
2977 case BFD_RELOC_HI16_S:
2978 if (REPORT_OVERFLOW_HI && ppc_obj64)
2979 {
2980 /* PowerPC64 @ha is tested for overflow. */
2981 ex.X_add_number
2982 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2983 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2984 {
2985 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2986 ex.X_add_number
2987 = ((addressT) ex.X_add_number ^ sign) - sign;
2988 }
2989 break;
2990 }
2991 /* Fall thru */
2992
2993 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2994 ex.X_add_number = PPC_HA (ex.X_add_number);
2995 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2996 ex.X_add_number = SEX16 (ex.X_add_number);
2997 break;
2998
2999 case BFD_RELOC_PPC64_HIGHER:
3000 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
3001 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3002 ex.X_add_number = SEX16 (ex.X_add_number);
3003 break;
3004
3005 case BFD_RELOC_PPC64_HIGHER_S:
3006 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
3007 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3008 ex.X_add_number = SEX16 (ex.X_add_number);
3009 break;
3010
3011 case BFD_RELOC_PPC64_HIGHEST:
3012 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
3013 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3014 ex.X_add_number = SEX16 (ex.X_add_number);
3015 break;
3016
3017 case BFD_RELOC_PPC64_HIGHEST_S:
3018 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
3019 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3020 ex.X_add_number = SEX16 (ex.X_add_number);
3021 break;
3022 }
3023 #endif /* OBJ_ELF */
3024 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
3025 ppc_cpu, (char *) NULL, 0);
3026 }
3027 else
3028 {
3029 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3030 #ifdef OBJ_ELF
3031 if (ex.X_op == O_symbol && str[0] == '(')
3032 {
3033 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3034 if (sym_name[0] == '.')
3035 ++sym_name;
3036
3037 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
3038 {
3039 expressionS tls_exp;
3040
3041 hold = input_line_pointer;
3042 input_line_pointer = str + 1;
3043 expression (&tls_exp);
3044 if (tls_exp.X_op == O_symbol)
3045 {
3046 reloc = BFD_RELOC_NONE;
3047 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3048 {
3049 reloc = BFD_RELOC_PPC_TLSGD;
3050 input_line_pointer += 7;
3051 }
3052 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3053 {
3054 reloc = BFD_RELOC_PPC_TLSLD;
3055 input_line_pointer += 7;
3056 }
3057 if (reloc != BFD_RELOC_NONE)
3058 {
3059 SKIP_WHITESPACE ();
3060 str = input_line_pointer;
3061
3062 if (fc >= MAX_INSN_FIXUPS)
3063 as_fatal (_("too many fixups"));
3064 fixups[fc].exp = tls_exp;
3065 fixups[fc].opindex = *opindex_ptr;
3066 fixups[fc].reloc = reloc;
3067 ++fc;
3068 }
3069 }
3070 input_line_pointer = hold;
3071 }
3072 }
3073
3074 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
3075 {
3076 /* Some TLS tweaks. */
3077 switch (reloc)
3078 {
3079 default:
3080 break;
3081
3082 case BFD_RELOC_PPC_TLS:
3083 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3084 as_bad (_("@tls may not be used with \"%s\" operands"),
3085 opcode->name);
3086 else if (operand->shift != 11)
3087 as_bad (_("@tls may only be used in last operand"));
3088 else
3089 insn = ppc_insert_operand (insn, operand,
3090 ppc_obj64 ? 13 : 2,
3091 ppc_cpu, (char *) NULL, 0);
3092 break;
3093
3094 /* We'll only use the 32 (or 64) bit form of these relocations
3095 in constants. Instructions get the 16 bit form. */
3096 case BFD_RELOC_PPC_DTPREL:
3097 reloc = BFD_RELOC_PPC_DTPREL16;
3098 break;
3099 case BFD_RELOC_PPC_TPREL:
3100 reloc = BFD_RELOC_PPC_TPREL16;
3101 break;
3102 }
3103
3104 /* addpcis. */
3105 if (opcode->opcode == (19 << 26) + (2 << 1)
3106 && reloc == BFD_RELOC_HI16_S)
3107 reloc = BFD_RELOC_PPC_REL16DX_HA;
3108
3109 /* If VLE-mode convert LO/HI/HA relocations. */
3110 if (opcode->flags & PPC_OPCODE_VLE)
3111 {
3112 int tmp_insn = insn & opcode->mask;
3113
3114 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3115 || tmp_insn == E_AND2I_DOT_INSN
3116 || tmp_insn == E_OR2IS_INSN
3117 || tmp_insn == E_LIS_INSN
3118 || tmp_insn == E_AND2IS_DOT_INSN);
3119
3120
3121 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3122 || tmp_insn == E_ADD2IS_INSN
3123 || tmp_insn == E_CMP16I_INSN
3124 || tmp_insn == E_MULL2I_INSN
3125 || tmp_insn == E_CMPL16I_INSN
3126 || tmp_insn == E_CMPH16I_INSN
3127 || tmp_insn == E_CMPHL16I_INSN);
3128
3129 switch (reloc)
3130 {
3131 default:
3132 break;
3133
3134 case BFD_RELOC_PPC_EMB_SDA21:
3135 reloc = BFD_RELOC_PPC_VLE_SDA21;
3136 break;
3137
3138 case BFD_RELOC_LO16:
3139 if (use_d_reloc)
3140 reloc = BFD_RELOC_PPC_VLE_LO16D;
3141 else if (use_a_reloc)
3142 reloc = BFD_RELOC_PPC_VLE_LO16A;
3143 break;
3144
3145 case BFD_RELOC_HI16:
3146 if (use_d_reloc)
3147 reloc = BFD_RELOC_PPC_VLE_HI16D;
3148 else if (use_a_reloc)
3149 reloc = BFD_RELOC_PPC_VLE_HI16A;
3150 break;
3151
3152 case BFD_RELOC_HI16_S:
3153 if (use_d_reloc)
3154 reloc = BFD_RELOC_PPC_VLE_HA16D;
3155 else if (use_a_reloc)
3156 reloc = BFD_RELOC_PPC_VLE_HA16A;
3157 break;
3158
3159 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3160 if (use_d_reloc)
3161 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3162 break;
3163
3164 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3165 if (use_d_reloc)
3166 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3167 break;
3168
3169 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3170 if (use_d_reloc)
3171 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3172 break;
3173 }
3174 }
3175 }
3176 #endif /* OBJ_ELF */
3177
3178 if (reloc != BFD_RELOC_NONE)
3179 ;
3180 /* Determine a BFD reloc value based on the operand information.
3181 We are only prepared to turn a few of the operands into
3182 relocs. */
3183 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3184 | PPC_OPERAND_ABSOLUTE)) != 0
3185 && operand->bitm == 0x3fffffc
3186 && operand->shift == 0)
3187 reloc = BFD_RELOC_PPC_B26;
3188 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3189 | PPC_OPERAND_ABSOLUTE)) != 0
3190 && operand->bitm == 0xfffc
3191 && operand->shift == 0)
3192 reloc = BFD_RELOC_PPC_B16;
3193 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3194 && operand->bitm == 0x1fe
3195 && operand->shift == -1)
3196 reloc = BFD_RELOC_PPC_VLE_REL8;
3197 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3198 && operand->bitm == 0xfffe
3199 && operand->shift == 0)
3200 reloc = BFD_RELOC_PPC_VLE_REL15;
3201 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3202 && operand->bitm == 0x1fffffe
3203 && operand->shift == 0)
3204 reloc = BFD_RELOC_PPC_VLE_REL24;
3205 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3206 && (operand->bitm & 0xfff0) == 0xfff0
3207 && operand->shift == 0)
3208 {
3209 reloc = BFD_RELOC_16;
3210 #if defined OBJ_XCOFF || defined OBJ_ELF
3211 /* Note: the symbol may be not yet defined. */
3212 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3213 && ppc_is_toc_sym (ex.X_add_symbol))
3214 {
3215 reloc = BFD_RELOC_PPC_TOC16;
3216 #ifdef OBJ_ELF
3217 as_warn (_("assuming %s on symbol"),
3218 ppc_obj64 ? "@toc" : "@xgot");
3219 #endif
3220 }
3221 #endif
3222 }
3223
3224 /* For the absolute forms of branches, convert the PC
3225 relative form back into the absolute. */
3226 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3227 {
3228 switch (reloc)
3229 {
3230 case BFD_RELOC_PPC_B26:
3231 reloc = BFD_RELOC_PPC_BA26;
3232 break;
3233 case BFD_RELOC_PPC_B16:
3234 reloc = BFD_RELOC_PPC_BA16;
3235 break;
3236 #ifdef OBJ_ELF
3237 case BFD_RELOC_PPC_B16_BRTAKEN:
3238 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3239 break;
3240 case BFD_RELOC_PPC_B16_BRNTAKEN:
3241 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3242 break;
3243 #endif
3244 default:
3245 break;
3246 }
3247 }
3248
3249 #ifdef OBJ_ELF
3250 switch (reloc)
3251 {
3252 case BFD_RELOC_PPC_TOC16:
3253 toc_reloc_types |= has_small_toc_reloc;
3254 break;
3255 case BFD_RELOC_PPC64_TOC16_LO:
3256 case BFD_RELOC_PPC64_TOC16_HI:
3257 case BFD_RELOC_PPC64_TOC16_HA:
3258 toc_reloc_types |= has_large_toc_reloc;
3259 break;
3260 default:
3261 break;
3262 }
3263
3264 if (ppc_obj64
3265 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3266 {
3267 switch (reloc)
3268 {
3269 case BFD_RELOC_16:
3270 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3271 break;
3272 case BFD_RELOC_LO16:
3273 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3274 break;
3275 case BFD_RELOC_16_GOTOFF:
3276 reloc = BFD_RELOC_PPC64_GOT16_DS;
3277 break;
3278 case BFD_RELOC_LO16_GOTOFF:
3279 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3280 break;
3281 case BFD_RELOC_LO16_PLTOFF:
3282 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3283 break;
3284 case BFD_RELOC_16_BASEREL:
3285 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3286 break;
3287 case BFD_RELOC_LO16_BASEREL:
3288 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3289 break;
3290 case BFD_RELOC_PPC_TOC16:
3291 reloc = BFD_RELOC_PPC64_TOC16_DS;
3292 break;
3293 case BFD_RELOC_PPC64_TOC16_LO:
3294 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3295 break;
3296 case BFD_RELOC_PPC64_PLTGOT16:
3297 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3298 break;
3299 case BFD_RELOC_PPC64_PLTGOT16_LO:
3300 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3301 break;
3302 case BFD_RELOC_PPC_DTPREL16:
3303 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3304 break;
3305 case BFD_RELOC_PPC_DTPREL16_LO:
3306 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3307 break;
3308 case BFD_RELOC_PPC_TPREL16:
3309 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3310 break;
3311 case BFD_RELOC_PPC_TPREL16_LO:
3312 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3313 break;
3314 case BFD_RELOC_PPC_GOT_DTPREL16:
3315 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3316 case BFD_RELOC_PPC_GOT_TPREL16:
3317 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3318 break;
3319 default:
3320 as_bad (_("unsupported relocation for DS offset field"));
3321 break;
3322 }
3323 }
3324 #endif
3325
3326 /* We need to generate a fixup for this expression. */
3327 if (fc >= MAX_INSN_FIXUPS)
3328 as_fatal (_("too many fixups"));
3329 fixups[fc].exp = ex;
3330 fixups[fc].opindex = *opindex_ptr;
3331 fixups[fc].reloc = reloc;
3332 ++fc;
3333 }
3334
3335 if (need_paren)
3336 {
3337 endc = ')';
3338 need_paren = 0;
3339 /* If expecting more operands, then we want to see "),". */
3340 if (*str == endc && opindex_ptr[1] != 0)
3341 {
3342 do
3343 ++str;
3344 while (ISSPACE (*str));
3345 endc = ',';
3346 }
3347 }
3348 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3349 {
3350 endc = '(';
3351 need_paren = 1;
3352 }
3353 else
3354 endc = ',';
3355
3356 /* The call to expression should have advanced str past any
3357 whitespace. */
3358 if (*str != endc
3359 && (endc != ',' || *str != '\0'))
3360 {
3361 if (*str == '\0')
3362 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3363 else
3364 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
3365 break;
3366 }
3367
3368 if (*str != '\0')
3369 ++str;
3370 }
3371
3372 while (ISSPACE (*str))
3373 ++str;
3374
3375 if (*str != '\0')
3376 as_bad (_("junk at end of line: `%s'"), str);
3377
3378 #ifdef OBJ_ELF
3379 /* Do we need/want an APUinfo section? */
3380 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3381 && !ppc_obj64)
3382 {
3383 /* These are all version "1". */
3384 if (opcode->flags & PPC_OPCODE_SPE)
3385 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
3386 if (opcode->flags & PPC_OPCODE_ISEL)
3387 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
3388 if (opcode->flags & PPC_OPCODE_EFS)
3389 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
3390 if (opcode->flags & PPC_OPCODE_BRLOCK)
3391 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
3392 if (opcode->flags & PPC_OPCODE_PMR)
3393 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
3394 if (opcode->flags & PPC_OPCODE_CACHELCK)
3395 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
3396 if (opcode->flags & PPC_OPCODE_RFMCI)
3397 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
3398 /* Only set the VLE flag if the instruction has been pulled via
3399 the VLE instruction set. This way the flag is guaranteed to
3400 be set for VLE-only instructions or for VLE-only processors,
3401 however it'll remain clear for dual-mode instructions on
3402 dual-mode and, more importantly, standard-mode processors. */
3403 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
3404 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3405 }
3406 #endif
3407
3408 /* Write out the instruction. */
3409 /* Differentiate between two and four byte insns. */
3410 if (ppc_mach () == bfd_mach_ppc_vle)
3411 {
3412 if (PPC_OP_SE_VLE (insn))
3413 insn_length = 2;
3414 else
3415 insn_length = 4;
3416 addr_mod = frag_now_fix () & 1;
3417 }
3418 else
3419 {
3420 insn_length = 4;
3421 addr_mod = frag_now_fix () & 3;
3422 }
3423 /* All instructions can start on a 2 byte boundary for VLE. */
3424 f = frag_more (insn_length);
3425 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
3426 {
3427 if (ppc_mach() == bfd_mach_ppc_vle)
3428 as_bad (_("instruction address is not a multiple of 2"));
3429 else
3430 as_bad (_("instruction address is not a multiple of 4"));
3431 }
3432 frag_now->insn_addr = addr_mod;
3433 frag_now->has_code = 1;
3434 md_number_to_chars (f, insn, insn_length);
3435 last_insn = insn;
3436 last_seg = now_seg;
3437 last_subseg = now_subseg;
3438
3439 #ifdef OBJ_ELF
3440 dwarf2_emit_insn (insn_length);
3441 #endif
3442
3443 /* Create any fixups. */
3444 for (i = 0; i < fc; i++)
3445 {
3446 fixS *fixP;
3447 if (fixups[i].reloc != BFD_RELOC_NONE)
3448 {
3449 reloc_howto_type *reloc_howto;
3450 int size;
3451 int offset;
3452
3453 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
3454 if (!reloc_howto)
3455 abort ();
3456
3457 size = bfd_get_reloc_size (reloc_howto);
3458 offset = target_big_endian ? (insn_length - size) : 0;
3459
3460 fixP = fix_new_exp (frag_now,
3461 f - frag_now->fr_literal + offset,
3462 size,
3463 &fixups[i].exp,
3464 reloc_howto->pc_relative,
3465 fixups[i].reloc);
3466 }
3467 else
3468 {
3469 const struct powerpc_operand *operand;
3470
3471 operand = &powerpc_operands[fixups[i].opindex];
3472 fixP = fix_new_exp (frag_now,
3473 f - frag_now->fr_literal,
3474 insn_length,
3475 &fixups[i].exp,
3476 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3477 BFD_RELOC_NONE);
3478 }
3479 fixP->fx_pcrel_adjust = fixups[i].opindex;
3480 }
3481 }
3482
3483 /* Handle a macro. Gather all the operands, transform them as
3484 described by the macro, and call md_assemble recursively. All the
3485 operands are separated by commas; we don't accept parentheses
3486 around operands here. */
3487
3488 static void
ppc_macro(char * str,const struct powerpc_macro * macro)3489 ppc_macro (char *str, const struct powerpc_macro *macro)
3490 {
3491 char *operands[10];
3492 unsigned int count;
3493 char *s;
3494 unsigned int len;
3495 const char *format;
3496 unsigned int arg;
3497 char *send;
3498 char *complete;
3499
3500 /* Gather the users operands into the operands array. */
3501 count = 0;
3502 s = str;
3503 while (1)
3504 {
3505 if (count >= sizeof operands / sizeof operands[0])
3506 break;
3507 operands[count++] = s;
3508 s = strchr (s, ',');
3509 if (s == (char *) NULL)
3510 break;
3511 *s++ = '\0';
3512 }
3513
3514 if (count != macro->operands)
3515 {
3516 as_bad (_("wrong number of operands"));
3517 return;
3518 }
3519
3520 /* Work out how large the string must be (the size is unbounded
3521 because it includes user input). */
3522 len = 0;
3523 format = macro->format;
3524 while (*format != '\0')
3525 {
3526 if (*format != '%')
3527 {
3528 ++len;
3529 ++format;
3530 }
3531 else
3532 {
3533 arg = strtol (format + 1, &send, 10);
3534 know (send != format && arg < count);
3535 len += strlen (operands[arg]);
3536 format = send;
3537 }
3538 }
3539
3540 /* Put the string together. */
3541 complete = s = XNEWVEC (char, len + 1);
3542 format = macro->format;
3543 while (*format != '\0')
3544 {
3545 if (*format != '%')
3546 *s++ = *format++;
3547 else
3548 {
3549 arg = strtol (format + 1, &send, 10);
3550 strcpy (s, operands[arg]);
3551 s += strlen (s);
3552 format = send;
3553 }
3554 }
3555 *s = '\0';
3556
3557 /* Assemble the constructed instruction. */
3558 md_assemble (complete);
3559 free (complete);
3560 }
3561
3562 #ifdef OBJ_ELF
3563 /* For ELF, add support for SHT_ORDERED. */
3564
3565 int
ppc_section_type(char * str,size_t len)3566 ppc_section_type (char *str, size_t len)
3567 {
3568 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3569 return SHT_ORDERED;
3570
3571 return -1;
3572 }
3573
3574 int
ppc_section_flags(flagword flags,bfd_vma attr ATTRIBUTE_UNUSED,int type)3575 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3576 {
3577 if (type == SHT_ORDERED)
3578 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3579
3580 return flags;
3581 }
3582 #endif /* OBJ_ELF */
3583
3584
3585 /* Pseudo-op handling. */
3586
3587 /* The .byte pseudo-op. This is similar to the normal .byte
3588 pseudo-op, but it can also take a single ASCII string. */
3589
3590 static void
ppc_byte(int ignore ATTRIBUTE_UNUSED)3591 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3592 {
3593 int count = 0;
3594
3595 if (*input_line_pointer != '\"')
3596 {
3597 cons (1);
3598 return;
3599 }
3600
3601 /* Gather characters. A real double quote is doubled. Unusual
3602 characters are not permitted. */
3603 ++input_line_pointer;
3604 while (1)
3605 {
3606 char c;
3607
3608 c = *input_line_pointer++;
3609
3610 if (c == '\"')
3611 {
3612 if (*input_line_pointer != '\"')
3613 break;
3614 ++input_line_pointer;
3615 }
3616
3617 FRAG_APPEND_1_CHAR (c);
3618 ++count;
3619 }
3620
3621 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3622 as_warn (_("data in executable section"));
3623 demand_empty_rest_of_line ();
3624 }
3625
3626 #ifdef OBJ_XCOFF
3627
3628 /* XCOFF specific pseudo-op handling. */
3629
3630 /* This is set if we are creating a .stabx symbol, since we don't want
3631 to handle symbol suffixes for such symbols. */
3632 static bfd_boolean ppc_stab_symbol;
3633
3634 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3635 symbols in the .bss segment as though they were local common
3636 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3637 aligns .comm and .lcomm to 4 bytes. */
3638
3639 static void
ppc_comm(int lcomm)3640 ppc_comm (int lcomm)
3641 {
3642 asection *current_seg = now_seg;
3643 subsegT current_subseg = now_subseg;
3644 char *name;
3645 char endc;
3646 char *end_name;
3647 offsetT size;
3648 offsetT align;
3649 symbolS *lcomm_sym = NULL;
3650 symbolS *sym;
3651 char *pfrag;
3652
3653 endc = get_symbol_name (&name);
3654 end_name = input_line_pointer;
3655 (void) restore_line_pointer (endc);
3656
3657 if (*input_line_pointer != ',')
3658 {
3659 as_bad (_("missing size"));
3660 ignore_rest_of_line ();
3661 return;
3662 }
3663 ++input_line_pointer;
3664
3665 size = get_absolute_expression ();
3666 if (size < 0)
3667 {
3668 as_bad (_("negative size"));
3669 ignore_rest_of_line ();
3670 return;
3671 }
3672
3673 if (! lcomm)
3674 {
3675 /* The third argument to .comm is the alignment. */
3676 if (*input_line_pointer != ',')
3677 align = 2;
3678 else
3679 {
3680 ++input_line_pointer;
3681 align = get_absolute_expression ();
3682 if (align <= 0)
3683 {
3684 as_warn (_("ignoring bad alignment"));
3685 align = 2;
3686 }
3687 }
3688 }
3689 else
3690 {
3691 char *lcomm_name;
3692 char lcomm_endc;
3693
3694 /* The third argument to .lcomm appears to be the real local
3695 common symbol to create. References to the symbol named in
3696 the first argument are turned into references to the third
3697 argument. */
3698 if (*input_line_pointer != ',')
3699 {
3700 as_bad (_("missing real symbol name"));
3701 ignore_rest_of_line ();
3702 return;
3703 }
3704 ++input_line_pointer;
3705
3706 lcomm_endc = get_symbol_name (&lcomm_name);
3707
3708 lcomm_sym = symbol_find_or_make (lcomm_name);
3709
3710 (void) restore_line_pointer (lcomm_endc);
3711
3712 /* The fourth argument to .lcomm is the alignment. */
3713 if (*input_line_pointer != ',')
3714 {
3715 if (size <= 4)
3716 align = 2;
3717 else
3718 align = 3;
3719 }
3720 else
3721 {
3722 ++input_line_pointer;
3723 align = get_absolute_expression ();
3724 if (align <= 0)
3725 {
3726 as_warn (_("ignoring bad alignment"));
3727 align = 2;
3728 }
3729 }
3730 }
3731
3732 *end_name = '\0';
3733 sym = symbol_find_or_make (name);
3734 *end_name = endc;
3735
3736 if (S_IS_DEFINED (sym)
3737 || S_GET_VALUE (sym) != 0)
3738 {
3739 as_bad (_("attempt to redefine symbol"));
3740 ignore_rest_of_line ();
3741 return;
3742 }
3743
3744 record_alignment (bss_section, align);
3745
3746 if (! lcomm
3747 || ! S_IS_DEFINED (lcomm_sym))
3748 {
3749 symbolS *def_sym;
3750 offsetT def_size;
3751
3752 if (! lcomm)
3753 {
3754 def_sym = sym;
3755 def_size = size;
3756 S_SET_EXTERNAL (sym);
3757 }
3758 else
3759 {
3760 symbol_get_tc (lcomm_sym)->output = 1;
3761 def_sym = lcomm_sym;
3762 def_size = 0;
3763 }
3764
3765 subseg_set (bss_section, 1);
3766 frag_align (align, 0, 0);
3767
3768 symbol_set_frag (def_sym, frag_now);
3769 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3770 def_size, (char *) NULL);
3771 *pfrag = 0;
3772 S_SET_SEGMENT (def_sym, bss_section);
3773 symbol_get_tc (def_sym)->align = align;
3774 }
3775 else if (lcomm)
3776 {
3777 /* Align the size of lcomm_sym. */
3778 symbol_get_frag (lcomm_sym)->fr_offset =
3779 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3780 &~ ((1 << align) - 1));
3781 if (align > symbol_get_tc (lcomm_sym)->align)
3782 symbol_get_tc (lcomm_sym)->align = align;
3783 }
3784
3785 if (lcomm)
3786 {
3787 /* Make sym an offset from lcomm_sym. */
3788 S_SET_SEGMENT (sym, bss_section);
3789 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3790 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3791 symbol_get_frag (lcomm_sym)->fr_offset += size;
3792 }
3793
3794 subseg_set (current_seg, current_subseg);
3795
3796 demand_empty_rest_of_line ();
3797 }
3798
3799 /* The .csect pseudo-op. This switches us into a different
3800 subsegment. The first argument is a symbol whose value is the
3801 start of the .csect. In COFF, csect symbols get special aux
3802 entries defined by the x_csect field of union internal_auxent. The
3803 optional second argument is the alignment (the default is 2). */
3804
3805 static void
ppc_csect(int ignore ATTRIBUTE_UNUSED)3806 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3807 {
3808 char *name;
3809 char endc;
3810 symbolS *sym;
3811 offsetT align;
3812
3813 endc = get_symbol_name (&name);
3814
3815 sym = symbol_find_or_make (name);
3816
3817 (void) restore_line_pointer (endc);
3818
3819 if (S_GET_NAME (sym)[0] == '\0')
3820 {
3821 /* An unnamed csect is assumed to be [PR]. */
3822 symbol_get_tc (sym)->symbol_class = XMC_PR;
3823 }
3824
3825 align = 2;
3826 if (*input_line_pointer == ',')
3827 {
3828 ++input_line_pointer;
3829 align = get_absolute_expression ();
3830 }
3831
3832 ppc_change_csect (sym, align);
3833
3834 demand_empty_rest_of_line ();
3835 }
3836
3837 /* Change to a different csect. */
3838
3839 static void
ppc_change_csect(symbolS * sym,offsetT align)3840 ppc_change_csect (symbolS *sym, offsetT align)
3841 {
3842 if (S_IS_DEFINED (sym))
3843 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3844 else
3845 {
3846 symbolS **list_ptr;
3847 int after_toc;
3848 int hold_chunksize;
3849 symbolS *list;
3850 int is_code;
3851 segT sec;
3852
3853 /* This is a new csect. We need to look at the symbol class to
3854 figure out whether it should go in the text section or the
3855 data section. */
3856 after_toc = 0;
3857 is_code = 0;
3858 switch (symbol_get_tc (sym)->symbol_class)
3859 {
3860 case XMC_PR:
3861 case XMC_RO:
3862 case XMC_DB:
3863 case XMC_GL:
3864 case XMC_XO:
3865 case XMC_SV:
3866 case XMC_TI:
3867 case XMC_TB:
3868 S_SET_SEGMENT (sym, text_section);
3869 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3870 ++ppc_text_subsegment;
3871 list_ptr = &ppc_text_csects;
3872 is_code = 1;
3873 break;
3874 case XMC_RW:
3875 case XMC_TC0:
3876 case XMC_TC:
3877 case XMC_DS:
3878 case XMC_UA:
3879 case XMC_BS:
3880 case XMC_UC:
3881 if (ppc_toc_csect != NULL
3882 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3883 == ppc_data_subsegment))
3884 after_toc = 1;
3885 S_SET_SEGMENT (sym, data_section);
3886 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3887 ++ppc_data_subsegment;
3888 list_ptr = &ppc_data_csects;
3889 break;
3890 default:
3891 abort ();
3892 }
3893
3894 /* We set the obstack chunk size to a small value before
3895 changing subsegments, so that we don't use a lot of memory
3896 space for what may be a small section. */
3897 hold_chunksize = chunksize;
3898 chunksize = 64;
3899
3900 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3901 symbol_get_tc (sym)->subseg);
3902
3903 chunksize = hold_chunksize;
3904
3905 if (after_toc)
3906 ppc_after_toc_frag = frag_now;
3907
3908 record_alignment (sec, align);
3909 if (is_code)
3910 frag_align_code (align, 0);
3911 else
3912 frag_align (align, 0, 0);
3913
3914 symbol_set_frag (sym, frag_now);
3915 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3916
3917 symbol_get_tc (sym)->align = align;
3918 symbol_get_tc (sym)->output = 1;
3919 symbol_get_tc (sym)->within = sym;
3920
3921 for (list = *list_ptr;
3922 symbol_get_tc (list)->next != (symbolS *) NULL;
3923 list = symbol_get_tc (list)->next)
3924 ;
3925 symbol_get_tc (list)->next = sym;
3926
3927 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3928 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3929 &symbol_lastP);
3930 }
3931
3932 ppc_current_csect = sym;
3933 }
3934
3935 static void
ppc_change_debug_section(unsigned int idx,subsegT subseg)3936 ppc_change_debug_section (unsigned int idx, subsegT subseg)
3937 {
3938 segT sec;
3939 flagword oldflags;
3940 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3941
3942 sec = subseg_new (dw->name, subseg);
3943 oldflags = bfd_get_section_flags (stdoutput, sec);
3944 if (oldflags == SEC_NO_FLAGS)
3945 {
3946 /* Just created section. */
3947 gas_assert (dw_sections[idx].sect == NULL);
3948
3949 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3950 bfd_set_section_alignment (stdoutput, sec, 0);
3951 dw_sections[idx].sect = sec;
3952 }
3953
3954 /* Not anymore in a csect. */
3955 ppc_current_csect = NULL;
3956 }
3957
3958 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3959 .dwsect flag [, opt-label ]
3960 */
3961
3962 static void
ppc_dwsect(int ignore ATTRIBUTE_UNUSED)3963 ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3964 {
3965 offsetT flag;
3966 symbolS *opt_label;
3967 const struct xcoff_dwsect_name *dw;
3968 struct dw_subsection *subseg;
3969 struct dw_section *dws;
3970 int i;
3971
3972 /* Find section. */
3973 flag = get_absolute_expression ();
3974 dw = NULL;
3975 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3976 if (xcoff_dwsect_names[i].flag == flag)
3977 {
3978 dw = &xcoff_dwsect_names[i];
3979 break;
3980 }
3981
3982 /* Parse opt-label. */
3983 if (*input_line_pointer == ',')
3984 {
3985 char *label;
3986 char c;
3987
3988 ++input_line_pointer;
3989
3990 c = get_symbol_name (&label);
3991 opt_label = symbol_find_or_make (label);
3992 (void) restore_line_pointer (c);
3993 }
3994 else
3995 opt_label = NULL;
3996
3997 demand_empty_rest_of_line ();
3998
3999 /* Return now in case of unknown subsection. */
4000 if (dw == NULL)
4001 {
4002 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4003 (unsigned)flag);
4004 return;
4005 }
4006
4007 /* Find the subsection. */
4008 dws = &dw_sections[i];
4009 subseg = NULL;
4010 if (opt_label != NULL && S_IS_DEFINED (opt_label))
4011 {
4012 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4013 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
4014 {
4015 as_bad (_("label %s was not defined in this dwarf section"),
4016 S_GET_NAME (opt_label));
4017 subseg = dws->anon_subseg;
4018 opt_label = NULL;
4019 }
4020 else
4021 subseg = symbol_get_tc (opt_label)->u.dw;
4022 }
4023
4024 if (subseg != NULL)
4025 {
4026 /* Switch to the subsection. */
4027 ppc_change_debug_section (i, subseg->subseg);
4028 }
4029 else
4030 {
4031 /* Create a new dw subsection. */
4032 subseg = XNEW (struct dw_subsection);
4033
4034 if (opt_label == NULL)
4035 {
4036 /* The anonymous one. */
4037 subseg->subseg = 0;
4038 subseg->link = NULL;
4039 dws->anon_subseg = subseg;
4040 }
4041 else
4042 {
4043 /* A named one. */
4044 if (dws->list_subseg != NULL)
4045 subseg->subseg = dws->list_subseg->subseg + 1;
4046 else
4047 subseg->subseg = 1;
4048
4049 subseg->link = dws->list_subseg;
4050 dws->list_subseg = subseg;
4051 symbol_get_tc (opt_label)->u.dw = subseg;
4052 }
4053
4054 ppc_change_debug_section (i, subseg->subseg);
4055
4056 if (dw->def_size)
4057 {
4058 /* Add the length field. */
4059 expressionS *exp = &subseg->end_exp;
4060 int sz;
4061
4062 if (opt_label != NULL)
4063 symbol_set_value_now (opt_label);
4064
4065 /* Add the length field. Note that according to the AIX assembler
4066 manual, the size of the length field is 4 for powerpc32 but
4067 12 for powerpc64. */
4068 if (ppc_obj64)
4069 {
4070 /* Write the 64bit marker. */
4071 md_number_to_chars (frag_more (4), -1, 4);
4072 }
4073
4074 exp->X_op = O_subtract;
4075 exp->X_op_symbol = symbol_temp_new_now ();
4076 exp->X_add_symbol = symbol_temp_make ();
4077
4078 sz = ppc_obj64 ? 8 : 4;
4079 exp->X_add_number = -sz;
4080 emit_expr (exp, sz);
4081 }
4082 }
4083 }
4084
4085 /* This function handles the .text and .data pseudo-ops. These
4086 pseudo-ops aren't really used by XCOFF; we implement them for the
4087 convenience of people who aren't used to XCOFF. */
4088
4089 static void
ppc_section(int type)4090 ppc_section (int type)
4091 {
4092 const char *name;
4093 symbolS *sym;
4094
4095 if (type == 't')
4096 name = ".text[PR]";
4097 else if (type == 'd')
4098 name = ".data[RW]";
4099 else
4100 abort ();
4101
4102 sym = symbol_find_or_make (name);
4103
4104 ppc_change_csect (sym, 2);
4105
4106 demand_empty_rest_of_line ();
4107 }
4108
4109 /* This function handles the .section pseudo-op. This is mostly to
4110 give an error, since XCOFF only supports .text, .data and .bss, but
4111 we do permit the user to name the text or data section. */
4112
4113 static void
ppc_named_section(int ignore ATTRIBUTE_UNUSED)4114 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
4115 {
4116 char *user_name;
4117 const char *real_name;
4118 char c;
4119 symbolS *sym;
4120
4121 c = get_symbol_name (&user_name);
4122
4123 if (strcmp (user_name, ".text") == 0)
4124 real_name = ".text[PR]";
4125 else if (strcmp (user_name, ".data") == 0)
4126 real_name = ".data[RW]";
4127 else
4128 {
4129 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4130 (void) restore_line_pointer (c);
4131 ignore_rest_of_line ();
4132 return;
4133 }
4134
4135 (void) restore_line_pointer (c);
4136
4137 sym = symbol_find_or_make (real_name);
4138
4139 ppc_change_csect (sym, 2);
4140
4141 demand_empty_rest_of_line ();
4142 }
4143
4144 /* The .extern pseudo-op. We create an undefined symbol. */
4145
4146 static void
ppc_extern(int ignore ATTRIBUTE_UNUSED)4147 ppc_extern (int ignore ATTRIBUTE_UNUSED)
4148 {
4149 char *name;
4150 char endc;
4151
4152 endc = get_symbol_name (&name);
4153
4154 (void) symbol_find_or_make (name);
4155
4156 (void) restore_line_pointer (endc);
4157
4158 demand_empty_rest_of_line ();
4159 }
4160
4161 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4162
4163 static void
ppc_lglobl(int ignore ATTRIBUTE_UNUSED)4164 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
4165 {
4166 char *name;
4167 char endc;
4168 symbolS *sym;
4169
4170 endc = get_symbol_name (&name);
4171
4172 sym = symbol_find_or_make (name);
4173
4174 (void) restore_line_pointer (endc);
4175
4176 symbol_get_tc (sym)->output = 1;
4177
4178 demand_empty_rest_of_line ();
4179 }
4180
4181 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4182 relocations at the beginning of the current csect.
4183
4184 (In principle, there's no reason why the relocations _have_ to be at
4185 the beginning. Anywhere in the csect would do. However, inserting
4186 at the beginning is what the native assmebler does, and it helps to
4187 deal with cases where the .ref statements follow the section contents.)
4188
4189 ??? .refs don't work for empty .csects. However, the native assembler
4190 doesn't report an error in this case, and neither yet do we. */
4191
4192 static void
ppc_ref(int ignore ATTRIBUTE_UNUSED)4193 ppc_ref (int ignore ATTRIBUTE_UNUSED)
4194 {
4195 char *name;
4196 char c;
4197
4198 if (ppc_current_csect == NULL)
4199 {
4200 as_bad (_(".ref outside .csect"));
4201 ignore_rest_of_line ();
4202 return;
4203 }
4204
4205 do
4206 {
4207 c = get_symbol_name (&name);
4208
4209 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4210 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4211
4212 *input_line_pointer = c;
4213 SKIP_WHITESPACE_AFTER_NAME ();
4214 c = *input_line_pointer;
4215 if (c == ',')
4216 {
4217 input_line_pointer++;
4218 SKIP_WHITESPACE ();
4219 if (is_end_of_line[(unsigned char) *input_line_pointer])
4220 {
4221 as_bad (_("missing symbol name"));
4222 ignore_rest_of_line ();
4223 return;
4224 }
4225 }
4226 }
4227 while (c == ',');
4228
4229 demand_empty_rest_of_line ();
4230 }
4231
4232 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4233 although I don't know why it bothers. */
4234
4235 static void
ppc_rename(int ignore ATTRIBUTE_UNUSED)4236 ppc_rename (int ignore ATTRIBUTE_UNUSED)
4237 {
4238 char *name;
4239 char endc;
4240 symbolS *sym;
4241 int len;
4242
4243 endc = get_symbol_name (&name);
4244
4245 sym = symbol_find_or_make (name);
4246
4247 (void) restore_line_pointer (endc);
4248
4249 if (*input_line_pointer != ',')
4250 {
4251 as_bad (_("missing rename string"));
4252 ignore_rest_of_line ();
4253 return;
4254 }
4255 ++input_line_pointer;
4256
4257 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
4258
4259 demand_empty_rest_of_line ();
4260 }
4261
4262 /* The .stabx pseudo-op. This is similar to a normal .stabs
4263 pseudo-op, but slightly different. A sample is
4264 .stabx "main:F-1",.main,142,0
4265 The first argument is the symbol name to create. The second is the
4266 value, and the third is the storage class. The fourth seems to be
4267 always zero, and I am assuming it is the type. */
4268
4269 static void
ppc_stabx(int ignore ATTRIBUTE_UNUSED)4270 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
4271 {
4272 char *name;
4273 int len;
4274 symbolS *sym;
4275 expressionS exp;
4276
4277 name = demand_copy_C_string (&len);
4278
4279 if (*input_line_pointer != ',')
4280 {
4281 as_bad (_("missing value"));
4282 return;
4283 }
4284 ++input_line_pointer;
4285
4286 ppc_stab_symbol = TRUE;
4287 sym = symbol_make (name);
4288 ppc_stab_symbol = FALSE;
4289
4290 symbol_get_tc (sym)->real_name = name;
4291
4292 (void) expression (&exp);
4293
4294 switch (exp.X_op)
4295 {
4296 case O_illegal:
4297 case O_absent:
4298 case O_big:
4299 as_bad (_("illegal .stabx expression; zero assumed"));
4300 exp.X_add_number = 0;
4301 /* Fall through. */
4302 case O_constant:
4303 S_SET_VALUE (sym, (valueT) exp.X_add_number);
4304 symbol_set_frag (sym, &zero_address_frag);
4305 break;
4306
4307 case O_symbol:
4308 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
4309 symbol_set_value_expression (sym, &exp);
4310 else
4311 {
4312 S_SET_VALUE (sym,
4313 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
4314 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
4315 }
4316 break;
4317
4318 default:
4319 /* The value is some complex expression. This will probably
4320 fail at some later point, but this is probably the right
4321 thing to do here. */
4322 symbol_set_value_expression (sym, &exp);
4323 break;
4324 }
4325
4326 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4327 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4328
4329 if (*input_line_pointer != ',')
4330 {
4331 as_bad (_("missing class"));
4332 return;
4333 }
4334 ++input_line_pointer;
4335
4336 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4337
4338 if (*input_line_pointer != ',')
4339 {
4340 as_bad (_("missing type"));
4341 return;
4342 }
4343 ++input_line_pointer;
4344
4345 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4346
4347 symbol_get_tc (sym)->output = 1;
4348
4349 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4350 {
4351 /* In this case :
4352
4353 .bs name
4354 .stabx "z",arrays_,133,0
4355 .es
4356
4357 .comm arrays_,13768,3
4358
4359 resolve_symbol_value will copy the exp's "within" into sym's when the
4360 offset is 0. Since this seems to be corner case problem,
4361 only do the correction for storage class C_STSYM. A better solution
4362 would be to have the tc field updated in ppc_symbol_new_hook. */
4363
4364 if (exp.X_op == O_symbol)
4365 {
4366 if (ppc_current_block == NULL)
4367 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4368
4369 symbol_get_tc (sym)->within = ppc_current_block;
4370 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4371 }
4372 }
4373
4374 if (exp.X_op != O_symbol
4375 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4376 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4377 ppc_frob_label (sym);
4378 else
4379 {
4380 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4381 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
4382 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4383 symbol_get_tc (ppc_current_csect)->within = sym;
4384 }
4385
4386 demand_empty_rest_of_line ();
4387 }
4388
4389 /* The .function pseudo-op. This takes several arguments. The first
4390 argument seems to be the external name of the symbol. The second
4391 argument seems to be the label for the start of the function. gcc
4392 uses the same name for both. I have no idea what the third and
4393 fourth arguments are meant to be. The optional fifth argument is
4394 an expression for the size of the function. In COFF this symbol
4395 gets an aux entry like that used for a csect. */
4396
4397 static void
ppc_function(int ignore ATTRIBUTE_UNUSED)4398 ppc_function (int ignore ATTRIBUTE_UNUSED)
4399 {
4400 char *name;
4401 char endc;
4402 char *s;
4403 symbolS *ext_sym;
4404 symbolS *lab_sym;
4405
4406 endc = get_symbol_name (&name);
4407
4408 /* Ignore any [PR] suffix. */
4409 name = ppc_canonicalize_symbol_name (name);
4410 s = strchr (name, '[');
4411 if (s != (char *) NULL
4412 && strcmp (s + 1, "PR]") == 0)
4413 *s = '\0';
4414
4415 ext_sym = symbol_find_or_make (name);
4416
4417 (void) restore_line_pointer (endc);
4418
4419 if (*input_line_pointer != ',')
4420 {
4421 as_bad (_("missing symbol name"));
4422 ignore_rest_of_line ();
4423 return;
4424 }
4425 ++input_line_pointer;
4426
4427 endc = get_symbol_name (&name);
4428
4429 lab_sym = symbol_find_or_make (name);
4430
4431 (void) restore_line_pointer (endc);
4432
4433 if (ext_sym != lab_sym)
4434 {
4435 expressionS exp;
4436
4437 exp.X_op = O_symbol;
4438 exp.X_add_symbol = lab_sym;
4439 exp.X_op_symbol = NULL;
4440 exp.X_add_number = 0;
4441 exp.X_unsigned = 0;
4442 symbol_set_value_expression (ext_sym, &exp);
4443 }
4444
4445 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4446 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
4447 symbol_get_tc (ext_sym)->output = 1;
4448
4449 if (*input_line_pointer == ',')
4450 {
4451 expressionS exp;
4452
4453 /* Ignore the third argument. */
4454 ++input_line_pointer;
4455 expression (& exp);
4456 if (*input_line_pointer == ',')
4457 {
4458 /* Ignore the fourth argument. */
4459 ++input_line_pointer;
4460 expression (& exp);
4461 if (*input_line_pointer == ',')
4462 {
4463 /* The fifth argument is the function size. */
4464 ++input_line_pointer;
4465 symbol_get_tc (ext_sym)->u.size = symbol_new
4466 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4467 pseudo_set (symbol_get_tc (ext_sym)->u.size);
4468 }
4469 }
4470 }
4471
4472 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4473 SF_SET_FUNCTION (ext_sym);
4474 SF_SET_PROCESS (ext_sym);
4475 coff_add_linesym (ext_sym);
4476
4477 demand_empty_rest_of_line ();
4478 }
4479
4480 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4481 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4482 with the correct line number */
4483
4484 static symbolS *saved_bi_sym = 0;
4485
4486 static void
ppc_bf(int ignore ATTRIBUTE_UNUSED)4487 ppc_bf (int ignore ATTRIBUTE_UNUSED)
4488 {
4489 symbolS *sym;
4490
4491 sym = symbol_make (".bf");
4492 S_SET_SEGMENT (sym, text_section);
4493 symbol_set_frag (sym, frag_now);
4494 S_SET_VALUE (sym, frag_now_fix ());
4495 S_SET_STORAGE_CLASS (sym, C_FCN);
4496
4497 coff_line_base = get_absolute_expression ();
4498
4499 S_SET_NUMBER_AUXILIARY (sym, 1);
4500 SA_SET_SYM_LNNO (sym, coff_line_base);
4501
4502 /* Line number for bi. */
4503 if (saved_bi_sym)
4504 {
4505 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4506 saved_bi_sym = 0;
4507 }
4508
4509
4510 symbol_get_tc (sym)->output = 1;
4511
4512 ppc_frob_label (sym);
4513
4514 demand_empty_rest_of_line ();
4515 }
4516
4517 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4518 ".ef", except that the line number is absolute, not relative to the
4519 most recent ".bf" symbol. */
4520
4521 static void
ppc_ef(int ignore ATTRIBUTE_UNUSED)4522 ppc_ef (int ignore ATTRIBUTE_UNUSED)
4523 {
4524 symbolS *sym;
4525
4526 sym = symbol_make (".ef");
4527 S_SET_SEGMENT (sym, text_section);
4528 symbol_set_frag (sym, frag_now);
4529 S_SET_VALUE (sym, frag_now_fix ());
4530 S_SET_STORAGE_CLASS (sym, C_FCN);
4531 S_SET_NUMBER_AUXILIARY (sym, 1);
4532 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4533 symbol_get_tc (sym)->output = 1;
4534
4535 ppc_frob_label (sym);
4536
4537 demand_empty_rest_of_line ();
4538 }
4539
4540 /* The .bi and .ei pseudo-ops. These take a string argument and
4541 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4542 the symbol list. The value of .bi will be know when the next .bf
4543 is encountered. */
4544
4545 static void
ppc_biei(int ei)4546 ppc_biei (int ei)
4547 {
4548 static symbolS *last_biei;
4549
4550 char *name;
4551 int len;
4552 symbolS *sym;
4553 symbolS *look;
4554
4555 name = demand_copy_C_string (&len);
4556
4557 /* The value of these symbols is actually file offset. Here we set
4558 the value to the index into the line number entries. In
4559 ppc_frob_symbols we set the fix_line field, which will cause BFD
4560 to do the right thing. */
4561
4562 sym = symbol_make (name);
4563 /* obj-coff.c currently only handles line numbers correctly in the
4564 .text section. */
4565 S_SET_SEGMENT (sym, text_section);
4566 S_SET_VALUE (sym, coff_n_line_nos);
4567 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4568
4569 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
4570 symbol_get_tc (sym)->output = 1;
4571
4572 /* Save bi. */
4573 if (ei)
4574 saved_bi_sym = 0;
4575 else
4576 saved_bi_sym = sym;
4577
4578 for (look = last_biei ? last_biei : symbol_rootP;
4579 (look != (symbolS *) NULL
4580 && (S_GET_STORAGE_CLASS (look) == C_FILE
4581 || S_GET_STORAGE_CLASS (look) == C_BINCL
4582 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4583 look = symbol_next (look))
4584 ;
4585 if (look != (symbolS *) NULL)
4586 {
4587 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4588 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4589 last_biei = sym;
4590 }
4591
4592 demand_empty_rest_of_line ();
4593 }
4594
4595 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4596 There is one argument, which is a csect symbol. The value of the
4597 .bs symbol is the index of this csect symbol. */
4598
4599 static void
ppc_bs(int ignore ATTRIBUTE_UNUSED)4600 ppc_bs (int ignore ATTRIBUTE_UNUSED)
4601 {
4602 char *name;
4603 char endc;
4604 symbolS *csect;
4605 symbolS *sym;
4606
4607 if (ppc_current_block != NULL)
4608 as_bad (_("nested .bs blocks"));
4609
4610 endc = get_symbol_name (&name);
4611
4612 csect = symbol_find_or_make (name);
4613
4614 (void) restore_line_pointer (endc);
4615
4616 sym = symbol_make (".bs");
4617 S_SET_SEGMENT (sym, now_seg);
4618 S_SET_STORAGE_CLASS (sym, C_BSTAT);
4619 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4620 symbol_get_tc (sym)->output = 1;
4621
4622 symbol_get_tc (sym)->within = csect;
4623
4624 ppc_frob_label (sym);
4625
4626 ppc_current_block = sym;
4627
4628 demand_empty_rest_of_line ();
4629 }
4630
4631 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4632
4633 static void
ppc_es(int ignore ATTRIBUTE_UNUSED)4634 ppc_es (int ignore ATTRIBUTE_UNUSED)
4635 {
4636 symbolS *sym;
4637
4638 if (ppc_current_block == NULL)
4639 as_bad (_(".es without preceding .bs"));
4640
4641 sym = symbol_make (".es");
4642 S_SET_SEGMENT (sym, now_seg);
4643 S_SET_STORAGE_CLASS (sym, C_ESTAT);
4644 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4645 symbol_get_tc (sym)->output = 1;
4646
4647 ppc_frob_label (sym);
4648
4649 ppc_current_block = NULL;
4650
4651 demand_empty_rest_of_line ();
4652 }
4653
4654 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4655 line number. */
4656
4657 static void
ppc_bb(int ignore ATTRIBUTE_UNUSED)4658 ppc_bb (int ignore ATTRIBUTE_UNUSED)
4659 {
4660 symbolS *sym;
4661
4662 sym = symbol_make (".bb");
4663 S_SET_SEGMENT (sym, text_section);
4664 symbol_set_frag (sym, frag_now);
4665 S_SET_VALUE (sym, frag_now_fix ());
4666 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4667
4668 S_SET_NUMBER_AUXILIARY (sym, 1);
4669 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4670
4671 symbol_get_tc (sym)->output = 1;
4672
4673 SF_SET_PROCESS (sym);
4674
4675 ppc_frob_label (sym);
4676
4677 demand_empty_rest_of_line ();
4678 }
4679
4680 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4681 line number. */
4682
4683 static void
ppc_eb(int ignore ATTRIBUTE_UNUSED)4684 ppc_eb (int ignore ATTRIBUTE_UNUSED)
4685 {
4686 symbolS *sym;
4687
4688 sym = symbol_make (".eb");
4689 S_SET_SEGMENT (sym, text_section);
4690 symbol_set_frag (sym, frag_now);
4691 S_SET_VALUE (sym, frag_now_fix ());
4692 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4693 S_SET_NUMBER_AUXILIARY (sym, 1);
4694 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4695 symbol_get_tc (sym)->output = 1;
4696
4697 SF_SET_PROCESS (sym);
4698
4699 ppc_frob_label (sym);
4700
4701 demand_empty_rest_of_line ();
4702 }
4703
4704 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4705 specified name. */
4706
4707 static void
ppc_bc(int ignore ATTRIBUTE_UNUSED)4708 ppc_bc (int ignore ATTRIBUTE_UNUSED)
4709 {
4710 char *name;
4711 int len;
4712 symbolS *sym;
4713
4714 name = demand_copy_C_string (&len);
4715 sym = symbol_make (name);
4716 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4717 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4718 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4719 S_SET_VALUE (sym, 0);
4720 symbol_get_tc (sym)->output = 1;
4721
4722 ppc_frob_label (sym);
4723
4724 demand_empty_rest_of_line ();
4725 }
4726
4727 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4728
4729 static void
ppc_ec(int ignore ATTRIBUTE_UNUSED)4730 ppc_ec (int ignore ATTRIBUTE_UNUSED)
4731 {
4732 symbolS *sym;
4733
4734 sym = symbol_make (".ec");
4735 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4736 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4737 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4738 S_SET_VALUE (sym, 0);
4739 symbol_get_tc (sym)->output = 1;
4740
4741 ppc_frob_label (sym);
4742
4743 demand_empty_rest_of_line ();
4744 }
4745
4746 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4747
4748 static void
ppc_toc(int ignore ATTRIBUTE_UNUSED)4749 ppc_toc (int ignore ATTRIBUTE_UNUSED)
4750 {
4751 if (ppc_toc_csect != (symbolS *) NULL)
4752 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4753 else
4754 {
4755 subsegT subseg;
4756 symbolS *sym;
4757 symbolS *list;
4758
4759 subseg = ppc_data_subsegment;
4760 ++ppc_data_subsegment;
4761
4762 subseg_new (segment_name (data_section), subseg);
4763 ppc_toc_frag = frag_now;
4764
4765 sym = symbol_find_or_make ("TOC[TC0]");
4766 symbol_set_frag (sym, frag_now);
4767 S_SET_SEGMENT (sym, data_section);
4768 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4769 symbol_get_tc (sym)->subseg = subseg;
4770 symbol_get_tc (sym)->output = 1;
4771 symbol_get_tc (sym)->within = sym;
4772
4773 ppc_toc_csect = sym;
4774
4775 for (list = ppc_data_csects;
4776 symbol_get_tc (list)->next != (symbolS *) NULL;
4777 list = symbol_get_tc (list)->next)
4778 ;
4779 symbol_get_tc (list)->next = sym;
4780
4781 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4782 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4783 &symbol_lastP);
4784 }
4785
4786 ppc_current_csect = ppc_toc_csect;
4787
4788 demand_empty_rest_of_line ();
4789 }
4790
4791 /* The AIX assembler automatically aligns the operands of a .long or
4792 .short pseudo-op, and we want to be compatible. */
4793
4794 static void
ppc_xcoff_cons(int log_size)4795 ppc_xcoff_cons (int log_size)
4796 {
4797 frag_align (log_size, 0, 0);
4798 record_alignment (now_seg, log_size);
4799 cons (1 << log_size);
4800 }
4801
4802 static void
ppc_vbyte(int dummy ATTRIBUTE_UNUSED)4803 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4804 {
4805 expressionS exp;
4806 int byte_count;
4807
4808 (void) expression (&exp);
4809
4810 if (exp.X_op != O_constant)
4811 {
4812 as_bad (_("non-constant byte count"));
4813 return;
4814 }
4815
4816 byte_count = exp.X_add_number;
4817
4818 if (*input_line_pointer != ',')
4819 {
4820 as_bad (_("missing value"));
4821 return;
4822 }
4823
4824 ++input_line_pointer;
4825 cons (byte_count);
4826 }
4827
4828 void
ppc_xcoff_end(void)4829 ppc_xcoff_end (void)
4830 {
4831 int i;
4832
4833 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4834 {
4835 struct dw_section *dws = &dw_sections[i];
4836 struct dw_subsection *dwss;
4837
4838 if (dws->anon_subseg)
4839 {
4840 dwss = dws->anon_subseg;
4841 dwss->link = dws->list_subseg;
4842 }
4843 else
4844 dwss = dws->list_subseg;
4845
4846 for (; dwss != NULL; dwss = dwss->link)
4847 if (dwss->end_exp.X_add_symbol != NULL)
4848 {
4849 subseg_set (dws->sect, dwss->subseg);
4850 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4851 }
4852 }
4853 }
4854
4855 #endif /* OBJ_XCOFF */
4856 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4857
4858 /* The .tc pseudo-op. This is used when generating either XCOFF or
4859 ELF. This takes two or more arguments.
4860
4861 When generating XCOFF output, the first argument is the name to
4862 give to this location in the toc; this will be a symbol with class
4863 TC. The rest of the arguments are N-byte values to actually put at
4864 this location in the TOC; often there is just one more argument, a
4865 relocatable symbol reference. The size of the value to store
4866 depends on target word size. A 32-bit target uses 4-byte values, a
4867 64-bit target uses 8-byte values.
4868
4869 When not generating XCOFF output, the arguments are the same, but
4870 the first argument is simply ignored. */
4871
4872 static void
ppc_tc(int ignore ATTRIBUTE_UNUSED)4873 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4874 {
4875 #ifdef OBJ_XCOFF
4876
4877 /* Define the TOC symbol name. */
4878 {
4879 char *name;
4880 char endc;
4881 symbolS *sym;
4882
4883 if (ppc_toc_csect == (symbolS *) NULL
4884 || ppc_toc_csect != ppc_current_csect)
4885 {
4886 as_bad (_(".tc not in .toc section"));
4887 ignore_rest_of_line ();
4888 return;
4889 }
4890
4891 endc = get_symbol_name (&name);
4892
4893 sym = symbol_find_or_make (name);
4894
4895 (void) restore_line_pointer (endc);
4896
4897 if (S_IS_DEFINED (sym))
4898 {
4899 symbolS *label;
4900
4901 label = symbol_get_tc (ppc_current_csect)->within;
4902 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
4903 {
4904 as_bad (_(".tc with no label"));
4905 ignore_rest_of_line ();
4906 return;
4907 }
4908
4909 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4910 symbol_set_frag (label, symbol_get_frag (sym));
4911 S_SET_VALUE (label, S_GET_VALUE (sym));
4912
4913 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4914 ++input_line_pointer;
4915
4916 return;
4917 }
4918
4919 S_SET_SEGMENT (sym, now_seg);
4920 symbol_set_frag (sym, frag_now);
4921 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4922 symbol_get_tc (sym)->symbol_class = XMC_TC;
4923 symbol_get_tc (sym)->output = 1;
4924
4925 ppc_frob_label (sym);
4926 }
4927
4928 #endif /* OBJ_XCOFF */
4929 #ifdef OBJ_ELF
4930 int align;
4931
4932 /* Skip the TOC symbol name. */
4933 while (is_part_of_name (*input_line_pointer)
4934 || *input_line_pointer == ' '
4935 || *input_line_pointer == '['
4936 || *input_line_pointer == ']'
4937 || *input_line_pointer == '{'
4938 || *input_line_pointer == '}')
4939 ++input_line_pointer;
4940
4941 /* Align to a four/eight byte boundary. */
4942 align = ppc_obj64 ? 3 : 2;
4943 frag_align (align, 0, 0);
4944 record_alignment (now_seg, align);
4945 #endif /* OBJ_ELF */
4946
4947 if (*input_line_pointer != ',')
4948 demand_empty_rest_of_line ();
4949 else
4950 {
4951 ++input_line_pointer;
4952 cons (ppc_obj64 ? 8 : 4);
4953 }
4954 }
4955
4956 /* Pseudo-op .machine. */
4957
4958 static void
ppc_machine(int ignore ATTRIBUTE_UNUSED)4959 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4960 {
4961 char c;
4962 char *cpu_string;
4963 #define MAX_HISTORY 100
4964 static ppc_cpu_t *cpu_history;
4965 static int curr_hist;
4966
4967 SKIP_WHITESPACE ();
4968
4969 c = get_symbol_name (&cpu_string);
4970 cpu_string = xstrdup (cpu_string);
4971 (void) restore_line_pointer (c);
4972
4973 if (cpu_string != NULL)
4974 {
4975 ppc_cpu_t old_cpu = ppc_cpu;
4976 ppc_cpu_t new_cpu;
4977 char *p;
4978
4979 for (p = cpu_string; *p != 0; p++)
4980 *p = TOLOWER (*p);
4981
4982 if (strcmp (cpu_string, "push") == 0)
4983 {
4984 if (cpu_history == NULL)
4985 cpu_history = XNEWVEC (ppc_cpu_t, MAX_HISTORY);
4986
4987 if (curr_hist >= MAX_HISTORY)
4988 as_bad (_(".machine stack overflow"));
4989 else
4990 cpu_history[curr_hist++] = ppc_cpu;
4991 }
4992 else if (strcmp (cpu_string, "pop") == 0)
4993 {
4994 if (curr_hist <= 0)
4995 as_bad (_(".machine stack underflow"));
4996 else
4997 ppc_cpu = cpu_history[--curr_hist];
4998 }
4999 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
5000 ppc_cpu = new_cpu;
5001 else
5002 as_bad (_("invalid machine `%s'"), cpu_string);
5003
5004 if (ppc_cpu != old_cpu)
5005 ppc_setup_opcodes ();
5006 }
5007
5008 demand_empty_rest_of_line ();
5009 }
5010 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5011
5012 #ifdef TE_PE
5013
5014 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5015
5016 /* Set the current section. */
5017 static void
ppc_set_current_section(segT new)5018 ppc_set_current_section (segT new)
5019 {
5020 ppc_previous_section = ppc_current_section;
5021 ppc_current_section = new;
5022 }
5023
5024 /* pseudo-op: .previous
5025 behaviour: toggles the current section with the previous section.
5026 errors: None
5027 warnings: "No previous section" */
5028
5029 static void
ppc_previous(int ignore ATTRIBUTE_UNUSED)5030 ppc_previous (int ignore ATTRIBUTE_UNUSED)
5031 {
5032 if (ppc_previous_section == NULL)
5033 {
5034 as_warn (_("no previous section to return to, ignored."));
5035 return;
5036 }
5037
5038 subseg_set (ppc_previous_section, 0);
5039
5040 ppc_set_current_section (ppc_previous_section);
5041 }
5042
5043 /* pseudo-op: .pdata
5044 behaviour: predefined read only data section
5045 double word aligned
5046 errors: None
5047 warnings: None
5048 initial: .section .pdata "adr3"
5049 a - don't know -- maybe a misprint
5050 d - initialized data
5051 r - readable
5052 3 - double word aligned (that would be 4 byte boundary)
5053
5054 commentary:
5055 Tag index tables (also known as the function table) for exception
5056 handling, debugging, etc. */
5057
5058 static void
ppc_pdata(int ignore ATTRIBUTE_UNUSED)5059 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
5060 {
5061 if (pdata_section == 0)
5062 {
5063 pdata_section = subseg_new (".pdata", 0);
5064
5065 bfd_set_section_flags (stdoutput, pdata_section,
5066 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5067 | SEC_READONLY | SEC_DATA ));
5068
5069 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5070 }
5071 else
5072 {
5073 pdata_section = subseg_new (".pdata", 0);
5074 }
5075 ppc_set_current_section (pdata_section);
5076 }
5077
5078 /* pseudo-op: .ydata
5079 behaviour: predefined read only data section
5080 double word aligned
5081 errors: None
5082 warnings: None
5083 initial: .section .ydata "drw3"
5084 a - don't know -- maybe a misprint
5085 d - initialized data
5086 r - readable
5087 3 - double word aligned (that would be 4 byte boundary)
5088 commentary:
5089 Tag tables (also known as the scope table) for exception handling,
5090 debugging, etc. */
5091
5092 static void
ppc_ydata(int ignore ATTRIBUTE_UNUSED)5093 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
5094 {
5095 if (ydata_section == 0)
5096 {
5097 ydata_section = subseg_new (".ydata", 0);
5098 bfd_set_section_flags (stdoutput, ydata_section,
5099 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5100 | SEC_READONLY | SEC_DATA ));
5101
5102 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5103 }
5104 else
5105 {
5106 ydata_section = subseg_new (".ydata", 0);
5107 }
5108 ppc_set_current_section (ydata_section);
5109 }
5110
5111 /* pseudo-op: .reldata
5112 behaviour: predefined read write data section
5113 double word aligned (4-byte)
5114 FIXME: relocation is applied to it
5115 FIXME: what's the difference between this and .data?
5116 errors: None
5117 warnings: None
5118 initial: .section .reldata "drw3"
5119 d - initialized data
5120 r - readable
5121 w - writeable
5122 3 - double word aligned (that would be 8 byte boundary)
5123
5124 commentary:
5125 Like .data, but intended to hold data subject to relocation, such as
5126 function descriptors, etc. */
5127
5128 static void
ppc_reldata(int ignore ATTRIBUTE_UNUSED)5129 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
5130 {
5131 if (reldata_section == 0)
5132 {
5133 reldata_section = subseg_new (".reldata", 0);
5134
5135 bfd_set_section_flags (stdoutput, reldata_section,
5136 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5137 | SEC_DATA));
5138
5139 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5140 }
5141 else
5142 {
5143 reldata_section = subseg_new (".reldata", 0);
5144 }
5145 ppc_set_current_section (reldata_section);
5146 }
5147
5148 /* pseudo-op: .rdata
5149 behaviour: predefined read only data section
5150 double word aligned
5151 errors: None
5152 warnings: None
5153 initial: .section .rdata "dr3"
5154 d - initialized data
5155 r - readable
5156 3 - double word aligned (that would be 4 byte boundary) */
5157
5158 static void
ppc_rdata(int ignore ATTRIBUTE_UNUSED)5159 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
5160 {
5161 if (rdata_section == 0)
5162 {
5163 rdata_section = subseg_new (".rdata", 0);
5164 bfd_set_section_flags (stdoutput, rdata_section,
5165 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5166 | SEC_READONLY | SEC_DATA ));
5167
5168 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5169 }
5170 else
5171 {
5172 rdata_section = subseg_new (".rdata", 0);
5173 }
5174 ppc_set_current_section (rdata_section);
5175 }
5176
5177 /* pseudo-op: .ualong
5178 behaviour: much like .int, with the exception that no alignment is
5179 performed.
5180 FIXME: test the alignment statement
5181 errors: None
5182 warnings: None */
5183
5184 static void
ppc_ualong(int ignore ATTRIBUTE_UNUSED)5185 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
5186 {
5187 /* Try for long. */
5188 cons (4);
5189 }
5190
5191 /* pseudo-op: .znop <symbol name>
5192 behaviour: Issue a nop instruction
5193 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5194 the supplied symbol name.
5195 errors: None
5196 warnings: Missing symbol name */
5197
5198 static void
ppc_znop(int ignore ATTRIBUTE_UNUSED)5199 ppc_znop (int ignore ATTRIBUTE_UNUSED)
5200 {
5201 unsigned long insn;
5202 const struct powerpc_opcode *opcode;
5203 char *f;
5204 symbolS *sym;
5205 char *symbol_name;
5206 char c;
5207 char *name;
5208
5209 /* Strip out the symbol name. */
5210 c = get_symbol_name (&symbol_name);
5211
5212 name = xstrdup (symbol_name);
5213
5214 sym = symbol_find_or_make (name);
5215
5216 *input_line_pointer = c;
5217
5218 SKIP_WHITESPACE_AFTER_NAME ();
5219
5220 /* Look up the opcode in the hash table. */
5221 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5222
5223 /* Stick in the nop. */
5224 insn = opcode->opcode;
5225
5226 /* Write out the instruction. */
5227 f = frag_more (4);
5228 md_number_to_chars (f, insn, 4);
5229 fix_new (frag_now,
5230 f - frag_now->fr_literal,
5231 4,
5232 sym,
5233 0,
5234 0,
5235 BFD_RELOC_16_GOT_PCREL);
5236
5237 }
5238
5239 /* pseudo-op:
5240 behaviour:
5241 errors:
5242 warnings: */
5243
5244 static void
ppc_pe_comm(int lcomm)5245 ppc_pe_comm (int lcomm)
5246 {
5247 char *name;
5248 char c;
5249 char *p;
5250 offsetT temp;
5251 symbolS *symbolP;
5252 offsetT align;
5253
5254 c = get_symbol_name (&name);
5255
5256 /* just after name is now '\0'. */
5257 p = input_line_pointer;
5258 *p = c;
5259 SKIP_WHITESPACE_AFTER_NAME ();
5260 if (*input_line_pointer != ',')
5261 {
5262 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5263 ignore_rest_of_line ();
5264 return;
5265 }
5266
5267 input_line_pointer++; /* skip ',' */
5268 if ((temp = get_absolute_expression ()) < 0)
5269 {
5270 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5271 ignore_rest_of_line ();
5272 return;
5273 }
5274
5275 if (! lcomm)
5276 {
5277 /* The third argument to .comm is the alignment. */
5278 if (*input_line_pointer != ',')
5279 align = 3;
5280 else
5281 {
5282 ++input_line_pointer;
5283 align = get_absolute_expression ();
5284 if (align <= 0)
5285 {
5286 as_warn (_("ignoring bad alignment"));
5287 align = 3;
5288 }
5289 }
5290 }
5291
5292 *p = 0;
5293 symbolP = symbol_find_or_make (name);
5294
5295 *p = c;
5296 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5297 {
5298 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5299 S_GET_NAME (symbolP));
5300 ignore_rest_of_line ();
5301 return;
5302 }
5303
5304 if (S_GET_VALUE (symbolP))
5305 {
5306 if (S_GET_VALUE (symbolP) != (valueT) temp)
5307 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5308 S_GET_NAME (symbolP),
5309 (long) S_GET_VALUE (symbolP),
5310 (long) temp);
5311 }
5312 else
5313 {
5314 S_SET_VALUE (symbolP, (valueT) temp);
5315 S_SET_EXTERNAL (symbolP);
5316 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
5317 }
5318
5319 demand_empty_rest_of_line ();
5320 }
5321
5322 /*
5323 * implement the .section pseudo op:
5324 * .section name {, "flags"}
5325 * ^ ^
5326 * | +--- optional flags: 'b' for bss
5327 * | 'i' for info
5328 * +-- section name 'l' for lib
5329 * 'n' for noload
5330 * 'o' for over
5331 * 'w' for data
5332 * 'd' (apparently m88k for data)
5333 * 'x' for text
5334 * But if the argument is not a quoted string, treat it as a
5335 * subsegment number.
5336 *
5337 * FIXME: this is a copy of the section processing from obj-coff.c, with
5338 * additions/changes for the moto-pas assembler support. There are three
5339 * categories:
5340 *
5341 * FIXME: I just noticed this. This doesn't work at all really. It it
5342 * setting bits that bfd probably neither understands or uses. The
5343 * correct approach (?) will have to incorporate extra fields attached
5344 * to the section to hold the system specific stuff. (krk)
5345 *
5346 * Section Contents:
5347 * 'a' - unknown - referred to in documentation, but no definition supplied
5348 * 'c' - section has code
5349 * 'd' - section has initialized data
5350 * 'u' - section has uninitialized data
5351 * 'i' - section contains directives (info)
5352 * 'n' - section can be discarded
5353 * 'R' - remove section at link time
5354 *
5355 * Section Protection:
5356 * 'r' - section is readable
5357 * 'w' - section is writeable
5358 * 'x' - section is executable
5359 * 's' - section is sharable
5360 *
5361 * Section Alignment:
5362 * '0' - align to byte boundary
5363 * '1' - align to halfword undary
5364 * '2' - align to word boundary
5365 * '3' - align to doubleword boundary
5366 * '4' - align to quadword boundary
5367 * '5' - align to 32 byte boundary
5368 * '6' - align to 64 byte boundary
5369 *
5370 */
5371
5372 void
ppc_pe_section(int ignore ATTRIBUTE_UNUSED)5373 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
5374 {
5375 /* Strip out the section name. */
5376 char *section_name;
5377 char c;
5378 char *name;
5379 unsigned int exp;
5380 flagword flags;
5381 segT sec;
5382 int align;
5383
5384 c = get_symbol_name (§ion_name);
5385
5386 name = xstrdup (section_name);
5387
5388 *input_line_pointer = c;
5389
5390 SKIP_WHITESPACE_AFTER_NAME ();
5391
5392 exp = 0;
5393 flags = SEC_NO_FLAGS;
5394
5395 if (strcmp (name, ".idata$2") == 0)
5396 {
5397 align = 0;
5398 }
5399 else if (strcmp (name, ".idata$3") == 0)
5400 {
5401 align = 0;
5402 }
5403 else if (strcmp (name, ".idata$4") == 0)
5404 {
5405 align = 2;
5406 }
5407 else if (strcmp (name, ".idata$5") == 0)
5408 {
5409 align = 2;
5410 }
5411 else if (strcmp (name, ".idata$6") == 0)
5412 {
5413 align = 1;
5414 }
5415 else
5416 /* Default alignment to 16 byte boundary. */
5417 align = 4;
5418
5419 if (*input_line_pointer == ',')
5420 {
5421 ++input_line_pointer;
5422 SKIP_WHITESPACE ();
5423 if (*input_line_pointer != '"')
5424 exp = get_absolute_expression ();
5425 else
5426 {
5427 ++input_line_pointer;
5428 while (*input_line_pointer != '"'
5429 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5430 {
5431 switch (*input_line_pointer)
5432 {
5433 /* Section Contents */
5434 case 'a': /* unknown */
5435 as_bad (_("unsupported section attribute -- 'a'"));
5436 break;
5437 case 'c': /* code section */
5438 flags |= SEC_CODE;
5439 break;
5440 case 'd': /* section has initialized data */
5441 flags |= SEC_DATA;
5442 break;
5443 case 'u': /* section has uninitialized data */
5444 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5445 in winnt.h */
5446 flags |= SEC_ROM;
5447 break;
5448 case 'i': /* section contains directives (info) */
5449 /* FIXME: This is IMAGE_SCN_LNK_INFO
5450 in winnt.h */
5451 flags |= SEC_HAS_CONTENTS;
5452 break;
5453 case 'n': /* section can be discarded */
5454 flags &=~ SEC_LOAD;
5455 break;
5456 case 'R': /* Remove section at link time */
5457 flags |= SEC_NEVER_LOAD;
5458 break;
5459 #if IFLICT_BRAIN_DAMAGE
5460 /* Section Protection */
5461 case 'r': /* section is readable */
5462 flags |= IMAGE_SCN_MEM_READ;
5463 break;
5464 case 'w': /* section is writeable */
5465 flags |= IMAGE_SCN_MEM_WRITE;
5466 break;
5467 case 'x': /* section is executable */
5468 flags |= IMAGE_SCN_MEM_EXECUTE;
5469 break;
5470 case 's': /* section is sharable */
5471 flags |= IMAGE_SCN_MEM_SHARED;
5472 break;
5473
5474 /* Section Alignment */
5475 case '0': /* align to byte boundary */
5476 flags |= IMAGE_SCN_ALIGN_1BYTES;
5477 align = 0;
5478 break;
5479 case '1': /* align to halfword boundary */
5480 flags |= IMAGE_SCN_ALIGN_2BYTES;
5481 align = 1;
5482 break;
5483 case '2': /* align to word boundary */
5484 flags |= IMAGE_SCN_ALIGN_4BYTES;
5485 align = 2;
5486 break;
5487 case '3': /* align to doubleword boundary */
5488 flags |= IMAGE_SCN_ALIGN_8BYTES;
5489 align = 3;
5490 break;
5491 case '4': /* align to quadword boundary */
5492 flags |= IMAGE_SCN_ALIGN_16BYTES;
5493 align = 4;
5494 break;
5495 case '5': /* align to 32 byte boundary */
5496 flags |= IMAGE_SCN_ALIGN_32BYTES;
5497 align = 5;
5498 break;
5499 case '6': /* align to 64 byte boundary */
5500 flags |= IMAGE_SCN_ALIGN_64BYTES;
5501 align = 6;
5502 break;
5503 #endif
5504 default:
5505 as_bad (_("unknown section attribute '%c'"),
5506 *input_line_pointer);
5507 break;
5508 }
5509 ++input_line_pointer;
5510 }
5511 if (*input_line_pointer == '"')
5512 ++input_line_pointer;
5513 }
5514 }
5515
5516 sec = subseg_new (name, (subsegT) exp);
5517
5518 ppc_set_current_section (sec);
5519
5520 if (flags != SEC_NO_FLAGS)
5521 {
5522 if (! bfd_set_section_flags (stdoutput, sec, flags))
5523 as_bad (_("error setting flags for \"%s\": %s"),
5524 bfd_section_name (stdoutput, sec),
5525 bfd_errmsg (bfd_get_error ()));
5526 }
5527
5528 bfd_set_section_alignment (stdoutput, sec, align);
5529 }
5530
5531 static void
ppc_pe_function(int ignore ATTRIBUTE_UNUSED)5532 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
5533 {
5534 char *name;
5535 char endc;
5536 symbolS *ext_sym;
5537
5538 endc = get_symbol_name (&name);
5539
5540 ext_sym = symbol_find_or_make (name);
5541
5542 (void) restore_line_pointer (endc);
5543
5544 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5545 SF_SET_FUNCTION (ext_sym);
5546 SF_SET_PROCESS (ext_sym);
5547 coff_add_linesym (ext_sym);
5548
5549 demand_empty_rest_of_line ();
5550 }
5551
5552 static void
ppc_pe_tocd(int ignore ATTRIBUTE_UNUSED)5553 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
5554 {
5555 if (tocdata_section == 0)
5556 {
5557 tocdata_section = subseg_new (".tocd", 0);
5558 /* FIXME: section flags won't work. */
5559 bfd_set_section_flags (stdoutput, tocdata_section,
5560 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5561 | SEC_READONLY | SEC_DATA));
5562
5563 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5564 }
5565 else
5566 {
5567 rdata_section = subseg_new (".tocd", 0);
5568 }
5569
5570 ppc_set_current_section (tocdata_section);
5571
5572 demand_empty_rest_of_line ();
5573 }
5574
5575 /* Don't adjust TOC relocs to use the section symbol. */
5576
5577 int
ppc_pe_fix_adjustable(fixS * fix)5578 ppc_pe_fix_adjustable (fixS *fix)
5579 {
5580 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5581 }
5582
5583 #endif
5584
5585 #ifdef OBJ_XCOFF
5586
5587 /* XCOFF specific symbol and file handling. */
5588
5589 /* Canonicalize the symbol name. We use the to force the suffix, if
5590 any, to use square brackets, and to be in upper case. */
5591
5592 char *
ppc_canonicalize_symbol_name(char * name)5593 ppc_canonicalize_symbol_name (char *name)
5594 {
5595 char *s;
5596
5597 if (ppc_stab_symbol)
5598 return name;
5599
5600 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5601 ;
5602 if (*s != '\0')
5603 {
5604 char brac;
5605
5606 if (*s == '[')
5607 brac = ']';
5608 else
5609 {
5610 *s = '[';
5611 brac = '}';
5612 }
5613
5614 for (s++; *s != '\0' && *s != brac; s++)
5615 *s = TOUPPER (*s);
5616
5617 if (*s == '\0' || s[1] != '\0')
5618 as_bad (_("bad symbol suffix"));
5619
5620 *s = ']';
5621 }
5622
5623 return name;
5624 }
5625
5626 /* Set the class of a symbol based on the suffix, if any. This is
5627 called whenever a new symbol is created. */
5628
5629 void
ppc_symbol_new_hook(symbolS * sym)5630 ppc_symbol_new_hook (symbolS *sym)
5631 {
5632 struct ppc_tc_sy *tc;
5633 const char *s;
5634
5635 tc = symbol_get_tc (sym);
5636 tc->next = NULL;
5637 tc->output = 0;
5638 tc->symbol_class = -1;
5639 tc->real_name = NULL;
5640 tc->subseg = 0;
5641 tc->align = 0;
5642 tc->u.size = NULL;
5643 tc->u.dw = NULL;
5644 tc->within = NULL;
5645
5646 if (ppc_stab_symbol)
5647 return;
5648
5649 s = strchr (S_GET_NAME (sym), '[');
5650 if (s == (const char *) NULL)
5651 {
5652 /* There is no suffix. */
5653 return;
5654 }
5655
5656 ++s;
5657
5658 switch (s[0])
5659 {
5660 case 'B':
5661 if (strcmp (s, "BS]") == 0)
5662 tc->symbol_class = XMC_BS;
5663 break;
5664 case 'D':
5665 if (strcmp (s, "DB]") == 0)
5666 tc->symbol_class = XMC_DB;
5667 else if (strcmp (s, "DS]") == 0)
5668 tc->symbol_class = XMC_DS;
5669 break;
5670 case 'G':
5671 if (strcmp (s, "GL]") == 0)
5672 tc->symbol_class = XMC_GL;
5673 break;
5674 case 'P':
5675 if (strcmp (s, "PR]") == 0)
5676 tc->symbol_class = XMC_PR;
5677 break;
5678 case 'R':
5679 if (strcmp (s, "RO]") == 0)
5680 tc->symbol_class = XMC_RO;
5681 else if (strcmp (s, "RW]") == 0)
5682 tc->symbol_class = XMC_RW;
5683 break;
5684 case 'S':
5685 if (strcmp (s, "SV]") == 0)
5686 tc->symbol_class = XMC_SV;
5687 break;
5688 case 'T':
5689 if (strcmp (s, "TC]") == 0)
5690 tc->symbol_class = XMC_TC;
5691 else if (strcmp (s, "TI]") == 0)
5692 tc->symbol_class = XMC_TI;
5693 else if (strcmp (s, "TB]") == 0)
5694 tc->symbol_class = XMC_TB;
5695 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5696 tc->symbol_class = XMC_TC0;
5697 break;
5698 case 'U':
5699 if (strcmp (s, "UA]") == 0)
5700 tc->symbol_class = XMC_UA;
5701 else if (strcmp (s, "UC]") == 0)
5702 tc->symbol_class = XMC_UC;
5703 break;
5704 case 'X':
5705 if (strcmp (s, "XO]") == 0)
5706 tc->symbol_class = XMC_XO;
5707 break;
5708 }
5709
5710 if (tc->symbol_class == -1)
5711 as_bad (_("unrecognized symbol suffix"));
5712 }
5713
5714 /* Set the class of a label based on where it is defined. This
5715 handles symbols without suffixes. Also, move the symbol so that it
5716 follows the csect symbol. */
5717
5718 void
ppc_frob_label(symbolS * sym)5719 ppc_frob_label (symbolS *sym)
5720 {
5721 if (ppc_current_csect != (symbolS *) NULL)
5722 {
5723 if (symbol_get_tc (sym)->symbol_class == -1)
5724 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5725
5726 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5727 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5728 &symbol_rootP, &symbol_lastP);
5729 symbol_get_tc (ppc_current_csect)->within = sym;
5730 symbol_get_tc (sym)->within = ppc_current_csect;
5731 }
5732
5733 #ifdef OBJ_ELF
5734 dwarf2_emit_label (sym);
5735 #endif
5736 }
5737
5738 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5739 seen. It tells ppc_adjust_symtab whether it needs to look through
5740 the symbols. */
5741
5742 static bfd_boolean ppc_saw_abs;
5743
5744 /* Change the name of a symbol just before writing it out. Set the
5745 real name if the .rename pseudo-op was used. Otherwise, remove any
5746 class suffix. Return 1 if the symbol should not be included in the
5747 symbol table. */
5748
5749 int
ppc_frob_symbol(symbolS * sym)5750 ppc_frob_symbol (symbolS *sym)
5751 {
5752 static symbolS *ppc_last_function;
5753 static symbolS *set_end;
5754
5755 /* Discard symbols that should not be included in the output symbol
5756 table. */
5757 if (! symbol_used_in_reloc_p (sym)
5758 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5759 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5760 && ! symbol_get_tc (sym)->output
5761 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5762 return 1;
5763
5764 /* This one will disappear anyway. Don't make a csect sym for it. */
5765 if (sym == abs_section_sym)
5766 return 1;
5767
5768 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5769 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5770 else
5771 {
5772 const char *name;
5773 const char *s;
5774
5775 name = S_GET_NAME (sym);
5776 s = strchr (name, '[');
5777 if (s != (char *) NULL)
5778 {
5779 unsigned int len;
5780 char *snew;
5781
5782 len = s - name;
5783 snew = xstrndup (name, len);
5784
5785 S_SET_NAME (sym, snew);
5786 }
5787 }
5788
5789 if (set_end != (symbolS *) NULL)
5790 {
5791 SA_SET_SYM_ENDNDX (set_end, sym);
5792 set_end = NULL;
5793 }
5794
5795 if (SF_GET_FUNCTION (sym))
5796 {
5797 if (ppc_last_function != (symbolS *) NULL)
5798 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5799 ppc_last_function = sym;
5800 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
5801 {
5802 resolve_symbol_value (symbol_get_tc (sym)->u.size);
5803 SA_SET_SYM_FSIZE (sym,
5804 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
5805 }
5806 }
5807 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5808 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5809 {
5810 if (ppc_last_function == (symbolS *) NULL)
5811 as_bad (_(".ef with no preceding .function"));
5812 else
5813 {
5814 set_end = ppc_last_function;
5815 ppc_last_function = NULL;
5816
5817 /* We don't have a C_EFCN symbol, but we need to force the
5818 COFF backend to believe that it has seen one. */
5819 coff_last_function = NULL;
5820 }
5821 }
5822
5823 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5824 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5825 && S_GET_STORAGE_CLASS (sym) != C_FILE
5826 && S_GET_STORAGE_CLASS (sym) != C_FCN
5827 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5828 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5829 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5830 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5831 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5832 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5833 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5834
5835 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5836 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5837 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5838 {
5839 int i;
5840 union internal_auxent *a;
5841
5842 /* Create a csect aux. */
5843 i = S_GET_NUMBER_AUXILIARY (sym);
5844 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5845 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5846 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5847 {
5848 /* This is the TOC table. */
5849 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5850 a->x_csect.x_scnlen.l = 0;
5851 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5852 }
5853 else if (symbol_get_tc (sym)->subseg != 0)
5854 {
5855 /* This is a csect symbol. x_scnlen is the size of the
5856 csect. */
5857 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5858 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5859 S_GET_SEGMENT (sym))
5860 - S_GET_VALUE (sym));
5861 else
5862 {
5863 resolve_symbol_value (symbol_get_tc (sym)->next);
5864 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5865 - S_GET_VALUE (sym));
5866 }
5867 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5868 }
5869 else if (S_GET_SEGMENT (sym) == bss_section)
5870 {
5871 /* This is a common symbol. */
5872 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5873 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5874 if (S_IS_EXTERNAL (sym))
5875 symbol_get_tc (sym)->symbol_class = XMC_RW;
5876 else
5877 symbol_get_tc (sym)->symbol_class = XMC_BS;
5878 }
5879 else if (S_GET_SEGMENT (sym) == absolute_section)
5880 {
5881 /* This is an absolute symbol. The csect will be created by
5882 ppc_adjust_symtab. */
5883 ppc_saw_abs = TRUE;
5884 a->x_csect.x_smtyp = XTY_LD;
5885 if (symbol_get_tc (sym)->symbol_class == -1)
5886 symbol_get_tc (sym)->symbol_class = XMC_XO;
5887 }
5888 else if (! S_IS_DEFINED (sym))
5889 {
5890 /* This is an external symbol. */
5891 a->x_csect.x_scnlen.l = 0;
5892 a->x_csect.x_smtyp = XTY_ER;
5893 }
5894 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
5895 {
5896 symbolS *next;
5897
5898 /* This is a TOC definition. x_scnlen is the size of the
5899 TOC entry. */
5900 next = symbol_next (sym);
5901 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
5902 next = symbol_next (next);
5903 if (next == (symbolS *) NULL
5904 || symbol_get_tc (next)->symbol_class != XMC_TC)
5905 {
5906 if (ppc_after_toc_frag == (fragS *) NULL)
5907 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5908 data_section)
5909 - S_GET_VALUE (sym));
5910 else
5911 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5912 - S_GET_VALUE (sym));
5913 }
5914 else
5915 {
5916 resolve_symbol_value (next);
5917 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5918 - S_GET_VALUE (sym));
5919 }
5920 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5921 }
5922 else
5923 {
5924 symbolS *csect;
5925
5926 /* This is a normal symbol definition. x_scnlen is the
5927 symbol index of the containing csect. */
5928 if (S_GET_SEGMENT (sym) == text_section)
5929 csect = ppc_text_csects;
5930 else if (S_GET_SEGMENT (sym) == data_section)
5931 csect = ppc_data_csects;
5932 else
5933 abort ();
5934
5935 /* Skip the initial dummy symbol. */
5936 csect = symbol_get_tc (csect)->next;
5937
5938 if (csect == (symbolS *) NULL)
5939 {
5940 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5941 a->x_csect.x_scnlen.l = 0;
5942 }
5943 else
5944 {
5945 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5946 {
5947 resolve_symbol_value (symbol_get_tc (csect)->next);
5948 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5949 > S_GET_VALUE (sym))
5950 break;
5951 csect = symbol_get_tc (csect)->next;
5952 }
5953
5954 a->x_csect.x_scnlen.p =
5955 coffsymbol (symbol_get_bfdsym (csect))->native;
5956 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5957 1;
5958 }
5959 a->x_csect.x_smtyp = XTY_LD;
5960 }
5961
5962 a->x_csect.x_parmhash = 0;
5963 a->x_csect.x_snhash = 0;
5964 if (symbol_get_tc (sym)->symbol_class == -1)
5965 a->x_csect.x_smclas = XMC_PR;
5966 else
5967 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
5968 a->x_csect.x_stab = 0;
5969 a->x_csect.x_snstab = 0;
5970
5971 /* Don't let the COFF backend resort these symbols. */
5972 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5973 }
5974 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5975 {
5976 /* We want the value to be the symbol index of the referenced
5977 csect symbol. BFD will do that for us if we set the right
5978 flags. */
5979 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5980 combined_entry_type *c = coffsymbol (bsym)->native;
5981
5982 S_SET_VALUE (sym, (valueT) (size_t) c);
5983 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5984 }
5985 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5986 {
5987 symbolS *block;
5988 valueT base;
5989
5990 block = symbol_get_tc (sym)->within;
5991 if (block)
5992 {
5993 /* The value is the offset from the enclosing csect. */
5994 symbolS *csect;
5995
5996 csect = symbol_get_tc (block)->within;
5997 resolve_symbol_value (csect);
5998 base = S_GET_VALUE (csect);
5999 }
6000 else
6001 base = 0;
6002
6003 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
6004 }
6005 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
6006 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
6007 {
6008 /* We want the value to be a file offset into the line numbers.
6009 BFD will do that for us if we set the right flags. We have
6010 already set the value correctly. */
6011 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
6012 }
6013
6014 return 0;
6015 }
6016
6017 /* Adjust the symbol table. This creates csect symbols for all
6018 absolute symbols. */
6019
6020 void
ppc_adjust_symtab(void)6021 ppc_adjust_symtab (void)
6022 {
6023 symbolS *sym;
6024
6025 if (! ppc_saw_abs)
6026 return;
6027
6028 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6029 {
6030 symbolS *csect;
6031 int i;
6032 union internal_auxent *a;
6033
6034 if (S_GET_SEGMENT (sym) != absolute_section)
6035 continue;
6036
6037 csect = symbol_create (".abs[XO]", absolute_section,
6038 S_GET_VALUE (sym), &zero_address_frag);
6039 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
6040 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6041 i = S_GET_NUMBER_AUXILIARY (csect);
6042 S_SET_NUMBER_AUXILIARY (csect, i + 1);
6043 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
6044 a->x_csect.x_scnlen.l = 0;
6045 a->x_csect.x_smtyp = XTY_SD;
6046 a->x_csect.x_parmhash = 0;
6047 a->x_csect.x_snhash = 0;
6048 a->x_csect.x_smclas = XMC_XO;
6049 a->x_csect.x_stab = 0;
6050 a->x_csect.x_snstab = 0;
6051
6052 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6053
6054 i = S_GET_NUMBER_AUXILIARY (sym);
6055 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6056 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6057 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
6058 }
6059
6060 ppc_saw_abs = FALSE;
6061 }
6062
6063 /* Set the VMA for a section. This is called on all the sections in
6064 turn. */
6065
6066 void
ppc_frob_section(asection * sec)6067 ppc_frob_section (asection *sec)
6068 {
6069 static bfd_vma vma = 0;
6070
6071 /* Dwarf sections start at 0. */
6072 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6073 return;
6074
6075 vma = md_section_align (sec, vma);
6076 bfd_set_section_vma (stdoutput, sec, vma);
6077 vma += bfd_section_size (stdoutput, sec);
6078 }
6079
6080 #endif /* OBJ_XCOFF */
6081
6082 const char *
md_atof(int type,char * litp,int * sizep)6083 md_atof (int type, char *litp, int *sizep)
6084 {
6085 return ieee_md_atof (type, litp, sizep, target_big_endian);
6086 }
6087
6088 /* Write a value out to the object file, using the appropriate
6089 endianness. */
6090
6091 void
md_number_to_chars(char * buf,valueT val,int n)6092 md_number_to_chars (char *buf, valueT val, int n)
6093 {
6094 if (target_big_endian)
6095 number_to_chars_bigendian (buf, val, n);
6096 else
6097 number_to_chars_littleendian (buf, val, n);
6098 }
6099
6100 /* Align a section (I don't know why this is machine dependent). */
6101
6102 valueT
md_section_align(asection * seg ATTRIBUTE_UNUSED,valueT addr)6103 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
6104 {
6105 #ifdef OBJ_ELF
6106 return addr;
6107 #else
6108 int align = bfd_get_section_alignment (stdoutput, seg);
6109
6110 return ((addr + (1 << align) - 1) & -(1 << align));
6111 #endif
6112 }
6113
6114 /* We don't have any form of relaxing. */
6115
6116 int
md_estimate_size_before_relax(fragS * fragp ATTRIBUTE_UNUSED,asection * seg ATTRIBUTE_UNUSED)6117 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6118 asection *seg ATTRIBUTE_UNUSED)
6119 {
6120 abort ();
6121 return 0;
6122 }
6123
6124 /* Convert a machine dependent frag. We never generate these. */
6125
6126 void
md_convert_frag(bfd * abfd ATTRIBUTE_UNUSED,asection * sec ATTRIBUTE_UNUSED,fragS * fragp ATTRIBUTE_UNUSED)6127 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6128 asection *sec ATTRIBUTE_UNUSED,
6129 fragS *fragp ATTRIBUTE_UNUSED)
6130 {
6131 abort ();
6132 }
6133
6134 /* We have no need to default values of symbols. */
6135
6136 symbolS *
md_undefined_symbol(char * name ATTRIBUTE_UNUSED)6137 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
6138 {
6139 return 0;
6140 }
6141
6142 /* Functions concerning relocs. */
6143
6144 /* The location from which a PC relative jump should be calculated,
6145 given a PC relative reloc. */
6146
6147 long
md_pcrel_from_section(fixS * fixp,segT sec ATTRIBUTE_UNUSED)6148 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
6149 {
6150 return fixp->fx_frag->fr_address + fixp->fx_where;
6151 }
6152
6153 #ifdef OBJ_XCOFF
6154
6155 /* This is called to see whether a fixup should be adjusted to use a
6156 section symbol. We take the opportunity to change a fixup against
6157 a symbol in the TOC subsegment into a reloc against the
6158 corresponding .tc symbol. */
6159
6160 int
ppc_fix_adjustable(fixS * fix)6161 ppc_fix_adjustable (fixS *fix)
6162 {
6163 valueT val = resolve_symbol_value (fix->fx_addsy);
6164 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6165 TC_SYMFIELD_TYPE *tc;
6166
6167 if (symseg == absolute_section)
6168 return 0;
6169
6170 /* Always adjust symbols in debugging sections. */
6171 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6172 return 1;
6173
6174 if (ppc_toc_csect != (symbolS *) NULL
6175 && fix->fx_addsy != ppc_toc_csect
6176 && symseg == data_section
6177 && val >= ppc_toc_frag->fr_address
6178 && (ppc_after_toc_frag == (fragS *) NULL
6179 || val < ppc_after_toc_frag->fr_address))
6180 {
6181 symbolS *sy;
6182
6183 for (sy = symbol_next (ppc_toc_csect);
6184 sy != (symbolS *) NULL;
6185 sy = symbol_next (sy))
6186 {
6187 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6188
6189 if (sy_tc->symbol_class == XMC_TC0)
6190 continue;
6191 if (sy_tc->symbol_class != XMC_TC)
6192 break;
6193 if (val == resolve_symbol_value (sy))
6194 {
6195 fix->fx_addsy = sy;
6196 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6197 return 0;
6198 }
6199 }
6200
6201 as_bad_where (fix->fx_file, fix->fx_line,
6202 _("symbol in .toc does not match any .tc"));
6203 }
6204
6205 /* Possibly adjust the reloc to be against the csect. */
6206 tc = symbol_get_tc (fix->fx_addsy);
6207 if (tc->subseg == 0
6208 && tc->symbol_class != XMC_TC0
6209 && tc->symbol_class != XMC_TC
6210 && symseg != bss_section
6211 /* Don't adjust if this is a reloc in the toc section. */
6212 && (symseg != data_section
6213 || ppc_toc_csect == NULL
6214 || val < ppc_toc_frag->fr_address
6215 || (ppc_after_toc_frag != NULL
6216 && val >= ppc_after_toc_frag->fr_address)))
6217 {
6218 symbolS *csect = tc->within;
6219
6220 /* If the symbol was not declared by a label (eg: a section symbol),
6221 use the section instead of the csect. This doesn't happen in
6222 normal AIX assembly code. */
6223 if (csect == NULL)
6224 csect = seg_info (symseg)->sym;
6225
6226 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6227 fix->fx_addsy = csect;
6228
6229 return 0;
6230 }
6231
6232 /* Adjust a reloc against a .lcomm symbol to be against the base
6233 .lcomm. */
6234 if (symseg == bss_section
6235 && ! S_IS_EXTERNAL (fix->fx_addsy))
6236 {
6237 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6238
6239 fix->fx_offset += val - resolve_symbol_value (sy);
6240 fix->fx_addsy = sy;
6241 }
6242
6243 return 0;
6244 }
6245
6246 /* A reloc from one csect to another must be kept. The assembler
6247 will, of course, keep relocs between sections, and it will keep
6248 absolute relocs, but we need to force it to keep PC relative relocs
6249 between two csects in the same section. */
6250
6251 int
ppc_force_relocation(fixS * fix)6252 ppc_force_relocation (fixS *fix)
6253 {
6254 /* At this point fix->fx_addsy should already have been converted to
6255 a csect symbol. If the csect does not include the fragment, then
6256 we need to force the relocation. */
6257 if (fix->fx_pcrel
6258 && fix->fx_addsy != NULL
6259 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6260 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6261 > fix->fx_frag->fr_address)
6262 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6263 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
6264 <= fix->fx_frag->fr_address))))
6265 return 1;
6266
6267 return generic_force_reloc (fix);
6268 }
6269
6270 void
ppc_new_dot_label(symbolS * sym)6271 ppc_new_dot_label (symbolS *sym)
6272 {
6273 /* Anchor this label to the current csect for relocations. */
6274 symbol_get_tc (sym)->within = ppc_current_csect;
6275 }
6276
6277 #endif /* OBJ_XCOFF */
6278
6279 #ifdef OBJ_ELF
6280 /* If this function returns non-zero, it guarantees that a relocation
6281 will be emitted for a fixup. */
6282
6283 int
ppc_force_relocation(fixS * fix)6284 ppc_force_relocation (fixS *fix)
6285 {
6286 /* Branch prediction relocations must force a relocation, as must
6287 the vtable description relocs. */
6288 switch (fix->fx_r_type)
6289 {
6290 case BFD_RELOC_PPC_B16_BRTAKEN:
6291 case BFD_RELOC_PPC_B16_BRNTAKEN:
6292 case BFD_RELOC_PPC_BA16_BRTAKEN:
6293 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6294 case BFD_RELOC_24_PLT_PCREL:
6295 case BFD_RELOC_PPC64_TOC:
6296 return 1;
6297 case BFD_RELOC_PPC_B26:
6298 case BFD_RELOC_PPC_BA26:
6299 case BFD_RELOC_PPC_B16:
6300 case BFD_RELOC_PPC_BA16:
6301 /* All branch fixups targeting a localentry symbol must
6302 force a relocation. */
6303 if (fix->fx_addsy)
6304 {
6305 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6306 elf_symbol_type *elfsym
6307 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6308 gas_assert (elfsym);
6309 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6310 return 1;
6311 }
6312 break;
6313 default:
6314 break;
6315 }
6316
6317 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6318 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6319 return 1;
6320
6321 return generic_force_reloc (fix);
6322 }
6323
6324 int
ppc_fix_adjustable(fixS * fix)6325 ppc_fix_adjustable (fixS *fix)
6326 {
6327 switch (fix->fx_r_type)
6328 {
6329 /* All branch fixups targeting a localentry symbol must
6330 continue using the symbol. */
6331 case BFD_RELOC_PPC_B26:
6332 case BFD_RELOC_PPC_BA26:
6333 case BFD_RELOC_PPC_B16:
6334 case BFD_RELOC_PPC_BA16:
6335 case BFD_RELOC_PPC_B16_BRTAKEN:
6336 case BFD_RELOC_PPC_B16_BRNTAKEN:
6337 case BFD_RELOC_PPC_BA16_BRTAKEN:
6338 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6339 if (fix->fx_addsy)
6340 {
6341 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6342 elf_symbol_type *elfsym
6343 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6344 gas_assert (elfsym);
6345 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6346 return 0;
6347 }
6348 break;
6349 default:
6350 break;
6351 }
6352
6353 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6354 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6355 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6356 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
6357 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6358 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
6359 && fix->fx_r_type != BFD_RELOC_GPREL16
6360 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6361 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
6362 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
6363 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
6364 }
6365 #endif
6366
6367 void
ppc_frag_check(struct frag * fragP)6368 ppc_frag_check (struct frag *fragP)
6369 {
6370 if (!fragP->has_code)
6371 return;
6372
6373 if (ppc_mach() == bfd_mach_ppc_vle)
6374 {
6375 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6376 as_bad (_("instruction address is not a multiple of 2"));
6377 }
6378 else
6379 {
6380 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6381 as_bad (_("instruction address is not a multiple of 4"));
6382 }
6383 }
6384
6385 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6386 rs_align_code frag. */
6387
6388 void
ppc_handle_align(struct frag * fragP)6389 ppc_handle_align (struct frag *fragP)
6390 {
6391 valueT count = (fragP->fr_next->fr_address
6392 - (fragP->fr_address + fragP->fr_fix));
6393
6394 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6395 {
6396 char *dest = fragP->fr_literal + fragP->fr_fix;
6397
6398 fragP->fr_var = 2;
6399 md_number_to_chars (dest, 0x4400, 2);
6400 }
6401 else if (count != 0 && (count & 3) == 0)
6402 {
6403 char *dest = fragP->fr_literal + fragP->fr_fix;
6404
6405 fragP->fr_var = 4;
6406
6407 if (count > 4 * nop_limit && count < 0x2000000)
6408 {
6409 struct frag *rest;
6410
6411 /* Make a branch, then follow with nops. Insert another
6412 frag to handle the nops. */
6413 md_number_to_chars (dest, 0x48000000 + count, 4);
6414 count -= 4;
6415 if (count == 0)
6416 return;
6417
6418 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6419 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6420 fragP->fr_next = rest;
6421 fragP = rest;
6422 rest->fr_address += rest->fr_fix + 4;
6423 rest->fr_fix = 0;
6424 /* If we leave the next frag as rs_align_code we'll come here
6425 again, resulting in a bunch of branches rather than a
6426 branch followed by nops. */
6427 rest->fr_type = rs_align;
6428 dest = rest->fr_literal;
6429 }
6430
6431 md_number_to_chars (dest, 0x60000000, 4);
6432
6433 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6434 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6435 || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6436 || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
6437 {
6438 /* For power6, power7, power8 and power9, we want the last nop to be
6439 a group terminating one. Do this by inserting an rs_fill frag
6440 immediately after this one, with its address set to the last nop
6441 location. This will automatically reduce the number of nops in
6442 the current frag by one. */
6443 if (count > 4)
6444 {
6445 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6446
6447 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6448 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6449 group_nop->fr_fix = 0;
6450 group_nop->fr_offset = 1;
6451 group_nop->fr_type = rs_fill;
6452 fragP->fr_next = group_nop;
6453 dest = group_nop->fr_literal;
6454 }
6455
6456 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6457 || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6458 || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
6459 {
6460 if (ppc_cpu & PPC_OPCODE_E500MC)
6461 /* e500mc group terminating nop: "ori 0,0,0". */
6462 md_number_to_chars (dest, 0x60000000, 4);
6463 else
6464 /* power7/power8/power9 group terminating nop: "ori 2,2,0". */
6465 md_number_to_chars (dest, 0x60420000, 4);
6466 }
6467 else
6468 /* power6 group terminating nop: "ori 1,1,0". */
6469 md_number_to_chars (dest, 0x60210000, 4);
6470 }
6471 }
6472 }
6473
6474 /* Apply a fixup to the object code. This is called for all the
6475 fixups we generated by the calls to fix_new_exp, above. */
6476
6477 void
md_apply_fix(fixS * fixP,valueT * valP,segT seg)6478 md_apply_fix (fixS *fixP, valueT *valP, segT seg)
6479 {
6480 valueT value = * valP;
6481 offsetT fieldval;
6482 const struct powerpc_operand *operand;
6483
6484 #ifdef OBJ_ELF
6485 if (fixP->fx_addsy != NULL)
6486 {
6487 /* Hack around bfd_install_relocation brain damage. */
6488 if (fixP->fx_pcrel)
6489 value += fixP->fx_frag->fr_address + fixP->fx_where;
6490
6491 if (fixP->fx_addsy == abs_section_sym)
6492 fixP->fx_done = 1;
6493 }
6494 else
6495 fixP->fx_done = 1;
6496 #else
6497 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6498 the symbol values. If we are doing this relocation the code in
6499 write.c is going to call bfd_install_relocation, which is also
6500 going to use the symbol value. That means that if the reloc is
6501 fully resolved we want to use *valP since bfd_install_relocation is
6502 not being used.
6503 However, if the reloc is not fully resolved we do not want to
6504 use *valP, and must use fx_offset instead. If the relocation
6505 is PC-relative, we then need to re-apply md_pcrel_from_section
6506 to this new relocation value. */
6507 if (fixP->fx_addsy == (symbolS *) NULL)
6508 fixP->fx_done = 1;
6509
6510 else
6511 {
6512 value = fixP->fx_offset;
6513 if (fixP->fx_pcrel)
6514 value -= md_pcrel_from_section (fixP, seg);
6515 }
6516 #endif
6517
6518 if (fixP->fx_subsy != (symbolS *) NULL)
6519 {
6520 /* We can't actually support subtracting a symbol. */
6521 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
6522 }
6523
6524 operand = NULL;
6525 if (fixP->fx_pcrel_adjust != 0)
6526 {
6527 /* This is a fixup on an instruction. */
6528 int opindex = fixP->fx_pcrel_adjust & 0xff;
6529
6530 operand = &powerpc_operands[opindex];
6531 #ifdef OBJ_XCOFF
6532 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6533 does not generate a reloc. It uses the offset of `sym' within its
6534 csect. Other usages, such as `.long sym', generate relocs. This
6535 is the documented behaviour of non-TOC symbols. */
6536 if ((operand->flags & PPC_OPERAND_PARENS) != 0
6537 && (operand->bitm & 0xfff0) == 0xfff0
6538 && operand->shift == 0
6539 && (operand->insert == NULL || ppc_obj64)
6540 && fixP->fx_addsy != NULL
6541 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
6542 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6543 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
6544 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
6545 {
6546 value = fixP->fx_offset;
6547 fixP->fx_done = 1;
6548 }
6549
6550 /* During parsing of instructions, a TOC16 reloc is generated for
6551 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6552 in the toc. But at parse time, SYM may be not yet defined, so
6553 check again here. */
6554 if (fixP->fx_r_type == BFD_RELOC_16
6555 && fixP->fx_addsy != NULL
6556 && ppc_is_toc_sym (fixP->fx_addsy))
6557 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
6558 #endif
6559 }
6560
6561 /* Calculate value to be stored in field. */
6562 fieldval = value;
6563 switch (fixP->fx_r_type)
6564 {
6565 #ifdef OBJ_ELF
6566 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6567 case BFD_RELOC_PPC_VLE_LO16A:
6568 case BFD_RELOC_PPC_VLE_LO16D:
6569 #endif
6570 case BFD_RELOC_LO16:
6571 case BFD_RELOC_LO16_PCREL:
6572 fieldval = value & 0xffff;
6573 sign_extend_16:
6574 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6575 fieldval = SEX16 (fieldval);
6576 fixP->fx_no_overflow = 1;
6577 break;
6578
6579 case BFD_RELOC_HI16:
6580 case BFD_RELOC_HI16_PCREL:
6581 #ifdef OBJ_ELF
6582 if (REPORT_OVERFLOW_HI && ppc_obj64)
6583 {
6584 fieldval = value >> 16;
6585 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6586 {
6587 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6588 fieldval = ((valueT) fieldval ^ sign) - sign;
6589 }
6590 break;
6591 }
6592 /* Fall thru */
6593
6594 case BFD_RELOC_PPC_VLE_HI16A:
6595 case BFD_RELOC_PPC_VLE_HI16D:
6596 case BFD_RELOC_PPC64_ADDR16_HIGH:
6597 #endif
6598 fieldval = PPC_HI (value);
6599 goto sign_extend_16;
6600
6601 case BFD_RELOC_HI16_S:
6602 case BFD_RELOC_HI16_S_PCREL:
6603 case BFD_RELOC_PPC_REL16DX_HA:
6604 #ifdef OBJ_ELF
6605 if (REPORT_OVERFLOW_HI && ppc_obj64)
6606 {
6607 fieldval = (value + 0x8000) >> 16;
6608 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6609 {
6610 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6611 fieldval = ((valueT) fieldval ^ sign) - sign;
6612 }
6613 break;
6614 }
6615 /* Fall thru */
6616
6617 case BFD_RELOC_PPC_VLE_HA16A:
6618 case BFD_RELOC_PPC_VLE_HA16D:
6619 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6620 #endif
6621 fieldval = PPC_HA (value);
6622 goto sign_extend_16;
6623
6624 #ifdef OBJ_ELF
6625 case BFD_RELOC_PPC64_HIGHER:
6626 fieldval = PPC_HIGHER (value);
6627 goto sign_extend_16;
6628
6629 case BFD_RELOC_PPC64_HIGHER_S:
6630 fieldval = PPC_HIGHERA (value);
6631 goto sign_extend_16;
6632
6633 case BFD_RELOC_PPC64_HIGHEST:
6634 fieldval = PPC_HIGHEST (value);
6635 goto sign_extend_16;
6636
6637 case BFD_RELOC_PPC64_HIGHEST_S:
6638 fieldval = PPC_HIGHESTA (value);
6639 goto sign_extend_16;
6640 #endif
6641
6642 default:
6643 break;
6644 }
6645
6646 if (operand != NULL)
6647 {
6648 /* Handle relocs in an insn. */
6649 switch (fixP->fx_r_type)
6650 {
6651 #ifdef OBJ_ELF
6652 /* The following relocs can't be calculated by the assembler.
6653 Leave the field zero. */
6654 case BFD_RELOC_PPC_TPREL16:
6655 case BFD_RELOC_PPC_TPREL16_LO:
6656 case BFD_RELOC_PPC_TPREL16_HI:
6657 case BFD_RELOC_PPC_TPREL16_HA:
6658 case BFD_RELOC_PPC_DTPREL16:
6659 case BFD_RELOC_PPC_DTPREL16_LO:
6660 case BFD_RELOC_PPC_DTPREL16_HI:
6661 case BFD_RELOC_PPC_DTPREL16_HA:
6662 case BFD_RELOC_PPC_GOT_TLSGD16:
6663 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6664 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6665 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6666 case BFD_RELOC_PPC_GOT_TLSLD16:
6667 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6668 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6669 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6670 case BFD_RELOC_PPC_GOT_TPREL16:
6671 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6672 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6673 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6674 case BFD_RELOC_PPC_GOT_DTPREL16:
6675 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6676 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6677 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6678 case BFD_RELOC_PPC64_TPREL16_DS:
6679 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6680 case BFD_RELOC_PPC64_TPREL16_HIGH:
6681 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6682 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6683 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6684 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6685 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6686 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6687 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6688 case BFD_RELOC_PPC64_DTPREL16_DS:
6689 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6690 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6691 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6692 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6693 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6694 gas_assert (fixP->fx_addsy != NULL);
6695 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6696 fieldval = 0;
6697 break;
6698
6699 /* These also should leave the field zero for the same
6700 reason. Note that older versions of gas wrote values
6701 here. If we want to go back to the old behaviour, then
6702 all _LO and _LO_DS cases will need to be treated like
6703 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6704 case BFD_RELOC_16_GOTOFF:
6705 case BFD_RELOC_LO16_GOTOFF:
6706 case BFD_RELOC_HI16_GOTOFF:
6707 case BFD_RELOC_HI16_S_GOTOFF:
6708 case BFD_RELOC_LO16_PLTOFF:
6709 case BFD_RELOC_HI16_PLTOFF:
6710 case BFD_RELOC_HI16_S_PLTOFF:
6711 case BFD_RELOC_GPREL16:
6712 case BFD_RELOC_16_BASEREL:
6713 case BFD_RELOC_LO16_BASEREL:
6714 case BFD_RELOC_HI16_BASEREL:
6715 case BFD_RELOC_HI16_S_BASEREL:
6716 case BFD_RELOC_PPC_TOC16:
6717 case BFD_RELOC_PPC64_TOC16_LO:
6718 case BFD_RELOC_PPC64_TOC16_HI:
6719 case BFD_RELOC_PPC64_TOC16_HA:
6720 case BFD_RELOC_PPC64_PLTGOT16:
6721 case BFD_RELOC_PPC64_PLTGOT16_LO:
6722 case BFD_RELOC_PPC64_PLTGOT16_HI:
6723 case BFD_RELOC_PPC64_PLTGOT16_HA:
6724 case BFD_RELOC_PPC64_GOT16_DS:
6725 case BFD_RELOC_PPC64_GOT16_LO_DS:
6726 case BFD_RELOC_PPC64_PLT16_LO_DS:
6727 case BFD_RELOC_PPC64_SECTOFF_DS:
6728 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6729 case BFD_RELOC_PPC64_TOC16_DS:
6730 case BFD_RELOC_PPC64_TOC16_LO_DS:
6731 case BFD_RELOC_PPC64_PLTGOT16_DS:
6732 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6733 case BFD_RELOC_PPC_EMB_NADDR16:
6734 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6735 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6736 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6737 case BFD_RELOC_PPC_EMB_SDAI16:
6738 case BFD_RELOC_PPC_EMB_SDA2I16:
6739 case BFD_RELOC_PPC_EMB_SDA2REL:
6740 case BFD_RELOC_PPC_EMB_SDA21:
6741 case BFD_RELOC_PPC_EMB_MRKREF:
6742 case BFD_RELOC_PPC_EMB_RELSEC16:
6743 case BFD_RELOC_PPC_EMB_RELST_LO:
6744 case BFD_RELOC_PPC_EMB_RELST_HI:
6745 case BFD_RELOC_PPC_EMB_RELST_HA:
6746 case BFD_RELOC_PPC_EMB_BIT_FLD:
6747 case BFD_RELOC_PPC_EMB_RELSDA:
6748 case BFD_RELOC_PPC_VLE_SDA21:
6749 case BFD_RELOC_PPC_VLE_SDA21_LO:
6750 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6751 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6752 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6753 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6754 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6755 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6756 gas_assert (fixP->fx_addsy != NULL);
6757 /* Fall thru */
6758
6759 case BFD_RELOC_PPC_TLS:
6760 case BFD_RELOC_PPC_TLSGD:
6761 case BFD_RELOC_PPC_TLSLD:
6762 fieldval = 0;
6763 break;
6764 #endif
6765
6766 #ifdef OBJ_XCOFF
6767 case BFD_RELOC_PPC_B16:
6768 /* Adjust the offset to the instruction boundary. */
6769 fieldval += 2;
6770 break;
6771 #endif
6772
6773 case BFD_RELOC_VTABLE_INHERIT:
6774 case BFD_RELOC_VTABLE_ENTRY:
6775 case BFD_RELOC_PPC_DTPMOD:
6776 case BFD_RELOC_PPC_TPREL:
6777 case BFD_RELOC_PPC_DTPREL:
6778 case BFD_RELOC_PPC_COPY:
6779 case BFD_RELOC_PPC_GLOB_DAT:
6780 case BFD_RELOC_32_PLT_PCREL:
6781 case BFD_RELOC_PPC_EMB_NADDR32:
6782 case BFD_RELOC_PPC64_TOC:
6783 case BFD_RELOC_CTOR:
6784 case BFD_RELOC_32:
6785 case BFD_RELOC_32_PCREL:
6786 case BFD_RELOC_RVA:
6787 case BFD_RELOC_64:
6788 case BFD_RELOC_64_PCREL:
6789 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6790 as_bad_where (fixP->fx_file, fixP->fx_line,
6791 _("%s unsupported as instruction fixup"),
6792 bfd_get_reloc_code_name (fixP->fx_r_type));
6793 fixP->fx_done = 1;
6794 return;
6795
6796 default:
6797 break;
6798 }
6799
6800 #ifdef OBJ_ELF
6801 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6802 contents can stay at zero. */
6803 #define APPLY_RELOC fixP->fx_done
6804 #else
6805 #define APPLY_RELOC 1
6806 #endif
6807 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6808 {
6809 unsigned long insn;
6810 unsigned char *where;
6811
6812 /* Fetch the instruction, insert the fully resolved operand
6813 value, and stuff the instruction back again. */
6814 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
6815 if (target_big_endian)
6816 {
6817 if (fixP->fx_size == 4)
6818 insn = bfd_getb32 (where);
6819 else
6820 insn = bfd_getb16 (where);
6821 }
6822 else
6823 {
6824 if (fixP->fx_size == 4)
6825 insn = bfd_getl32 (where);
6826 else
6827 insn = bfd_getl16 (where);
6828 }
6829 insn = ppc_insert_operand (insn, operand, fieldval,
6830 fixP->tc_fix_data.ppc_cpu,
6831 fixP->fx_file, fixP->fx_line);
6832 if (target_big_endian)
6833 {
6834 if (fixP->fx_size == 4)
6835 bfd_putb32 (insn, where);
6836 else
6837 bfd_putb16 (insn, where);
6838 }
6839 else
6840 {
6841 if (fixP->fx_size == 4)
6842 bfd_putl32 (insn, where);
6843 else
6844 bfd_putl16 (insn, where);
6845 }
6846 }
6847
6848 if (fixP->fx_done)
6849 /* Nothing else to do here. */
6850 return;
6851
6852 gas_assert (fixP->fx_addsy != NULL);
6853 if (fixP->fx_r_type == BFD_RELOC_NONE)
6854 {
6855 const char *sfile;
6856 unsigned int sline;
6857
6858 /* Use expr_symbol_where to see if this is an expression
6859 symbol. */
6860 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6861 as_bad_where (fixP->fx_file, fixP->fx_line,
6862 _("unresolved expression that must be resolved"));
6863 else
6864 as_bad_where (fixP->fx_file, fixP->fx_line,
6865 _("unsupported relocation against %s"),
6866 S_GET_NAME (fixP->fx_addsy));
6867 fixP->fx_done = 1;
6868 return;
6869 }
6870 }
6871 else
6872 {
6873 /* Handle relocs in data. */
6874 switch (fixP->fx_r_type)
6875 {
6876 case BFD_RELOC_VTABLE_INHERIT:
6877 if (fixP->fx_addsy
6878 && !S_IS_DEFINED (fixP->fx_addsy)
6879 && !S_IS_WEAK (fixP->fx_addsy))
6880 S_SET_WEAK (fixP->fx_addsy);
6881 /* Fall thru */
6882
6883 case BFD_RELOC_VTABLE_ENTRY:
6884 fixP->fx_done = 0;
6885 break;
6886
6887 #ifdef OBJ_ELF
6888 /* These can appear with @l etc. in data. */
6889 case BFD_RELOC_LO16:
6890 case BFD_RELOC_LO16_PCREL:
6891 case BFD_RELOC_HI16:
6892 case BFD_RELOC_HI16_PCREL:
6893 case BFD_RELOC_HI16_S:
6894 case BFD_RELOC_HI16_S_PCREL:
6895 case BFD_RELOC_PPC64_HIGHER:
6896 case BFD_RELOC_PPC64_HIGHER_S:
6897 case BFD_RELOC_PPC64_HIGHEST:
6898 case BFD_RELOC_PPC64_HIGHEST_S:
6899 case BFD_RELOC_PPC64_ADDR16_HIGH:
6900 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6901 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6902 break;
6903
6904 case BFD_RELOC_PPC_DTPMOD:
6905 case BFD_RELOC_PPC_TPREL:
6906 case BFD_RELOC_PPC_DTPREL:
6907 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6908 break;
6909
6910 /* Just punt all of these to the linker. */
6911 case BFD_RELOC_PPC_B16_BRTAKEN:
6912 case BFD_RELOC_PPC_B16_BRNTAKEN:
6913 case BFD_RELOC_16_GOTOFF:
6914 case BFD_RELOC_LO16_GOTOFF:
6915 case BFD_RELOC_HI16_GOTOFF:
6916 case BFD_RELOC_HI16_S_GOTOFF:
6917 case BFD_RELOC_LO16_PLTOFF:
6918 case BFD_RELOC_HI16_PLTOFF:
6919 case BFD_RELOC_HI16_S_PLTOFF:
6920 case BFD_RELOC_PPC_COPY:
6921 case BFD_RELOC_PPC_GLOB_DAT:
6922 case BFD_RELOC_16_BASEREL:
6923 case BFD_RELOC_LO16_BASEREL:
6924 case BFD_RELOC_HI16_BASEREL:
6925 case BFD_RELOC_HI16_S_BASEREL:
6926 case BFD_RELOC_PPC_TLS:
6927 case BFD_RELOC_PPC_DTPREL16_LO:
6928 case BFD_RELOC_PPC_DTPREL16_HI:
6929 case BFD_RELOC_PPC_DTPREL16_HA:
6930 case BFD_RELOC_PPC_TPREL16_LO:
6931 case BFD_RELOC_PPC_TPREL16_HI:
6932 case BFD_RELOC_PPC_TPREL16_HA:
6933 case BFD_RELOC_PPC_GOT_TLSGD16:
6934 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6935 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6936 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6937 case BFD_RELOC_PPC_GOT_TLSLD16:
6938 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6939 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6940 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6941 case BFD_RELOC_PPC_GOT_DTPREL16:
6942 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6943 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6944 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6945 case BFD_RELOC_PPC_GOT_TPREL16:
6946 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6947 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6948 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6949 case BFD_RELOC_24_PLT_PCREL:
6950 case BFD_RELOC_PPC_LOCAL24PC:
6951 case BFD_RELOC_32_PLT_PCREL:
6952 case BFD_RELOC_GPREL16:
6953 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6954 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6955 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6956 case BFD_RELOC_PPC_EMB_NADDR32:
6957 case BFD_RELOC_PPC_EMB_NADDR16:
6958 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6959 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6960 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6961 case BFD_RELOC_PPC_EMB_SDAI16:
6962 case BFD_RELOC_PPC_EMB_SDA2REL:
6963 case BFD_RELOC_PPC_EMB_SDA2I16:
6964 case BFD_RELOC_PPC_EMB_SDA21:
6965 case BFD_RELOC_PPC_VLE_SDA21_LO:
6966 case BFD_RELOC_PPC_EMB_MRKREF:
6967 case BFD_RELOC_PPC_EMB_RELSEC16:
6968 case BFD_RELOC_PPC_EMB_RELST_LO:
6969 case BFD_RELOC_PPC_EMB_RELST_HI:
6970 case BFD_RELOC_PPC_EMB_RELST_HA:
6971 case BFD_RELOC_PPC_EMB_BIT_FLD:
6972 case BFD_RELOC_PPC_EMB_RELSDA:
6973 case BFD_RELOC_PPC64_TOC:
6974 case BFD_RELOC_PPC_TOC16:
6975 case BFD_RELOC_PPC64_TOC16_LO:
6976 case BFD_RELOC_PPC64_TOC16_HI:
6977 case BFD_RELOC_PPC64_TOC16_HA:
6978 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6979 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6980 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6981 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6982 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6983 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6984 case BFD_RELOC_PPC64_TPREL16_HIGH:
6985 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6986 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6987 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6988 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6989 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6990 fixP->fx_done = 0;
6991 break;
6992 #endif
6993
6994 #ifdef OBJ_XCOFF
6995 case BFD_RELOC_NONE:
6996 #endif
6997 case BFD_RELOC_CTOR:
6998 case BFD_RELOC_32:
6999 case BFD_RELOC_32_PCREL:
7000 case BFD_RELOC_RVA:
7001 case BFD_RELOC_64:
7002 case BFD_RELOC_64_PCREL:
7003 case BFD_RELOC_16:
7004 case BFD_RELOC_16_PCREL:
7005 case BFD_RELOC_8:
7006 break;
7007
7008 default:
7009 fprintf (stderr,
7010 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
7011 fflush (stderr);
7012 abort ();
7013 }
7014
7015 if (fixP->fx_size && APPLY_RELOC)
7016 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7017 fieldval, fixP->fx_size);
7018 if (warn_476
7019 && (seg->flags & SEC_CODE) != 0
7020 && fixP->fx_size == 4
7021 && fixP->fx_done
7022 && !fixP->fx_tcbit
7023 && (fixP->fx_r_type == BFD_RELOC_32
7024 || fixP->fx_r_type == BFD_RELOC_CTOR
7025 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7026 as_warn_where (fixP->fx_file, fixP->fx_line,
7027 _("data in executable section"));
7028 }
7029
7030 /* We are only able to convert some relocs to pc-relative. */
7031 if (!fixP->fx_done && fixP->fx_pcrel)
7032 {
7033 switch (fixP->fx_r_type)
7034 {
7035 case BFD_RELOC_LO16:
7036 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
7037 break;
7038
7039 case BFD_RELOC_HI16:
7040 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
7041 break;
7042
7043 case BFD_RELOC_HI16_S:
7044 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
7045 break;
7046
7047 case BFD_RELOC_64:
7048 fixP->fx_r_type = BFD_RELOC_64_PCREL;
7049 break;
7050
7051 case BFD_RELOC_32:
7052 fixP->fx_r_type = BFD_RELOC_32_PCREL;
7053 break;
7054
7055 case BFD_RELOC_16:
7056 fixP->fx_r_type = BFD_RELOC_16_PCREL;
7057 break;
7058
7059 /* Some of course are already pc-relative. */
7060 case BFD_RELOC_LO16_PCREL:
7061 case BFD_RELOC_HI16_PCREL:
7062 case BFD_RELOC_HI16_S_PCREL:
7063 case BFD_RELOC_PPC_REL16DX_HA:
7064 case BFD_RELOC_64_PCREL:
7065 case BFD_RELOC_32_PCREL:
7066 case BFD_RELOC_16_PCREL:
7067 case BFD_RELOC_PPC_B16:
7068 case BFD_RELOC_PPC_B16_BRTAKEN:
7069 case BFD_RELOC_PPC_B16_BRNTAKEN:
7070 case BFD_RELOC_PPC_B26:
7071 case BFD_RELOC_PPC_LOCAL24PC:
7072 case BFD_RELOC_24_PLT_PCREL:
7073 case BFD_RELOC_32_PLT_PCREL:
7074 case BFD_RELOC_64_PLT_PCREL:
7075 case BFD_RELOC_PPC_VLE_REL8:
7076 case BFD_RELOC_PPC_VLE_REL15:
7077 case BFD_RELOC_PPC_VLE_REL24:
7078 break;
7079
7080 default:
7081 if (fixP->fx_addsy)
7082 {
7083 const char *sfile;
7084 unsigned int sline;
7085
7086 /* Use expr_symbol_where to see if this is an
7087 expression symbol. */
7088 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7089 as_bad_where (fixP->fx_file, fixP->fx_line,
7090 _("unresolved expression that must"
7091 " be resolved"));
7092 else
7093 as_bad_where (fixP->fx_file, fixP->fx_line,
7094 _("cannot emit PC relative %s relocation"
7095 " against %s"),
7096 bfd_get_reloc_code_name (fixP->fx_r_type),
7097 S_GET_NAME (fixP->fx_addsy));
7098 }
7099 else
7100 as_bad_where (fixP->fx_file, fixP->fx_line,
7101 _("unable to resolve expression"));
7102 fixP->fx_done = 1;
7103 break;
7104 }
7105 }
7106
7107 #ifdef OBJ_ELF
7108 ppc_elf_validate_fix (fixP, seg);
7109 fixP->fx_addnumber = value;
7110
7111 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7112 from the section contents. If we are going to be emitting a reloc
7113 then the section contents are immaterial, so don't warn if they
7114 happen to overflow. Leave such warnings to ld. */
7115 if (!fixP->fx_done)
7116 {
7117 fixP->fx_no_overflow = 1;
7118
7119 /* Arrange to emit .TOC. as a normal symbol if used in anything
7120 but .TOC.@tocbase. */
7121 if (ppc_obj64
7122 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7123 && fixP->fx_addsy != NULL
7124 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7125 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7126 }
7127 #else
7128 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7129 fixP->fx_addnumber = 0;
7130 else
7131 {
7132 #ifdef TE_PE
7133 fixP->fx_addnumber = 0;
7134 #else
7135 /* We want to use the offset within the toc, not the actual VMA
7136 of the symbol. */
7137 fixP->fx_addnumber =
7138 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7139 - S_GET_VALUE (ppc_toc_csect);
7140 /* Set *valP to avoid errors. */
7141 *valP = value;
7142 #endif
7143 }
7144 #endif
7145 }
7146
7147 /* Generate a reloc for a fixup. */
7148
7149 arelent *
tc_gen_reloc(asection * seg ATTRIBUTE_UNUSED,fixS * fixp)7150 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
7151 {
7152 arelent *reloc;
7153
7154 reloc = XNEW (arelent);
7155
7156 reloc->sym_ptr_ptr = XNEW (asymbol *);
7157 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
7158 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7159 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7160 if (reloc->howto == (reloc_howto_type *) NULL)
7161 {
7162 as_bad_where (fixp->fx_file, fixp->fx_line,
7163 _("reloc %d not supported by object file format"),
7164 (int) fixp->fx_r_type);
7165 return NULL;
7166 }
7167 reloc->addend = fixp->fx_addnumber;
7168
7169 return reloc;
7170 }
7171
7172 void
ppc_cfi_frame_initial_instructions(void)7173 ppc_cfi_frame_initial_instructions (void)
7174 {
7175 cfi_add_CFA_def_cfa (1, 0);
7176 }
7177
7178 int
tc_ppc_regname_to_dw2regnum(char * regname)7179 tc_ppc_regname_to_dw2regnum (char *regname)
7180 {
7181 unsigned int regnum = -1;
7182 unsigned int i;
7183 const char *p;
7184 char *q;
7185 static struct { const char *name; int dw2regnum; } regnames[] =
7186 {
7187 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7188 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7189 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7190 { "spe_acc", 111 }, { "spefscr", 112 }
7191 };
7192
7193 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7194 if (strcmp (regnames[i].name, regname) == 0)
7195 return regnames[i].dw2regnum;
7196
7197 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7198 {
7199 p = regname + 1 + (regname[1] == '.');
7200 regnum = strtoul (p, &q, 10);
7201 if (p == q || *q || regnum >= 32)
7202 return -1;
7203 if (regname[0] == 'f')
7204 regnum += 32;
7205 else if (regname[0] == 'v')
7206 regnum += 77;
7207 }
7208 else if (regname[0] == 'c' && regname[1] == 'r')
7209 {
7210 p = regname + 2 + (regname[2] == '.');
7211 if (p[0] < '0' || p[0] > '7' || p[1])
7212 return -1;
7213 regnum = p[0] - '0' + 68;
7214 }
7215 return regnum;
7216 }
7217