/art/compiler/utils/arm/ |
D | managed_register_arm.cc | 29 Register low = AsRegisterPairLow(); in Overlaps() 81 os << "Pair: " << static_cast<int>(AsRegisterPairLow()) << ", " in Print()
|
D | managed_register_arm.h | 139 Register reg_low = AsRegisterPairLow(); in AsRegisterPair() 147 constexpr Register AsRegisterPairLow() const { in AsRegisterPairLow() function 154 return vixl::aarch32::Register(AsRegisterPairLow()); in AsVIXLRegisterPairLow()
|
D | managed_register_arm_test.cc | 235 EXPECT_EQ(R0, reg.AsRegisterPairLow()); in TEST() 247 EXPECT_EQ(R1, reg.AsRegisterPairLow()); in TEST() 259 EXPECT_EQ(R2, reg.AsRegisterPairLow()); in TEST() 271 EXPECT_EQ(R4, reg.AsRegisterPairLow()); in TEST() 283 EXPECT_EQ(R6, reg.AsRegisterPairLow()); in TEST()
|
D | jni_macro_assembler_arm_vixl.cc | 397 if (src.AsRegisterPairHigh() != dst.AsRegisterPairLow()) { in Move()
|
/art/compiler/utils/mips/ |
D | managed_register_mips.cc | 30 Register low = AsRegisterPairLow(); in Overlaps() 82 os << "Pair: " << AsRegisterPairLow() << ", " << AsRegisterPairHigh(); in Print()
|
D | managed_register_mips.h | 117 constexpr Register AsRegisterPairLow() const { in AsRegisterPairLow() function
|
D | assembler_mips.cc | 4719 LoadFromOffset(kLoadDoubleword, dst.AsRegisterPairLow(), src_register, src_offset); in EmitLoad() 4869 StoreToOffset(kStoreWord, src.AsRegisterPairLow(), SP, dest.Int32Value()); in Store() 4996 if (src.AsRegisterPairHigh() != dest.AsRegisterPairLow()) { in Move() 4997 Move(dest.AsRegisterPairLow(), src.AsRegisterPairLow()); in Move() 5001 Move(dest.AsRegisterPairLow(), src.AsRegisterPairLow()); in Move()
|
/art/compiler/utils/x86/ |
D | managed_register_x86.cc | 68 Register low = AsRegisterPairLow(); in Overlaps() 108 os << "Pair: " << AsRegisterPairLow() << ", " << AsRegisterPairHigh(); in Print()
|
D | managed_register_x86_test.cc | 124 EXPECT_EQ(EAX, reg.AsRegisterPairLow()); in TEST() 133 EXPECT_EQ(EAX, reg.AsRegisterPairLow()); in TEST() 142 EXPECT_EQ(EAX, reg.AsRegisterPairLow()); in TEST() 151 EXPECT_EQ(EAX, reg.AsRegisterPairLow()); in TEST() 160 EXPECT_EQ(EDX, reg.AsRegisterPairLow()); in TEST() 169 EXPECT_EQ(EDX, reg.AsRegisterPairLow()); in TEST() 178 EXPECT_EQ(EDX, reg.AsRegisterPairLow()); in TEST() 187 EXPECT_EQ(ECX, reg.AsRegisterPairLow()); in TEST() 196 EXPECT_EQ(ECX, reg.AsRegisterPairLow()); in TEST() 205 EXPECT_EQ(EBX, reg.AsRegisterPairLow()); in TEST()
|
D | managed_register_x86.h | 114 constexpr Register AsRegisterPairLow() const { in AsRegisterPairLow() function
|
D | jni_macro_assembler_x86.cc | 133 __ movl(Address(ESP, offs), src.AsRegisterPairLow()); in Store() 196 __ movl(dest.AsRegisterPairLow(), Address(ESP, src)); in Load() 227 __ fs()->movl(dest.AsRegisterPairLow(), Address::Absolute(src)); in LoadFromThread()
|
/art/compiler/utils/x86_64/ |
D | managed_register_x86_64.cc | 63 Register low = AsRegisterPairLow().AsRegister(); in Overlaps() 103 os << "Pair: " << AsRegisterPairLow() << ", " << AsRegisterPairHigh(); in Print()
|
D | managed_register_x86_64_test.cc | 123 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); in TEST() 132 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); in TEST() 141 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); in TEST() 150 EXPECT_EQ(RAX, reg.AsRegisterPairLow()); in TEST() 159 EXPECT_EQ(RDX, reg.AsRegisterPairLow()); in TEST() 168 EXPECT_EQ(RDX, reg.AsRegisterPairLow()); in TEST() 177 EXPECT_EQ(RDX, reg.AsRegisterPairLow()); in TEST() 186 EXPECT_EQ(RCX, reg.AsRegisterPairLow()); in TEST() 195 EXPECT_EQ(RCX, reg.AsRegisterPairLow()); in TEST() 204 EXPECT_EQ(RBX, reg.AsRegisterPairLow()); in TEST()
|
D | managed_register_x86_64.h | 107 constexpr CpuRegister AsRegisterPairLow() const { in AsRegisterPairLow() function
|
D | jni_macro_assembler_x86_64.cc | 169 __ movq(Address(CpuRegister(RSP), offs), src.AsRegisterPairLow()); in Store() 240 __ movq(dest.AsRegisterPairLow(), Address(CpuRegister(RSP), src)); in Load() 272 __ gs()->movq(dest.AsRegisterPairLow(), Address::Absolute(src, true)); in LoadFromThread()
|
/art/compiler/optimizing/ |
D | intrinsics_mips.cc | 166 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); in MoveFPToInt() 207 Register in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); in MoveIntToFP() 317 Register in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); in GenReverse() 319 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); in GenReverse() 448 Register in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); in GenNumberOfLeadingZeroes() 501 in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); in GenNumberOfTrailingZeroes() 665 Register in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); in GenBitCount() 817 Register in_lo = locations->InAt(0).AsRegisterPairLow<Register>(); in GenAbsInteger() 819 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); in GenAbsInteger() 1122 Register a_lo = locations->InAt(0).AsRegisterPairLow<Register>(); in GenMinMax() [all …]
|
D | code_generator_x86.cc | 1185 return Location::RegisterPairLocation(pair.AsRegisterPairLow(), pair.AsRegisterPairHigh()); in GetNextLocation() 1270 Location::RegisterLocation(source.AsRegisterPairLow<Register>()), in Move64() 1271 Location::RegisterLocation(destination.AsRegisterPairLow<Register>()), in Move64() 1275 __ movd(destination.AsRegisterPairLow<Register>(), src_reg); in Move64() 1281 __ movl(destination.AsRegisterPairLow<Register>(), Address(ESP, source.GetStackIndex())); in Move64() 1294 __ movl(Address(ESP, 0), source.AsRegisterPairLow<Register>()); in Move64() 1306 __ movl(Address(ESP, destination.GetStackIndex()), source.AsRegisterPairLow<Register>()); in Move64() 1351 locations->AddTemp(Location::RegisterLocation(location.AsRegisterPairLow<Register>())); in AddLocationAsTemp() 1435 Register left_low = left.AsRegisterPairLow<Register>(); in GenerateLongComparesAndJumps() 1491 Register right_low = right.AsRegisterPairLow<Register>(); in GenerateLongComparesAndJumps() [all …]
|
D | intrinsics_x86.cc | 206 __ movd(output.AsRegisterPairLow<Register>(), temp); in MoveFPToInt() 221 __ movd(temp1, input.AsRegisterPairLow<Register>()); in MoveIntToFP() 314 Register input_lo = input.AsRegisterPairLow<Register>(); in VisitLongReverseBytes() 317 Register output_lo = output.AsRegisterPairLow<Register>(); in VisitLongReverseBytes() 450 Register input_lo = input.AsRegisterPairLow<Register>(); in GenAbsLong() 453 Register output_lo = output.AsRegisterPairLow<Register>(); in GenAbsLong() 675 Register output_lo = output.AsRegisterPairLow<Register>(); in GenMinMax() 678 Register op2_lo = op2_loc.AsRegisterPairLow<Register>(); in GenMinMax() 1843 Register address = locations->InAt(0).AsRegisterPairLow<Register>(); in GenPeek() 1858 __ movl(out_loc.AsRegisterPairLow<Register>(), Address(address, 0)); in GenPeek() [all …]
|
D | code_generator_mips.cc | 698 Register offset = field_offset_.AsRegisterPairLow<Register>(); in EmitNativeCode() 1132 Register r1 = loc1.AsRegisterPairLow<Register>(); in EmitSwap() 1133 Register r2 = loc2.AsRegisterPairLow<Register>(); in EmitSwap() 1148 Register r2_l = loc1.IsRegisterPair() ? loc1.AsRegisterPairLow<Register>() in EmitSwap() 1149 : loc2.AsRegisterPairLow<Register>(); in EmitSwap() 1176 Register reg_l = loc1.IsRegisterPair() ? loc1.AsRegisterPairLow<Register>() in EmitSwap() 1177 : loc2.AsRegisterPairLow<Register>(); in EmitSwap() 1430 __ Move(destination.AsRegisterPairLow<Register>(), source.AsRegisterPairLow<Register>()); in MoveLocation() 1433 Register dst_low = destination.AsRegisterPairLow<Register>(); in MoveLocation() 1441 Register r = destination.AsRegisterPairLow<Register>(); in MoveLocation() [all …]
|
D | common_arm.h | 61 return vixl::aarch32::Register(location.AsRegisterPairLow<vixl::aarch32::Register>()); in LowRegisterFrom()
|
D | locations.h | 193 T AsRegisterPairLow() const { in AsRegisterPairLow() function
|
D | code_generator_vector_x86.cc | 97 __ movd(dst, locations->InAt(0).AsRegisterPairLow<Register>()); in VisitVecReplicateScalar() 165 __ movd(locations->Out().AsRegisterPairLow<Register>(), src); in VisitVecExtractScalar() 1024 __ movd(dst, locations->InAt(0).AsRegisterPairLow<Register>()); in VisitVecSetScalars()
|
D | code_generator_vector_mips.cc | 72 locations->InAt(0).AsRegisterPairLow<Register>(), in VisitVecReplicateScalar() 131 __ Copy_sW(locations->Out().AsRegisterPairLow<Register>(), src, 0); in VisitVecExtractScalar() 988 __ InsertW(dst, locations->InAt(0).AsRegisterPairLow<Register>(), 0); in VisitVecSetScalars()
|
D | code_generator.cc | 741 DCHECK(is_out || !blocked_core_registers_[location.AsRegisterPairLow<int>()]); in BlockIfInRegister() 742 blocked_core_registers_[location.AsRegisterPairLow<int>()] = true; in BlockIfInRegister()
|