Searched refs:Bc1eqz (Results 1 – 6 of 6) sorted by relevance
| /art/compiler/utils/mips/ |
| D | assembler_mips32r6_test.cc | 1126 TEST_F(AssemblerMIPS32r6Test, Bc1eqz) { in TEST_F() argument
1127 BranchFpuCondHelper(&mips::MipsAssembler::Bc1eqz, "Bc1eqz"); in TEST_F()
1247 BranchFpuCondHelper(&mips::MipsAssembler::Bc1eqz, "Bc1eqz", /* is_bare */ true); in TEST_F()
1455 __ Bc1eqz(mips::F10, &label); // F10 dependency. in TEST_F() local
1480 __ Bc1eqz(mips::F4, &label); in TEST_F() local
1510 __ Bc1eqz(mips::F0, &label3); in TEST_F() local
1515 __ Bc1eqz(mips::F0, &label4); in TEST_F() local
1544 __ Bc1eqz(mips::F0, &label1); in TEST_F() local
1558 __ Bc1eqz(mips::F4, &label1); in TEST_F() local
1606 __ Bc1eqz(mips::F0, &label); in TEST_F() local
|
| D | assembler_mips.h | 436 void Bc1eqz(FRegister ft, uint16_t imm16); // R6
830 void Bc1eqz(FRegister ft, MipsLabel* label, bool is_bare = false); // R6
|
| /art/compiler/utils/mips64/ |
| D | assembler_mips64.h | 569 void Bc1eqz(FpuRegister ft, uint16_t imm16);
1016 void Bc1eqz(FpuRegister ft, Mips64Label* label, bool is_bare = false);
|
| D | assembler_mips64.cc | 821 void Mips64Assembler::Bc1eqz(FpuRegister ft, uint16_t imm16) { in Bc1eqz() function in art::mips64::Mips64Assembler
916 Bc1eqz(static_cast<FpuRegister>(rs), imm16_21); in EmitBcondR6()
3308 void Mips64Assembler::Bc1eqz(FpuRegister ft, Mips64Label* label, bool is_bare) { in Bc1eqz() function in art::mips64::Mips64Assembler
|
| /art/compiler/optimizing/ |
| D | intrinsics_mips64.cc | 563 __ Bc1eqz(FTMP, &noNaNs); in GenMinMaxFP() local
586 __ Bc1eqz(FTMP, &noNaNs); in GenMinMaxFP() local
|
| D | intrinsics_mips.cc | 884 __ Bc1eqz(FTMP, &noNaNs); in GenMinMaxFP() local
907 __ Bc1eqz(FTMP, &noNaNs); in GenMinMaxFP() local
|