Searched refs:Eor (Results 1 – 6 of 6) sorted by relevance
/art/compiler/utils/arm/ |
D | assembler_arm_vixl.h | 88 WITH_FLAGS_DONT_CARE_RD_RN_OP(Eor);
|
/art/compiler/optimizing/ |
D | intrinsics_arm_vixl.cc | 483 __ Eor(out_reg_lo, mask, out_reg_lo); in GenAbsInteger() local 484 __ Eor(out_reg_hi, mask, out_reg_hi); in GenAbsInteger() local 491 __ Eor(out_reg, mask, out_reg); in GenAbsInteger() local 1635 __ Eor(temp1, temp2, temp_reg); in GenerateStringCompareToLoop() local 3216 __ Eor(out, out, infinity); in VisitFloatIsInfinite() local 3239 __ Eor(out, out, infinity_high); in VisitDoubleIsInfinite() local 3240 __ Eor(out, out, infinity_high2); in VisitDoubleIsInfinite() local
|
D | code_generator_vector_arm64.cc | 358 __ Eor(dst.V16B(), dst.V16B(), src.V16B()); in VisitVecNot() local 762 __ Eor(dst.V16B(), lhs.V16B(), rhs.V16B()); // lanes do not matter in VisitVecXor() local
|
D | intrinsics_arm64.cc | 1372 __ Eor(temp2, temp2, Operand(temp3)); in VisitStringCompareTo() local 1417 __ Eor(temp1, temp2, temp4); in VisitStringCompareTo() local 2932 __ Eor(out, out, infinity); in GenIsInfinite() local
|
D | code_generator_arm_vixl.cc | 1582 __ Eor(out, first, second); in GenerateDataProcInstruction() local 3344 __ Eor(out, left, right); in HandleCondition() local 3347 __ Eor(out, out, 1); in HandleCondition() local 5230 __ Eor(OutputRegister(bool_not), InputRegister(bool_not), 1); in VisitBooleanNot() local 8165 __ Eor(out, first, value); in GenerateEorConst() local 8245 __ Eor(out_reg, first_reg, second_reg); in HandleBitwiseOperation() local 8263 __ Eor(out_low, first_low, second_low); in HandleBitwiseOperation() local 8264 __ Eor(out_high, first_high, second_high); in HandleBitwiseOperation() local
|
D | code_generator_arm64.cc | 2388 __ Eor(dst, lhs, rhs); in HandleBinaryOp() local 2578 __ Eor(out, left, right_operand); in VisitDataProcWithShifterOp() local 5309 __ Eor(OutputRegister(instruction), InputRegisterAt(instruction, 0), vixl::aarch64::Operand(1)); in VisitBooleanNot() local
|