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Searched refs:Immediate (Results 1 – 13 of 13) sorted by relevance

/art/compiler/utils/x86_64/
Dassembler_x86_64.h44 class Immediate : public ValueObject {
46 explicit Immediate(int64_t value_in) : value_(value_in) {} in Immediate() function
369 void pushq(const Immediate& imm);
374 void movq(CpuRegister dst, const Immediate& src);
375 void movl(CpuRegister dst, const Immediate& src);
385 void movq(const Address& dst, const Immediate& imm);
387 void movl(const Address& dst, const Immediate& imm);
399 void movb(const Address& dst, const Immediate& imm);
407 void movw(const Address& dst, const Immediate& imm);
520 void roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm);
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Dassembler_x86_64.cc106 void X86_64Assembler::pushq(const Immediate& imm) { in pushq()
134 void X86_64Assembler::movq(CpuRegister dst, const Immediate& imm) { in movq()
150 void X86_64Assembler::movl(CpuRegister dst, const Immediate& imm) { in movl()
159 void X86_64Assembler::movq(const Address& dst, const Immediate& imm) { in movq()
217 void X86_64Assembler::movl(const Address& dst, const Immediate& imm) { in movl()
320 void X86_64Assembler::movb(const Address& dst, const Immediate& imm) { in movb()
380 void X86_64Assembler::movw(const Address& dst, const Immediate& imm) { in movw()
1279 void X86_64Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundsd()
1291 void X86_64Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundss()
1794 void X86_64Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufpd()
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Djni_macro_assembler_x86_64.cc59 __ subq(CpuRegister(RSP), Immediate(rest_of_frame)); in BuildFrame()
123 __ addq(CpuRegister(RSP), Immediate(adjust)); in RemoveFrame()
141 __ addq(CpuRegister(RSP), Immediate(-static_cast<int64_t>(adjust))); in IncreaseFrameSize()
147 assembler->addq(CpuRegister(RSP), Immediate(adjust)); in DecreaseFrameSizeImpl()
203 __ movl(Address(CpuRegister(RSP), dest), Immediate(imm)); // TODO(64) movq? in StoreImmediateToFrame()
355 __ subl(CpuRegister(RSP), Immediate(16)); in Move()
365 __ addq(CpuRegister(RSP), Immediate(16)); in Move()
590 Immediate(0)); in ExceptionPoll()
/art/compiler/utils/x86/
Dassembler_x86.h37 class Immediate : public ValueObject {
39 explicit Immediate(int32_t value_in) : value_(value_in) {} in Immediate() function
325 void pushl(const Immediate& imm);
330 void movl(Register dst, const Immediate& src);
335 void movl(const Address& dst, const Immediate& imm);
350 void rorl(Register reg, const Immediate& imm);
352 void roll(Register reg, const Immediate& imm);
361 void movb(const Address& dst, const Immediate& imm);
369 void movw(const Address& dst, const Immediate& imm);
476 void roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm);
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Djni_macro_assembler_x86.cc64 __ addl(ESP, Immediate(-adjust)); in BuildFrame()
94 __ addl(ESP, Immediate(adjust)); in RemoveFrame()
110 __ addl(ESP, Immediate(-adjust)); in IncreaseFrameSize()
116 assembler->addl(ESP, Immediate(adjust)); in DecreaseFrameSizeImpl()
164 __ movl(Address(ESP, dest), Immediate(imm)); in StoreImmediateToFrame()
305 __ subl(ESP, Immediate(16)); in Move()
315 __ addl(ESP, Immediate(16)); in Move()
523 __ fs()->cmpl(Address::Absolute(Thread::ExceptionOffset<kX86PointerSize>()), Immediate(0)); in ExceptionPoll()
Dassembler_x86_test.cc44 x86::Immediate> {
50 x86::Immediate> Base;
138 x86::Immediate CreateImmediate(int64_t imm_value) OVERRIDE { in CreateImmediate()
139 return x86::Immediate(imm_value); in CreateImmediate()
/art/compiler/optimizing/
Dintrinsics_x86.cc161 __ addl(temp1, Immediate(1)); in EmitNativeCode()
207 __ psrlq(temp, Immediate(32)); in MoveFPToInt()
288 __ sarl(out, Immediate(16)); in GenReverseBytes()
384 __ subl(ESP, Immediate(8)); in MathAbsFP()
385 __ pushl(Immediate(0x7FFFFFFF)); in MathAbsFP()
386 __ pushl(Immediate(0xFFFFFFFF)); in MathAbsFP()
389 __ subl(ESP, Immediate(12)); in MathAbsFP()
390 __ pushl(Immediate(0x7FFFFFFF)); in MathAbsFP()
393 __ addl(ESP, Immediate(16)); in MathAbsFP()
459 __ sarl(temp, Immediate(31)); in GenAbsLong()
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Dintrinsics_x86_64.cc114 __ addl(src_curr_addr, Immediate(element_size)); in EmitNativeCode()
115 __ addl(dst_curr_addr, Immediate(element_size)); in EmitNativeCode()
201 __ sarl(out, Immediate(16)); in GenReverseBytes()
305 __ sarq(mask, Immediate(63)); in GenAbsInteger()
312 __ sarl(mask, Immediate(31)); in GenAbsInteger()
600 __ roundsd(out, in, Immediate(round_mode)); in GenSSE41FPToFPIntrinsic()
676 __ roundss(t1, in, Immediate(1)); in VisitMathRoundFloat()
690 __ movl(out, Immediate(0)); // does not change flags in VisitMathRoundFloat()
720 __ roundsd(t1, in, Immediate(1)); in VisitMathRoundDouble()
734 __ movl(out, Immediate(0)); // does not change flags, implicit zero extension to 64-bit in VisitMathRoundDouble()
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Dcode_generator_x86_64.cc210 __ shrl(length_loc.AsRegister<CpuRegister>(), Immediate(1)); in EmitNativeCode()
257 __ movl(CpuRegister(RAX), Immediate(cls_->GetTypeIndex().index_)); in EmitNativeCode()
308 __ movl(CpuRegister(RAX), Immediate(string_index.index_)); in EmitNativeCode()
804 __ shll(CpuRegister(index_reg), Immediate(TIMES_4)); in EmitNativeCode()
808 __ AddImmediate(CpuRegister(index_reg), Immediate(offset_)); in EmitNativeCode()
844 __ movl(CpuRegister(calling_convention.GetRegisterAt(2)), Immediate(offset_)); in EmitNativeCode()
1273 Immediate(1)); in GenerateFrameEntry()
1296 __ subq(CpuRegister(RSP), Immediate(adjust)); in GenerateFrameEntry()
1319 __ movl(Address(CpuRegister(RSP), GetStackOffsetOfShouldDeoptimizeFlag()), Immediate(0)); in GenerateFrameEntry()
1337 __ addq(CpuRegister(RSP), Immediate(adjust)); in GenerateFrameExit()
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Dcode_generator_vector_x86_64.cc75 __ pshufd(dst, dst, Immediate(0)); in VisitVecReplicateScalar()
82 __ pshufd(dst, dst, Immediate(0)); in VisitVecReplicateScalar()
87 __ pshufd(dst, dst, Immediate(0)); in VisitVecReplicateScalar()
97 __ shufps(dst, dst, Immediate(0)); in VisitVecReplicateScalar()
102 __ shufpd(dst, dst, Immediate(0)); in VisitVecReplicateScalar()
214 __ psrldq(tmp, Immediate(8)); in VisitVecReduce()
216 __ psrldq(tmp, Immediate(4)); in VisitVecReduce()
224 __ psrldq(tmp, Immediate(8)); in VisitVecReduce()
226 __ psrldq(tmp, Immediate(4)); in VisitVecReduce()
345 __ psrld(dst, Immediate(1)); in VisitVecAbs()
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Dcode_generator_vector_x86.cc80 __ pshufd(dst, dst, Immediate(0)); in VisitVecReplicateScalar()
87 __ pshufd(dst, dst, Immediate(0)); in VisitVecReplicateScalar()
92 __ pshufd(dst, dst, Immediate(0)); in VisitVecReplicateScalar()
106 __ shufps(dst, dst, Immediate(0)); in VisitVecReplicateScalar()
111 __ shufpd(dst, dst, Immediate(0)); in VisitVecReplicateScalar()
166 __ pshufd(tmp, src, Immediate(1)); in VisitVecExtractScalar()
231 __ psrldq(tmp, Immediate(8)); in VisitVecReduce()
233 __ psrldq(tmp, Immediate(4)); in VisitVecReduce()
241 __ psrldq(tmp, Immediate(8)); in VisitVecReduce()
243 __ psrldq(tmp, Immediate(4)); in VisitVecReduce()
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Dcode_generator_x86.h595 assembler_.lock()->addl(Address(ESP, 0), Immediate(0));
Dcode_generator_x86_64.h575 assembler_.lock()->addl(Address(CpuRegister(RSP), 0), Immediate(0));