Searched refs:Sll (Results 1 – 5 of 5) sorted by relevance
/art/compiler/optimizing/ |
D | intrinsics_mips.cc | 265 __ Sll(TMP, in, 24); in GenReverse() local 267 __ Sll(out, in, 16); in GenReverse() local 281 __ Sll(TMP, in, 16); in GenReverse() local 287 __ Sll(TMP, TMP, 8); in GenReverse() local 298 __ Sll(TMP, TMP, 4); in GenReverse() local 304 __ Sll(TMP, TMP, 2); in GenReverse() local 310 __ Sll(TMP, TMP, 1); in GenReverse() local 333 __ Sll(TMP, in_lo, 16); in GenReverse() local 338 __ Sll(AT, in_hi, 16); in GenReverse() local 346 __ Sll(out_hi, out_hi, 8); in GenReverse() local [all …]
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/art/compiler/utils/mips/ |
D | assembler_mips_test.cc | 448 TEST_F(AssemblerMIPSTest, Sll) { in TEST_F() argument 449 DriverStr(RepeatRRIb(&mips::MipsAssembler::Sll, 5, "sll ${reg1}, ${reg2}, {imm}"), "Sll"); in TEST_F()
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D | assembler_mips.h | 343 void Sll(Register rd, Register rt, int shamt);
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/art/compiler/utils/mips64/ |
D | assembler_mips64.h | 494 void Sll(GpuRegister rd, GpuRegister rt, int shamt);
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D | assembler_mips64.cc | 507 void Mips64Assembler::Sll(GpuRegister rd, GpuRegister rt, int shamt) { in Sll() function in art::mips64::Mips64Assembler
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