/art/compiler/utils/mips64/ |
D | constants_mips64.h | 88 TIMES_1 = 0, enumerator
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D | assembler_mips64.h | 1201 case TIMES_1: LdB(static_cast<VectorRegister>(reg), base, offset); break; 1290 case TIMES_1: StB(static_cast<VectorRegister>(reg), base, offset); break;
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D | assembler_mips64.cc | 3466 element_size_shift = TIMES_1; in AdjustBaseOffsetAndElementSizeShift()
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/art/compiler/utils/arm/ |
D | constants_arm.h | 55 TIMES_1 = 0, enumerator
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/art/compiler/utils/mips/ |
D | constants_mips.h | 113 TIMES_1 = 0, enumerator
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D | assembler_mips.h | 995 case TIMES_1: LdB(static_cast<VectorRegister>(reg), base, offset); break; 1082 case TIMES_1: StB(static_cast<VectorRegister>(reg), base, offset); break;
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/art/compiler/utils/x86/ |
D | constants_x86.h | 73 TIMES_1 = 0, enumerator
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D | assembler_x86_test.cc | 68 addresses_singleton_.push_back(x86::Address(x86::EAX, x86::EBX, x86::TIMES_1, 2)); in SetUpHelpers() 73 addresses_.push_back(x86::Address(x86::EDI, x86::EAX, x86::TIMES_1, 15)); in SetUpHelpers() 82 addresses_.push_back(x86::Address(x86::ESP, x86::EAX, x86::TIMES_1, 15)); in SetUpHelpers() 238 all_addresses.push_back(x86::Address(*index, x86::TIMES_1, -1)); in TEST_F() 244 all_addresses.push_back(x86::Address(*base, *index, x86::TIMES_1, -1)); in TEST_F()
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D | assembler_x86.h | 210 if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in); in Init() 213 if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in); in Init() 217 if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in); in Init()
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/art/compiler/utils/x86_64/ |
D | constants_x86_64.h | 82 TIMES_1 = 0, enumerator
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D | assembler_x86_64.h | 209 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init() 214 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init() 220 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init() 255 result.SetSIB(TIMES_1, CpuRegister(RSP), CpuRegister(RBP));
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/art/compiler/optimizing/ |
D | intrinsics_x86.cc | 134 __ leal(temp2, Address(src_pos.AsRegister<Register>(), temp1, ScaleFactor::TIMES_1, 0)); in EmitNativeCode() 157 __ leal(temp3, Address(dest_pos.AsRegister<Register>(), temp1, ScaleFactor::TIMES_1, 0)); in EmitNativeCode() 1592 __ leal(string_obj, Address(string_obj, counter, ScaleFactor::TIMES_1, value_offset)); in GenerateStringIndexOf() 1606 __ leal(counter, Address(string_length, counter, ScaleFactor::TIMES_1, 0)); in GenerateStringIndexOf() 1807 __ leal(ESI, CodeGeneratorX86::ArrayAddress(obj, srcBegin, TIMES_1, value_offset)); in VisitStringGetCharsNoCheck() 2017 __ movl(output, Address(base, offset, ScaleFactor::TIMES_1, 0)); in GenUnsafeGet() 2025 Address src(base, offset, ScaleFactor::TIMES_1, 0); in GenUnsafeGet() 2029 __ movl(output, Address(base, offset, ScaleFactor::TIMES_1, 0)); in GenUnsafeGet() 2034 __ movl(output, Address(base, offset, ScaleFactor::TIMES_1, 0)); in GenUnsafeGet() 2046 __ movsd(temp, Address(base, offset, ScaleFactor::TIMES_1, 0)); in GenUnsafeGet() [all …]
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D | intrinsics_x86_64.cc | 1758 __ leaq(string_obj, Address(string_obj, counter, ScaleFactor::TIMES_1, value_offset)); in GenerateStringIndexOf() 1769 __ leaq(counter, Address(string_length, counter, ScaleFactor::TIMES_1, 0)); in GenerateStringIndexOf() 1961 CodeGeneratorX86_64::ArrayAddress(obj, srcBegin, TIMES_1, value_offset)); in VisitStringGetCharsNoCheck() 2158 __ movl(output, Address(base, offset, ScaleFactor::TIMES_1, 0)); in GenUnsafeGet() 2164 Address src(base, offset, ScaleFactor::TIMES_1, 0); in GenUnsafeGet() 2168 __ movl(output, Address(base, offset, ScaleFactor::TIMES_1, 0)); in GenUnsafeGet() 2173 __ movl(output, Address(base, offset, ScaleFactor::TIMES_1, 0)); in GenUnsafeGet() 2180 __ movq(output, Address(base, offset, ScaleFactor::TIMES_1, 0)); in GenUnsafeGet() 2303 __ movq(Address(base, offset, ScaleFactor::TIMES_1, 0), value); in GenUnsafePut() 2308 __ movl(Address(base, offset, ScaleFactor::TIMES_1, 0), temp); in GenUnsafePut() [all …]
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D | code_generator_vector_mips.cc | 1297 int scale = TIMES_1; in VecAddress() 1312 if (scale != TIMES_1) { in VecAddress()
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D | code_generator_vector_mips64.cc | 1295 int scale = TIMES_1; in VecAddress() 1310 if (scale != TIMES_1) { in VecAddress()
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D | code_generator_x86_64.cc | 3068 first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>(), TIMES_1, 0)); in VisitAdd() 3093 first.AsRegister<CpuRegister>(), second.AsRegister<CpuRegister>(), TIMES_1, 0)); in VisitAdd() 4681 __ movzxb(out, CodeGeneratorX86_64::ArrayAddress(obj, index, TIMES_1, data_offset)); in VisitArrayGet() 4687 __ movsxb(out, CodeGeneratorX86_64::ArrayAddress(obj, index, TIMES_1, data_offset)); in VisitArrayGet() 4702 __ movzxb(out, CodeGeneratorX86_64::ArrayAddress(obj, index, TIMES_1, data_offset)); in VisitArrayGet() 4835 Address address = CodeGeneratorX86_64::ArrayAddress(array, index, TIMES_1, offset); in VisitArraySet() 5137 __ movb(Address(temp, card, TIMES_1, 0), card); in MarkGCCard()
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D | intrinsics_mips64.cc | 1184 TIMES_1, in GenUnsafeGet() 1507 ScaleFactor::TIMES_1, in GenCas()
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D | code_generator_vector_x86_64.cc | 1088 ScaleFactor scale = TIMES_1; in VecAddress()
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D | code_generator_vector_x86.cc | 1115 ScaleFactor scale = TIMES_1; in VecAddress()
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D | intrinsics_mips.cc | 1606 TIMES_1, in GenUnsafeGet() 1939 ScaleFactor::TIMES_1, in GenCas()
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D | code_generator_arm_vixl.cc | 1056 DCHECK_EQ(scale_factor_, ScaleFactor::TIMES_1); in EmitNativeCode() 8526 ScaleFactor no_scale_factor = TIMES_1; in GenerateFieldLoadWithBakerReadBarrier() 8699 /* scale_factor */ ScaleFactor::TIMES_1, in UpdateReferenceFieldWithBakerReadBarrier()
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D | intrinsics_arm_vixl.cc | 981 invoke, trg_loc, base, 0U, offset_loc, TIMES_1, temp, /* needs_null_check */ false); in GenUnsafeGet()
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