Searched refs:andq (Results 1 – 6 of 6) sorted by relevance
| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.h | 673 void andq(CpuRegister dst, const Immediate& imm);
674 void andq(CpuRegister dst, CpuRegister src);
675 void andq(CpuRegister reg, const Address& address);
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| D | assembler_x86_64.cc | 2394 void X86_64Assembler::andq(CpuRegister reg, const Immediate& imm) { in andq() function in art::x86_64::X86_64Assembler
2402 void X86_64Assembler::andq(CpuRegister dst, CpuRegister src) { in andq() function in art::x86_64::X86_64Assembler
2410 void X86_64Assembler::andq(CpuRegister dst, const Address& src) { in andq() function in art::x86_64::X86_64Assembler
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| /art/runtime/arch/x86_64/ |
| D | quick_entrypoints_x86_64.S | 1146 andq LITERAL(OBJECT_ALIGNMENT_MASK_TOGGLED64), %r9
1204 andq MACRO_LITERAL(4), %rcx
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| /art/compiler/optimizing/ |
| D | intrinsics_x86_64.cc | 2589 __ andq(temp, temp_mask); in SwapBits64() local
2590 __ andq(reg, temp_mask); in SwapBits64() local
2769 __ andq(out, tmp); in GenOneBit() local
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| D | code_generator_x86_64.cc | 6426 __ andq(first_reg, Immediate(static_cast<int32_t>(value))); in HandleBitwiseOperation() local
6428 __ andq(first_reg, codegen_->LiteralInt64Address(value)); in HandleBitwiseOperation() local
6431 __ andq(first_reg, Address(CpuRegister(RSP), second.GetStackIndex())); in HandleBitwiseOperation() local
6433 __ andq(first_reg, second.AsRegister<CpuRegister>()); in HandleBitwiseOperation() local
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| /art/runtime/interpreter/mterp/out/ |
| D | mterp_x86_64.S | 4153 andq (rFP,%rcx,4), %rax # ex: addq (rFP,%rcx,4),%rax
4864 andq %rax, (rFP,%rcx,4) # for ex: addq %rax,(rFP,%rcx,4)
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