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Searched refs:core_spill_mask_ (Results 1 – 7 of 7) sorted by relevance

/art/runtime/quick/
Dquick_method_frame_info.h30 core_spill_mask_(0u), in QuickMethodFrameInfo()
37 core_spill_mask_(core_spill_mask), in QuickMethodFrameInfo()
46 return core_spill_mask_; in CoreSpillMask()
59 uint32_t core_spill_mask_; variable
/art/compiler/jni/quick/
Djni_compiler.h42 core_spill_mask_(core_spill_mask), in JniCompiledMethod()
52 uint32_t GetCoreSpillMask() const { return core_spill_mask_; } in GetCoreSpillMask()
60 uint32_t core_spill_mask_; variable
/art/compiler/
Dcompiled_method.h156 return core_spill_mask_; in GetCoreSpillMask()
183 const uint32_t core_spill_mask_; variable
Dcompiled_method.cc114 core_spill_mask_(core_spill_mask), in CompiledMethod()
/art/compiler/optimizing/
Dcode_generator.h234 uint32_t GetCoreSpillMask() const { return core_spill_mask_; } in GetCoreSpillMask()
242 core_spill_mask_ = allocated_registers_.GetCoreRegisters() & core_callee_save_mask_; in ComputeSpillMask()
243 DCHECK_NE(core_spill_mask_, 0u) << "At least the return address register must be saved"; in ComputeSpillMask()
659 return POPCOUNT(core_spill_mask_) * GetWordSize(); in GetCoreSpillSize()
711 uint32_t core_spill_mask_; variable
Dcode_generator_arm_vixl.cc2463 core_spill_mask_ = allocated_registers_.GetCoreRegisters() & core_callee_save_mask_; in ComputeSpillMask()
2464 DCHECK_NE(core_spill_mask_, 0u) << "At least the return address register must be saved"; in ComputeSpillMask()
2467 core_spill_mask_ |= (1 << kCoreAlwaysSpillRegister.GetCode()); in ComputeSpillMask()
2527 __ Push(RegisterList(core_spill_mask_)); in GenerateFrameEntry()
2528 GetAssembler()->cfi().AdjustCFAOffset(kArmWordSize * POPCOUNT(core_spill_mask_)); in GenerateFrameEntry()
2531 core_spill_mask_, in GenerateFrameEntry()
2587 DCHECK_NE(core_spill_mask_ & (1 << kLrCode), 0U); in GenerateFrameExit()
2588 uint32_t pop_mask = (core_spill_mask_ & (~(1 << kLrCode))) | 1 << kPcCode; in GenerateFrameExit()
Dcode_generator.cc837 core_spill_mask_(0), in CodeGenerator()