| /art/compiler/utils/x86_64/ |
| D | jni_macro_assembler_x86_64.h | 113 void Copy(ManagedRegister dest_base,
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| D | jni_macro_assembler_x86_64.cc | 422 void X86_64JNIMacroAssembler::Copy(ManagedRegister dest_base, in Copy() argument
430 __ popq(Address(dest_base.AsX86_64().AsCpuRegister(), dest_offset)); in Copy()
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| /art/compiler/utils/x86/ |
| D | jni_macro_assembler_x86.h | 105 void Copy(ManagedRegister dest_base, Offset dest_offset, FrameOffset src, ManagedRegister scratch,
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| D | jni_macro_assembler_x86.cc | 371 void X86JNIMacroAssembler::Copy(ManagedRegister dest_base, in Copy() argument
379 __ popl(Address(dest_base.AsX86().AsCpuRegister(), dest_offset)); in Copy()
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| /art/compiler/utils/arm/ |
| D | jni_macro_assembler_arm_vixl.h | 122 void Copy(ManagedRegister dest_base,
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| D | jni_macro_assembler_arm_vixl.cc | 436 void ArmVIXLJNIMacroAssembler::Copy(ManagedRegister dest_base ATTRIBUTE_UNUSED, in Copy()
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| /art/compiler/utils/ |
| D | jni_macro_assembler.h | 138 virtual void Copy(ManagedRegister dest_base,
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| /art/compiler/utils/arm64/ |
| D | jni_macro_assembler_arm64.h | 107 void Copy(ManagedRegister dest_base,
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| /art/compiler/optimizing/ |
| D | intrinsics_mips64.cc | 2167 GpuRegister dest_base = locations->GetTemp(0).AsRegister<GpuRegister>(); in VisitSystemArrayCopyChar() local
2225 __ Daddiu64(dest_base, dest, data_offset + char_size * dest_pos_const, TMP); in VisitSystemArrayCopyChar()
2227 __ Daddiu64(dest_base, dest, data_offset, TMP); in VisitSystemArrayCopyChar()
2228 __ Dlsa(dest_base, dest_pos.AsRegister<GpuRegister>(), dest_base, char_shift); in VisitSystemArrayCopyChar()
2235 __ Sh(TMP, dest_base, 0); in VisitSystemArrayCopyChar()
2236 __ Daddiu(dest_base, dest_base, char_size); in VisitSystemArrayCopyChar()
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| D | intrinsics_mips.cc | 3065 Register dest_base = locations->GetTemp(0).AsRegister<Register>(); in VisitSystemArrayCopyChar() local
3122 __ Addiu32(dest_base, dest, data_offset + char_size * dest_pos_const, TMP); in VisitSystemArrayCopyChar()
3124 __ Addiu32(dest_base, dest, data_offset, TMP); in VisitSystemArrayCopyChar()
3125 __ ShiftAndAdd(dest_base, dest_pos.AsRegister<Register>(), dest_base, char_shift); in VisitSystemArrayCopyChar()
3132 __ Sh(TMP, dest_base, 0); in VisitSystemArrayCopyChar()
3133 __ Addiu(dest_base, dest_base, char_size); in VisitSystemArrayCopyChar()
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| D | intrinsics_x86_64.cc | 1039 CpuRegister dest_base = locations->GetTemp(1).AsRegister<CpuRegister>(); in VisitSystemArrayCopyChar() local
1040 DCHECK_EQ(dest_base.AsRegister(), RDI); in VisitSystemArrayCopyChar()
1095 __ leal(dest_base, Address(dest, char_size * dest_pos_const + data_offset)); in VisitSystemArrayCopyChar()
1097 __ leal(dest_base, Address(dest, dest_pos.AsRegister<CpuRegister>(), in VisitSystemArrayCopyChar()
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| D | intrinsics_x86.cc | 1259 Register dest_base = locations->GetTemp(1).AsRegister<Register>(); in VisitSystemArrayCopyChar() local
1260 DCHECK_EQ(dest_base, EDI); in VisitSystemArrayCopyChar()
1316 __ leal(dest_base, Address(dest, char_size * destPos_const + data_offset)); in VisitSystemArrayCopyChar()
1318 __ leal(dest_base, Address(dest, destPos.AsRegister<Register>(), in VisitSystemArrayCopyChar()
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 3876 void Mips64Assembler::Copy(ManagedRegister dest_base, Offset dest_offset, FrameOffset src, in Copy() argument
3882 StoreToOffset(kStoreDoubleword, scratch, dest_base.AsMips64().AsGpuRegister(), in Copy()
3886 StoreToOffset(kStoreDoubleword, scratch, dest_base.AsMips64().AsGpuRegister(), in Copy()
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| D | assembler_mips64.h | 1378 void Copy(ManagedRegister dest_base, Offset dest_offset, FrameOffset src,
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| /art/compiler/utils/mips/ |
| D | assembler_mips.h | 1295 void Copy(ManagedRegister dest_base,
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