| /art/compiler/debug/dwarf/ |
| D | dwarf_test.cc | 35 const bool is64bit = false; in TEST_F() local
125 WriteCIE(is64bit, Reg(is64bit ? 16 : 8), in TEST_F()
129 WriteFDE(is64bit, 0, 0, 0x01000000, 0x01000000, ArrayRef<const uint8_t>(*opcodes.data()), in TEST_F()
133 CheckObjdumpOutput(is64bit, "-W"); in TEST_F()
137 constexpr bool is64bit = true; in TEST_F() local
139 WriteCIE(is64bit, Reg(16), in TEST_F()
144 WriteFDE(is64bit, 0, 0, 0x0100000000000000, 0x0200000000000000, in TEST_F()
150 CheckObjdumpOutput(is64bit, "-W"); in TEST_F()
156 constexpr bool is64bit = true; in TEST_F() local
179 WriteCIE(is64bit, Reg(16), in TEST_F()
[all …]
|
| D | dwarf_test.h | 112 std::vector<std::string> Objdump(bool is64bit, const char* args) { in Objdump() argument
113 if (is64bit) { in Objdump()
121 void CheckObjdumpOutput(bool is64bit, const char* args) { in CheckObjdumpOutput() argument
122 std::vector<std::string> actual_lines = Objdump(is64bit, args); in CheckObjdumpOutput()
|
| D | headers.h | 41 void WriteCIE(bool is64bit, in WriteCIE() argument
58 if (is64bit) { in WriteCIE()
74 writer.Pad(is64bit ? 8 : 4); in WriteCIE()
80 void WriteFDE(bool is64bit, in WriteFDE() argument
112 if (is64bit) { in WriteFDE()
121 writer.Pad(is64bit ? 8 : 4); in WriteFDE()
|
| /art/compiler/debug/ |
| D | elf_debug_frame_writer.h | 38 bool is64bit = Is64BitInstructionSet(isa); in WriteCIE() local
61 WriteCIE(is64bit, return_reg, opcodes, format, buffer); in WriteCIE()
84 WriteCIE(is64bit, return_reg, opcodes, format, buffer); in WriteCIE()
108 WriteCIE(is64bit, return_reg, opcodes, format, buffer); in WriteCIE()
134 WriteCIE(is64bit, return_reg, opcodes, format, buffer); in WriteCIE()
160 WriteCIE(is64bit, return_reg, opcodes, format, buffer); in WriteCIE()
214 const bool is64bit = Is64BitInstructionSet(builder->GetIsa()); in WriteCFISection() local
232 WriteFDE(is64bit, cfi_address, cie_address, in WriteCFISection()
|
| D | elf_debug_loc_writer.h | 207 const bool is64bit = Is64BitInstructionSet(isa); in WriteDebugLocEntry() local
269 if (is64bit) { in WriteDebugLocEntry()
284 if (is64bit) { in WriteDebugLocEntry()
303 if (is64bit) { in WriteDebugLocEntry()
312 if (is64bit) { in WriteDebugLocEntry()
|
| D | elf_debug_line_writer.h | 58 const bool is64bit = Is64BitInstructionSet(isa); in WriteCompilationUnit() local
88 dwarf::DebugLineOpCodeWriter<> opcodes(is64bit, code_factor_bits_); in WriteCompilationUnit()
|
| D | elf_debug_info_writer.h | 129 const bool is64bit = Is64BitInstructionSet(owner_->builder_->GetIsa()); in Write() local
146 if (is64bit) { in Write()
154 if (is64bit) { in Write()
|
| /art/compiler/ |
| D | cfi_test.h | 51 constexpr bool is64bit = false; in GenerateExpected() local
53 dwarf::WriteCIE(is64bit, dwarf::Reg(8), in GenerateExpected()
56 dwarf::WriteFDE(is64bit, 0, 0, 0, actual_asm.size(), ArrayRef<const uint8_t>(actual_cfi), in GenerateExpected()
66 is64bit in GenerateExpected()
|
| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.h | 390 void cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit);
391 void cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit);
427 void movd(XmmRegister dst, CpuRegister src, bool is64bit);
428 void movd(CpuRegister dst, XmmRegister src, bool is64bit);
489 void cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit);
490 void cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit);
492 void cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit);
493 void cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit);
504 void cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit);
506 void cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit);
|
| D | assembler_x86_64.cc | 245 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) { in cmov() argument
247 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in cmov()
254 void X86_64Assembler::cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit) { in cmov() argument
256 if (is64bit) { in cmov()
507 void X86_64Assembler::movd(XmmRegister dst, CpuRegister src, bool is64bit) { in movd() argument
510 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in movd()
516 void X86_64Assembler::movd(CpuRegister dst, XmmRegister src, bool is64bit) { in movd() argument
519 EmitOptionalRex(false, is64bit, src.NeedsRex(), false, dst.NeedsRex()); in movd()
1019 void X86_64Assembler::cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit) { in cvtsi2ss() argument
1022 if (is64bit) { in cvtsi2ss()
[all …]
|
| /art/compiler/optimizing/ |
| D | code_generator_mips64.h | 296 void GenerateIntLongCompare(IfCondition cond, bool is64bit, LocationSummary* locations);
301 bool is64bit,
305 bool is64bit,
|
| D | intrinsics_mips64.cc | 151 static void MoveFPToInt(LocationSummary* locations, bool is64bit, Mips64Assembler* assembler) { in MoveFPToInt() argument
155 if (is64bit) { in MoveFPToInt()
187 static void MoveIntToFP(LocationSummary* locations, bool is64bit, Mips64Assembler* assembler) { in MoveIntToFP() argument
191 if (is64bit) { in MoveIntToFP()
276 bool is64bit, in GenNumberOfLeadingZeroes() argument
281 if (is64bit) { in GenNumberOfLeadingZeroes()
307 bool is64bit, in GenNumberOfTrailingZeroes() argument
312 if (is64bit) { in GenNumberOfTrailingZeroes()
473 static void MathAbsFP(LocationSummary* locations, bool is64bit, Mips64Assembler* assembler) { in MathAbsFP() argument
477 if (is64bit) { in MathAbsFP()
[all …]
|
| D | intrinsics_arm64.cc | 253 static void MoveFPToInt(LocationSummary* locations, bool is64bit, MacroAssembler* masm) { in MoveFPToInt() argument
256 __ Fmov(is64bit ? XRegisterFrom(output) : WRegisterFrom(output), in MoveFPToInt()
257 is64bit ? DRegisterFrom(input) : SRegisterFrom(input)); in MoveFPToInt()
260 static void MoveIntToFP(LocationSummary* locations, bool is64bit, MacroAssembler* masm) { in MoveIntToFP() argument
263 __ Fmov(is64bit ? DRegisterFrom(output) : SRegisterFrom(output), in MoveIntToFP()
264 is64bit ? XRegisterFrom(input) : WRegisterFrom(input)); in MoveIntToFP()
539 static void MathAbsFP(LocationSummary* locations, bool is64bit, MacroAssembler* masm) { in MathAbsFP() argument
543 FPRegister in_reg = is64bit ? DRegisterFrom(in) : SRegisterFrom(in); in MathAbsFP()
544 FPRegister out_reg = is64bit ? DRegisterFrom(out) : SRegisterFrom(out); in MathAbsFP()
566 bool is64bit, in GenAbsInteger() argument
[all …]
|
| D | intrinsics_mips.cc | 162 static void MoveFPToInt(LocationSummary* locations, bool is64bit, MipsAssembler* assembler) { in MoveFPToInt() argument
165 if (is64bit) { in MoveFPToInt()
203 static void MoveIntToFP(LocationSummary* locations, bool is64bit, MipsAssembler* assembler) { in MoveIntToFP() argument
206 if (is64bit) { in MoveIntToFP()
443 bool is64bit, in GenNumberOfLeadingZeroes() argument
447 if (is64bit) { in GenNumberOfLeadingZeroes()
491 bool is64bit, in GenNumberOfTrailingZeroes() argument
498 if (is64bit) { in GenNumberOfTrailingZeroes()
546 if (is64bit) { in GenNumberOfTrailingZeroes()
746 bool is64bit, in MathAbsFP() argument
[all …]
|
| D | intrinsics_x86.cc | 178 static void CreateFPToIntLocations(ArenaAllocator* allocator, HInvoke* invoke, bool is64bit) { in CreateFPToIntLocations() argument
183 if (is64bit) { in CreateFPToIntLocations()
188 static void CreateIntToFPLocations(ArenaAllocator* allocator, HInvoke* invoke, bool is64bit) { in CreateIntToFPLocations() argument
193 if (is64bit) { in CreateIntToFPLocations()
199 static void MoveFPToInt(LocationSummary* locations, bool is64bit, X86Assembler* assembler) { in MoveFPToInt() argument
202 if (is64bit) { in MoveFPToInt()
214 static void MoveIntToFP(LocationSummary* locations, bool is64bit, X86Assembler* assembler) { in MoveIntToFP() argument
217 if (is64bit) { in MoveIntToFP()
358 bool is64bit, in MathAbsFP() argument
372 if (is64bit) { in MathAbsFP()
[all …]
|
| D | intrinsics_x86_64.cc | 145 static void MoveFPToInt(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { in MoveFPToInt() argument
148 __ movd(output.AsRegister<CpuRegister>(), input.AsFpuRegister<XmmRegister>(), is64bit); in MoveFPToInt()
151 static void MoveIntToFP(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { in MoveIntToFP() argument
154 __ movd(output.AsFpuRegister<XmmRegister>(), input.AsRegister<CpuRegister>(), is64bit); in MoveIntToFP()
253 bool is64bit, in MathAbsFP() argument
264 if (is64bit) { in MathAbsFP()
297 static void GenAbsInteger(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { in GenAbsInteger() argument
302 if (is64bit) { in GenAbsInteger()
|
| D | intrinsics_arm_vixl.cc | 277 static void MoveFPToInt(LocationSummary* locations, bool is64bit, ArmVIXLAssembler* assembler) { in MoveFPToInt() argument
280 if (is64bit) { in MoveFPToInt()
287 static void MoveIntToFP(LocationSummary* locations, bool is64bit, ArmVIXLAssembler* assembler) { in MoveIntToFP() argument
290 if (is64bit) { in MoveIntToFP()
465 bool is64bit, in GenAbsInteger() argument
472 if (is64bit) { in GenAbsInteger()
|
| /art/runtime/interpreter/ |
| D | unstarted_runtime.cc | 1683 jboolean is64bit = (pointer_size == PointerSize::k64) ? JNI_TRUE : JNI_FALSE; in UnstartedJNIVMRuntimeIs64Bit() local
1684 result->SetZ(is64bit); in UnstartedJNIVMRuntimeIs64Bit()
|