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Searched refs:m_dst (Results 1 – 6 of 6) sorted by relevance

/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.cc281 void Arm64JNIMacroAssembler::Load(ManagedRegister m_dst, FrameOffset src, size_t size) { in Load() argument
282 return Load(m_dst.AsArm64(), SP, src.Int32Value(), size); in Load()
285 void Arm64JNIMacroAssembler::LoadFromThread(ManagedRegister m_dst, in LoadFromThread() argument
288 return Load(m_dst.AsArm64(), TR, src.Int32Value(), size); in LoadFromThread()
291 void Arm64JNIMacroAssembler::LoadRef(ManagedRegister m_dst, FrameOffset offs) { in LoadRef() argument
292 Arm64ManagedRegister dst = m_dst.AsArm64(); in LoadRef()
297 void Arm64JNIMacroAssembler::LoadRef(ManagedRegister m_dst, in LoadRef() argument
301 Arm64ManagedRegister dst = m_dst.AsArm64(); in LoadRef()
312 void Arm64JNIMacroAssembler::LoadRawPtr(ManagedRegister m_dst, in LoadRawPtr() argument
315 Arm64ManagedRegister dst = m_dst.AsArm64(); in LoadRawPtr()
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Dassembler_arm64.cc52 void Arm64Assembler::LoadRawPtr(ManagedRegister m_dst, ManagedRegister m_base, Offset offs) { in LoadRawPtr() argument
53 Arm64ManagedRegister dst = m_dst.AsArm64(); in LoadRawPtr()
/art/compiler/utils/arm/
Djni_macro_assembler_arm_vixl.cc306 void ArmVIXLJNIMacroAssembler::Load(ManagedRegister m_dst, FrameOffset src, size_t size) { in Load() argument
307 return Load(m_dst.AsArm(), sp, src.Int32Value(), size); in Load()
310 void ArmVIXLJNIMacroAssembler::LoadFromThread(ManagedRegister m_dst, in LoadFromThread() argument
313 return Load(m_dst.AsArm(), tr, src.Int32Value(), size); in LoadFromThread()
316 void ArmVIXLJNIMacroAssembler::LoadRawPtrFromThread(ManagedRegister m_dst, ThreadOffset32 offs) { in LoadRawPtrFromThread() argument
317 ArmManagedRegister dst = m_dst.AsArm(); in LoadRawPtrFromThread()
366 void ArmVIXLJNIMacroAssembler::Move(ManagedRegister m_dst, in Move() argument
369 ArmManagedRegister dst = m_dst.AsArm(); in Move()
/art/compiler/utils/mips64/
Dassembler_mips64.cc3543 void Mips64Assembler::EmitLoad(ManagedRegister m_dst, GpuRegister src_register, int32_t src_offset, in EmitLoad() argument
3545 Mips64ManagedRegister dst = m_dst.AsMips64(); in EmitLoad()
Dassembler_mips64.h1031 void EmitLoad(ManagedRegister m_dst, GpuRegister src_register, int32_t src_offset, size_t size);
/art/compiler/utils/mips/
Dassembler_mips.h833 void EmitLoad(ManagedRegister m_dst, Register src_register, int32_t src_offset, size_t size);