/art/compiler/utils/mips/ |
D | assembler_mips32r5_test.cc | 29 bool operator()(const mips::Register& a, const mips::Register& b) const { in operator ()() 34 class AssemblerMIPS32r5Test : public AssemblerTest<mips::MipsAssembler, 35 mips::MipsLabel, 36 mips::Register, 37 mips::FRegister, 39 mips::VectorRegister> { 41 typedef AssemblerTest<mips::MipsAssembler, 42 mips::MipsLabel, 43 mips::Register, 44 mips::FRegister, [all …]
|
D | assembler_mips_test.cc | 29 bool operator()(const mips::Register& a, const mips::Register& b) const { in operator ()() 34 class AssemblerMIPSTest : public AssemblerTest<mips::MipsAssembler, 35 mips::MipsLabel, 36 mips::Register, 37 mips::FRegister, 40 typedef AssemblerTest<mips::MipsAssembler, 41 mips::MipsLabel, 42 mips::Register, 43 mips::FRegister, 62 registers_.push_back(new mips::Register(mips::ZERO)); in SetUpHelpers() [all …]
|
D | assembler_mips32r6_test.cc | 29 bool operator()(const mips::Register& a, const mips::Register& b) const { in operator ()() 34 class AssemblerMIPS32r6Test : public AssemblerTest<mips::MipsAssembler, 35 mips::MipsLabel, 36 mips::Register, 37 mips::FRegister, 39 mips::VectorRegister> { 41 typedef AssemblerTest<mips::MipsAssembler, 42 mips::MipsLabel, 43 mips::Register, 44 mips::FRegister, [all …]
|
D | managed_register_mips.h | 25 namespace mips { 221 constexpr inline mips::MipsManagedRegister ManagedRegister::AsMips() const { in AsMips() 222 mips::MipsManagedRegister reg(id_); in AsMips()
|
D | constants_mips.h | 29 namespace mips {
|
/art/runtime/arch/mips/ |
D | quick_method_frame_info_mips.h | 28 namespace mips { 31 (1u << art::mips::RA); 33 (1 << art::mips::S2) | (1 << art::mips::S3) | (1 << art::mips::S4) | (1 << art::mips::S5) | 34 (1 << art::mips::S6) | (1 << art::mips::S7) | (1 << art::mips::GP) | (1 << art::mips::FP); 36 (1 << art::mips::A1) | (1 << art::mips::A2) | (1 << art::mips::A3) | (1 << art::mips::T0) | 37 (1 << art::mips::T1); 55 (1 << art::mips::ZERO) | (1 << art::mips::S0) | (1 << art::mips::S1); 57 (1 << art::mips::AT) | (1 << art::mips::V0) | (1 << art::mips::V1) | 58 (1 << art::mips::A0) | (1 << art::mips::A1) | (1 << art::mips::A2) | (1 << art::mips::A3) | 59 (1 << art::mips::T0) | (1 << art::mips::T1) | (1 << art::mips::T2) | (1 << art::mips::T3) | [all …]
|
D | fault_handler_mips.cc | 44 *out_sp = static_cast<uintptr_t>(sc->sc_regs[mips::SP]); in GetMethodAndReturnPcAndSp() 56 *out_method = reinterpret_cast<ArtMethod*>(sc->sc_regs[mips::A0]); in GetMethodAndReturnPcAndSp() 84 sc->sc_regs[mips::SP] -= mips::MipsCalleeSaveFrameSize(CalleeSaveType::kSaveEverything); in Action() 85 uintptr_t* padding = reinterpret_cast<uintptr_t*>(sc->sc_regs[mips::SP]) + /* ArtMethod* */ 1; in Action() 88 sc->sc_regs[mips::RA] = sc->sc_pc + 4; // RA needs to point to gc map location in Action() 119 uintptr_t sp = sc->sc_regs[mips::SP]; in Action() 142 sc->sc_regs[mips::T9] = sc->sc_pc; // make sure T9 points to the function in Action()
|
D | registers_mips.cc | 22 namespace mips { namespace
|
/art/compiler/utils/ |
D | label.h | 32 namespace mips { 118 friend class mips::MipsAssembler; 119 friend class mips::MipsLabel;
|
D | managed_register.h | 33 namespace mips { 59 constexpr mips::MipsManagedRegister AsMips() const;
|
D | jni_macro_assembler.cc | 65 return MacroAsm32UniquePtr(new (allocator) mips::MipsAssembler( in Create()
|
/art/compiler/ |
D | Android.bp | 133 mips: { 135 "jni/quick/mips/calling_convention_mips.cc", 136 "linker/mips/relative_patcher_mips.cc", 142 "utils/mips/assembler_mips.cc", 143 "utils/mips/managed_register_mips.cc", 213 "utils/mips/assembler_mips.h", 383 mips: { 385 "linker/mips/relative_patcher_mips_test.cc", 386 "linker/mips/relative_patcher_mips32r6_test.cc", 458 mips: { [all …]
|
/art/disassembler/ |
D | disassembler.cc | 44 return new mips::DisassemblerMips(options, /* is_o32_abi */ true); in Create() 46 return new mips::DisassemblerMips(options, /* is_o32_abi */ false); in Create()
|
D | disassembler_mips.h | 25 namespace mips {
|
/art/runtime/interpreter/mterp/ |
D | rebuild.sh | 23 for arch in arm x86 mips arm64 x86_64 mips64; do TARGET_ARCH_EXT=$arch make -f Makefile_mterp; done
|
D | config_mips | 23 asm-alt-stub mips/alt_stub.S 26 import mips/header.S 29 import mips/entry.S 32 fallback-stub mips/fallback.S 35 op-start mips 298 import mips/footer.S
|
/art/compiler/optimizing/ |
D | pc_relative_fixups_mips.h | 27 namespace mips {
|
D | instruction_simplifier_mips.h | 28 namespace mips {
|
D | optimization.cc | 112 return mips::PcRelativeFixups::kPcRelativeFixupsMipsPassName; in OptimizationPassName() 114 return mips::InstructionSimplifierMips::kInstructionSimplifierMipsPassName; in OptimizationPassName() 305 opt = new (allocator) mips::PcRelativeFixups(graph, codegen, stats); in ConstructOptimizations() 309 opt = new (allocator) mips::InstructionSimplifierMips(graph, codegen, stats); in ConstructOptimizations()
|
D | intrinsics_mips.h | 28 namespace mips {
|
D | emit_swap_mips_test.cc | 33 codegen_ = new (graph_->GetAllocator()) mips::CodeGeneratorMIPS(graph_, in SetUp() 109 mips::CodeGeneratorMIPS* codegen_; 110 mips::MipsAssembler* assembler_;
|
D | optimizing_cfi_test.cc | 243 #define __ down_cast<mips::MipsAssembler*>(GetCodeGenerator()->GetAssembler())-> in TEST_F() 244 mips::MipsLabel target; in TEST_F() 245 __ Beqz(mips::A0, &target); in TEST_F()
|
/art/runtime/arch/ |
D | context-inl.h | 33 #define RUNTIME_CONTEXT_TYPE mips::MipsContext
|
/art/runtime/ |
D | Android.bp | 226 "arch/mips/instruction_set_features_mips.cc", 227 "arch/mips/registers_mips.cc", 311 mips: { 315 "arch/mips/context_mips.cc", 316 "arch/mips/entrypoints_init_mips.cc", 317 "arch/mips/jni_entrypoints_mips.S", 318 "arch/mips/memcmp16_mips.S", 319 "arch/mips/quick_entrypoints_mips.S", 320 "arch/mips/thread_mips.cc", 321 "arch/mips/fault_handler_mips.cc", [all …]
|
/art/build/ |
D | Android.common.mk | 20 ART_TARGET_SUPPORTED_ARCH := arm arm64 mips mips64 x86 x86_64
|