Searched refs:movdqu (Results 1 – 8 of 8) sorted by relevance
/art/runtime/arch/x86_64/ |
D | memcmp16_x86_64.S | 56 movdqu (%rsi), %xmm1 57 movdqu (%rdi), %xmm2 76 movdqu (%rdi), %xmm2 81 movdqu 16(%rdi), %xmm2 86 movdqu 32(%rdi), %xmm2 91 movdqu 48(%rdi), %xmm2 98 movdqu 64(%rdi), %xmm2 103 movdqu 80(%rdi), %xmm2 125 movdqu (%rdi), %xmm2 130 movdqu 16(%rdi), %xmm2 [all …]
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/art/compiler/utils/x86/ |
D | assembler_x86_test.cc | 524 DriverStr(RepeatFA(&x86::X86Assembler::movdqu, "movdqu {mem}, %{reg}"), "movdqu_load"); in TEST_F() 528 DriverStr(RepeatAF(&x86::X86Assembler::movdqu, "movdqu %{reg}, {mem}"), "movdqu_store"); in TEST_F()
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D | assembler_x86.h | 434 void movdqu(XmmRegister dst, const Address& src); // load unaligned 436 void movdqu(const Address& dst, XmmRegister src); // store unaligned
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/art/compiler/optimizing/ |
D | code_generator_vector_x86_64.cc | 1136 is_aligned16 ? __ movdqa(reg, address) : __ movdqu(reg, address); in VisitVecLoad() 1149 is_aligned16 ? __ movdqa(reg, address) : __ movdqu(reg, address); in VisitVecLoad() 1185 is_aligned16 ? __ movdqa(address, reg) : __ movdqu(address, reg); in VisitVecStore()
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D | code_generator_vector_x86.cc | 1163 is_aligned16 ? __ movdqa(reg, address) : __ movdqu(reg, address); in VisitVecLoad() 1176 is_aligned16 ? __ movdqa(reg, address) : __ movdqu(reg, address); in VisitVecLoad() 1212 is_aligned16 ? __ movdqa(address, reg) : __ movdqu(address, reg); in VisitVecStore()
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/art/runtime/arch/x86/ |
D | memcmp16_x86.S | 74 movdqu (%eax), %xmm3 75 movdqu (%edx), %xmm0
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/art/compiler/utils/x86_64/ |
D | assembler_x86_64.h | 470 void movdqu(XmmRegister dst, const Address& src); // load unaligned 472 void movdqu(const Address& dst, XmmRegister src); // store unaligned
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D | assembler_x86_64.cc | 883 void X86_64Assembler::movdqu(XmmRegister dst, const Address& src) { in movdqu() function in art::x86_64::X86_64Assembler 903 void X86_64Assembler::movdqu(const Address& dst, XmmRegister src) { in movdqu() function in art::x86_64::X86_64Assembler
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