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Searched refs:movw (Results 1 – 15 of 15) sorted by relevance

/art/runtime/interpreter/mterp/arm/
Dop_double_to_long.S13 movw r3, #0x43e
18 movw r3, #0x7ff
/art/test/521-regression-integer-field-set/
Dinfo.txt3 a `movw` instruction instead of a `movl` instruction.
/art/runtime/interpreter/mterp/x86/
Dop_move_from16.S5 movw 2(rPC), rINSTw # rINSTw <- BBBB
Dcvtfp_int.S21 movw %ax, LOCAL0+2(%esp)
/art/runtime/interpreter/mterp/x86_64/
Dfooter.S278 movw %ax, OFF_FP_COUNTDOWN_OFFSET(rFP)
/art/compiler/linker/arm/
Drelative_patcher_thumb2_test.cc328 uint32_t movw = 0xf2400000u | // MOVW r0, #0 (placeholder), in CheckPcRelativePatch() local
339 static_cast<uint8_t>(movw >> 16), static_cast<uint8_t>(movw >> 24), in CheckPcRelativePatch()
340 static_cast<uint8_t>(movw >> 0), static_cast<uint8_t>(movw >> 8), in CheckPcRelativePatch()
/art/compiler/utils/x86/
Dassembler_x86.h367 void movw(Register dst, const Address& src);
368 void movw(const Address& dst, Register src);
369 void movw(const Address& dst, const Immediate& imm);
/art/runtime/arch/arm/
Dquick_entrypoints_arm.S1459 movw r2, #((MIN_LARGE_OBJECT_THRESHOLD - MIRROR_WIDE_ARRAY_DATA_OFFSET) / 8)
1486 movw r2, #(MIN_LARGE_OBJECT_THRESHOLD - MIRROR_INT_ARRAY_DATA_OFFSET)
1496 movw r2, #((MIN_LARGE_OBJECT_THRESHOLD - MIRROR_INT_ARRAY_DATA_OFFSET) / 2)
1507 movw r2, #((MIN_LARGE_OBJECT_THRESHOLD - MIRROR_INT_ARRAY_DATA_OFFSET) / 4)
1518 movw r2, #((MIN_LARGE_OBJECT_THRESHOLD - MIRROR_LONG_ARRAY_DATA_OFFSET) / 8)
/art/compiler/utils/x86_64/
Dassembler_x86_64.h405 void movw(CpuRegister dst, const Address& src);
406 void movw(const Address& dst, CpuRegister src);
407 void movw(const Address& dst, const Immediate& imm);
Dassembler_x86_64.cc366 void X86_64Assembler::movw(CpuRegister /*dst*/, const Address& /*src*/) { in movw() function in art::x86_64::X86_64Assembler
371 void X86_64Assembler::movw(const Address& dst, CpuRegister src) { in movw() function in art::x86_64::X86_64Assembler
380 void X86_64Assembler::movw(const Address& dst, const Immediate& imm) { in movw() function in art::x86_64::X86_64Assembler
/art/compiler/optimizing/
Dintrinsics_x86_64.cc1970 __ movw(Address(CpuRegister(RDI), 0), CpuRegister(TMP)); in VisitStringGetCharsNoCheck() local
2069 __ movw(Address(address, 0), in GenPoke() local
2072 __ movw(Address(address, 0), value.AsRegister<CpuRegister>()); in GenPoke() local
Dintrinsics_x86.cc1816 __ movw(Address(EDI, 0), EAX); in VisitStringGetCharsNoCheck() local
1929 __ movw(Address(address, 0), in GenPoke() local
1932 __ movw(Address(address, 0), value_loc.AsRegister<Register>()); in GenPoke() local
Dcode_generator_x86_64.cc4408 __ movw(Address(base, offset), in HandleFieldSet() local
4411 __ movw(Address(base, offset), value.AsRegister<CpuRegister>()); in HandleFieldSet() local
4850 __ movw(address, value.AsRegister<CpuRegister>()); in VisitArraySet() local
4853 __ movw(address, Immediate(CodeGenerator::GetInt16ValueOf(value.GetConstant()))); in VisitArraySet() local
Dcode_generator_arm_vixl.cc9362 __ movw(out, /* placeholder */ 0u); in EmitMovwMovtPlaceholder() local
/art/runtime/interpreter/mterp/out/
Dmterp_x86_64.S2025 movw rINSTw, MIRROR_CHAR_ARRAY_DATA_OFFSET(%rax,%rcx,2)
2054 movw rINSTw, MIRROR_SHORT_ARRAY_DATA_OFFSET(%rax,%rcx,2)
5866 movw rINSTw, (%rcx,%rax,1)
12150 movw %ax, OFF_FP_COUNTDOWN_OFFSET(rFP)