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Searched refs:reg2 (Results 1 – 12 of 12) sorted by relevance

/art/runtime/interpreter/mterp/arm64/
Dheader.S302 .macro SAVE_TWO_REGS reg1, reg2, offset
303 stp \reg1, \reg2, [sp, #(\offset)]
305 .cfi_rel_offset \reg2, (\offset) + 8
311 .macro RESTORE_TWO_REGS reg1, reg2, offset
312 ldp \reg1, \reg2, [sp, #(\offset)]
314 .cfi_restore \reg2
320 .macro SAVE_TWO_REGS_INCREASE_FRAME reg1, reg2, frame_adjustment
321 stp \reg1, \reg2, [sp, #-(\frame_adjustment)]!
324 .cfi_rel_offset \reg2, 8
330 .macro RESTORE_TWO_REGS_DECREASE_FRAME reg1, reg2, frame_adjustment
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/art/compiler/utils/
Dassembler_test.h194 for (auto reg2 : reg2_registers) { variable
198 (assembler_.get()->*f)(*reg1, *reg2, new_imm * multiplier + bias);
208 std::string reg2_string = (this->*GetName2)(*reg2);
249 for (auto reg2 : reg2_registers) { in RepeatTemplatedRegistersImmBits() local
254 (assembler_.get()->*f)(*reg1, *reg2, *reg3, new_imm + bias); in RepeatTemplatedRegistersImmBits()
264 std::string reg2_string = (this->*GetName2)(*reg2); in RepeatTemplatedRegistersImmBits()
311 for (auto reg2 : reg2_registers) { in RepeatTemplatedImmBitsRegisters() local
315 (assembler_.get()->*f)(new_imm, *reg1, *reg2); in RepeatTemplatedImmBitsRegisters()
325 std::string reg2_string = (this->*GetName2)(*reg2); in RepeatTemplatedImmBitsRegisters()
1319 for (auto reg2 : reg2_registers) { in RepeatTemplatedRegisters() local
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/art/runtime/arch/arm64/
Dquick_entrypoints_arm64.S55 .macro SAVE_TWO_REGS reg1, reg2, offset
56 stp \reg1, \reg2, [sp, #(\offset)]
58 .cfi_rel_offset \reg2, (\offset) + 8
61 .macro RESTORE_TWO_REGS reg1, reg2, offset
62 ldp \reg1, \reg2, [sp, #(\offset)]
64 .cfi_restore \reg2
67 .macro SAVE_TWO_REGS_INCREASE_FRAME reg1, reg2, frame_adjustment
68 stp \reg1, \reg2, [sp, #-(\frame_adjustment)]!
71 .cfi_rel_offset \reg2, 8
74 .macro RESTORE_TWO_REGS_DECREASE_FRAME reg1, reg2, frame_adjustment
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/art/compiler/utils/mips/
Dassembler_mips_test.cc481 for (mips::Register* reg2 : regs) { in TEST_F()
484 __ Ins(*reg1, *reg2, pos, size); in TEST_F()
486 instr << "ins $" << *reg1 << ", $" << *reg2 << ", " << pos << ", " << size << "\n"; in TEST_F()
500 for (mips::Register* reg2 : regs) { in TEST_F()
503 __ Ext(*reg1, *reg2, pos, size); in TEST_F()
505 instr << "ext $" << *reg1 << ", $" << *reg2 << ", " << pos << ", " << size << "\n"; in TEST_F()
/art/runtime/arch/mips/
Dquick_entrypoints_mips.S915 .macro LOAD_LONG_TO_REG reg1, reg2, next_arg, index_reg, next_index, label
917 lw $\reg2, -4($\next_arg)
932 .macro LOAD_DOUBLE_TO_REG reg1, reg2, next_arg, index_reg, tmp, label
934 LDu $\reg1, $\reg2, -8, $\next_arg, $\tmp # next_arg points to argument after the current one
942 .macro LOAD_DOUBLE_TO_REG reg1, reg2, next_arg, index_reg, tmp, label
943 LDu $\reg1, $\reg2, -8, $\next_arg, $\tmp # next_arg points to argument after the current one
/art/runtime/interpreter/mterp/out/
Dmterp_arm64.S309 .macro SAVE_TWO_REGS reg1, reg2, offset
310 stp \reg1, \reg2, [sp, #(\offset)]
312 .cfi_rel_offset \reg2, (\offset) + 8
318 .macro RESTORE_TWO_REGS reg1, reg2, offset
319 ldp \reg1, \reg2, [sp, #(\offset)]
321 .cfi_restore \reg2
327 .macro SAVE_TWO_REGS_INCREASE_FRAME reg1, reg2, frame_adjustment
328 stp \reg1, \reg2, [sp, #-(\frame_adjustment)]!
331 .cfi_rel_offset \reg2, 8
337 .macro RESTORE_TWO_REGS_DECREASE_FRAME reg1, reg2, frame_adjustment
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/art/compiler/optimizing/
Dcode_generator_x86_64.h142 void Exchange64(CpuRegister reg1, CpuRegister reg2);
Dcode_generator_x86_64.cc5333 void ParallelMoveResolverX86_64::Exchange64(CpuRegister reg1, CpuRegister reg2) { in Exchange64() argument
5335 __ movq(reg1, reg2); in Exchange64()
5336 __ movq(reg2, CpuRegister(TMP)); in Exchange64()
Dcode_generator_arm_vixl.cc4651 vixl32::Register reg2 = RegisterFrom(second); in VisitRem() local
4656 __ Sdiv(temp, reg1, reg2); in VisitRem()
4657 __ Mls(out_reg, temp, reg2, reg1); in VisitRem()
/art/compiler/utils/x86_64/
Dassembler_x86_64.h660 void testl(CpuRegister reg1, CpuRegister reg2);
664 void testq(CpuRegister reg1, CpuRegister reg2);
Dassembler_x86_64.cc2294 void X86_64Assembler::testl(CpuRegister reg1, CpuRegister reg2) { in testl() argument
2296 EmitOptionalRex32(reg1, reg2); in testl()
2298 EmitRegisterOperand(reg1.LowBits(), reg2.LowBits()); in testl()
2336 void X86_64Assembler::testq(CpuRegister reg1, CpuRegister reg2) { in testq() argument
2338 EmitRex64(reg1, reg2); in testq()
2340 EmitRegisterOperand(reg1.LowBits(), reg2.LowBits()); in testq()
/art/compiler/utils/x86/
Dassembler_x86.h612 void testl(Register reg1, Register reg2);