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Searched refs:shr (Results 1 – 16 of 16) sorted by relevance

/art/runtime/interpreter/mterp/x86/
Dbindiv.S37 shr $$8, %edx
/art/compiler/optimizing/
Dinduction_var_analysis_test.cc643 HInstruction* shr = InsertInstruction( in TEST_F() local
645 k_header->AddInput(shr); in TEST_F()
650 EXPECT_STREQ("", GetInductionInfo(shr, 0).c_str()); in TEST_F()
663 HInstruction* shr = InsertInstruction( in TEST_F() local
665 k_header->AddInput(shr); in TEST_F()
669 EXPECT_STREQ("", GetInductionInfo(shr, 0).c_str()); in TEST_F()
Dbounds_check_elimination.cc1122 void VisitShr(HShr* shr) OVERRIDE { in VisitShr() argument
1123 FindAndHandlePartialArrayLength(shr); in VisitShr()
Dcode_generator_arm64.cc5516 void LocationsBuilderARM64::VisitShr(HShr* shr) { in VisitShr() argument
5517 HandleShift(shr); in VisitShr()
5520 void InstructionCodeGeneratorARM64::VisitShr(HShr* shr) { in VisitShr() argument
5521 HandleShift(shr); in VisitShr()
Dcode_generator_mips64.cc6719 void LocationsBuilderMIPS64::VisitShr(HShr* shr) { in VisitShr() argument
6720 HandleShift(shr); in VisitShr()
6723 void InstructionCodeGeneratorMIPS64::VisitShr(HShr* shr) { in VisitShr() argument
6724 HandleShift(shr); in VisitShr()
Dcode_generator_x86_64.cc4013 void LocationsBuilderX86_64::VisitShr(HShr* shr) { in VisitShr() argument
4014 HandleShift(shr); in VisitShr()
4017 void InstructionCodeGeneratorX86_64::VisitShr(HShr* shr) { in VisitShr() argument
4018 HandleShift(shr); in VisitShr()
Dcode_generator_x86.cc4167 void LocationsBuilderX86::VisitShr(HShr* shr) { in VisitShr() argument
4168 HandleShift(shr); in VisitShr()
4171 void InstructionCodeGeneratorX86::VisitShr(HShr* shr) { in VisitShr() argument
4172 HandleShift(shr); in VisitShr()
Dcode_generator_arm_vixl.cc5098 void LocationsBuilderARMVIXL::VisitShr(HShr* shr) { in VisitShr() argument
5099 HandleShift(shr); in VisitShr()
5102 void InstructionCodeGeneratorARMVIXL::VisitShr(HShr* shr) { in VisitShr() argument
5103 HandleShift(shr); in VisitShr()
Dcode_generator_mips.cc8833 void LocationsBuilderMIPS::VisitShr(HShr* shr) { in VisitShr() argument
8834 HandleShift(shr); in VisitShr()
8837 void InstructionCodeGeneratorMIPS::VisitShr(HShr* shr) { in VisitShr() argument
8838 HandleShift(shr); in VisitShr()
/art/test/dexdump/
Dall.txt167 0004c4: 9900 0102 |0012: shr-int v0, v1, v2
178 0004f0: a400 0102 |0028: shr-long v0, v1, v2
214 000546: b910 |0009: shr-int/2addr v0, v1
225 00055c: c410 |0014: shr-long/2addr v0, v1
284 0005e0: e100 0112 |0012: shr-int/lit8 v0, v1, #int 18 // #12
Dbytecodes.txt1425 00153a: b982 |0011: shr-int/2addr v2, v8
1493 0015d8: e10d 0d03 |0002: shr-int/lit8 v13, v13, #int 3 // #03
1496 0015e2: b9ed |0007: shr-int/2addr v13, v14
1506 001606: 9907 0e09 |0019: shr-int v7, v14, v9
1609 0016ac: a41c 1c16 |0006: shr-long v28, v28, v22
1619 0016d0: a41c 1c16 |0018: shr-long v28, v28, v22
1639 00171a: a410 1e16 |003d: shr-long v16, v30, v22
Dcheckers.txt1153 0020c0: e100 0802 |0022: shr-int/lit8 v0, v8, #int 2 // #02
/art/runtime/arch/x86_64/
Dmemcmp16_x86_64.S310 shr $1, %r8
626 shr $1, %r8
1151 shr $32, %rcx
1152 shr $32, %rax
1156 shr $16, %ecx
1157 shr $16, %eax
/art/test/543-checker-dce-trycatch/smali/
DTestCase.smali242 shr-int/2addr p2, p3
308 shr-int/2addr p2, p3
/art/runtime/arch/x86/
Dquick_entrypoints_x86.S1185 shr MACRO_LITERAL(PRIMITIVE_TYPE_SIZE_SHIFT_SHIFT), %ecx // Get component size shift.
1705 shr %cl,%edx
/art/runtime/interpreter/mterp/out/
Dmterp_x86.S4030 shr $8, %edx
4084 shr $8, %edx