| /art/compiler/optimizing/ |
| D | intrinsics_arm_vixl.cc | 529 vixl32::Register temp2 = RegisterFrom(invoke->GetLocations()->GetTemp(0)); in GenMinMaxFloat() local
553 __ Vmov(temp2, op2); in GenMinMaxFloat()
555 __ Orr(temp1, temp1, temp2); in GenMinMaxFloat()
557 __ And(temp1, temp1, temp2); in GenMinMaxFloat()
808 vixl32::SRegister temp2 = HighSRegisterFrom(invoke->GetLocations()->GetTemp(0)); in VisitMathRoundFloat() local
824 __ Vmov(temp2, 0.5); in VisitMathRoundFloat()
826 __ Vcmp(F32, temp1, temp2); in VisitMathRoundFloat()
1482 const vixl32::Register temp2 = RegisterFrom(locations->GetTemp(2)); in VisitStringCompareTo() local
1513 __ Ldr(temp2, MemOperand(arg, count_offset)); in VisitStringCompareTo()
1516 __ Lsr(temp1, temp2, 1u); in VisitStringCompareTo()
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| D | intrinsics_arm64.cc | 1320 Register temp2 = WRegisterFrom(locations->GetTemp(2)); in VisitStringCompareTo() local
1354 __ Ldr(temp2, HeapOperand(arg, count_offset)); in VisitStringCompareTo()
1357 __ Lsr(temp1, temp2, 1u); in VisitStringCompareTo()
1372 __ Eor(temp2, temp2, Operand(temp3)); in VisitStringCompareTo()
1376 __ Tbnz(temp2, 0, &different_compression); // Does not use flags. in VisitStringCompareTo()
1397 temp2 = temp2.X(); in VisitStringCompareTo()
1402 __ Ldr(temp2, MemOperand(arg.X(), temp1.X())); in VisitStringCompareTo()
1403 __ Cmp(temp4, temp2); in VisitStringCompareTo()
1417 __ Eor(temp1, temp2, temp4); in VisitStringCompareTo()
1437 __ Lsr(temp2, temp2, temp1); in VisitStringCompareTo()
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| D | intrinsics_x86.cc | 110 Register temp2 = locations->GetTemp(1).AsRegister<Register>(); in EmitNativeCode() local
132 __ movl(temp2, Address(src, temp1, ScaleFactor::TIMES_4, adjusted_offset)); in EmitNativeCode()
134 __ leal(temp2, Address(src_pos.AsRegister<Register>(), temp1, ScaleFactor::TIMES_1, 0)); in EmitNativeCode()
135 __ movl(temp2, Address(src, temp2, ScaleFactor::TIMES_4, offset)); in EmitNativeCode()
137 __ MaybeUnpoisonHeapReference(temp2); in EmitNativeCode()
145 DCHECK_NE(temp2, ESP); in EmitNativeCode()
146 DCHECK(0 <= temp2 && temp2 < kNumberOfCpuRegisters) << temp2; in EmitNativeCode()
147 int32_t entry_point_offset = Thread::ReadBarrierMarkEntryPointsOffset<kX86PointerSize>(temp2); in EmitNativeCode()
150 __ MaybePoisonHeapReference(temp2); in EmitNativeCode()
155 __ movl(Address(dest, temp1, ScaleFactor::TIMES_4, adjusted_offset), temp2); in EmitNativeCode()
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| D | intrinsics_x86_64.cc | 1181 CpuRegister temp2 = temp2_loc.AsRegister<CpuRegister>(); in VisitSystemArrayCopy() local
1296 __ movl(temp2, Address(src, class_offset)); in VisitSystemArrayCopy()
1302 __ MaybeUnpoisonHeapReference(temp2); in VisitSystemArrayCopy()
1335 invoke, TMP_loc, temp2, component_offset, /* needs_null_check */ false); in VisitSystemArrayCopy()
1342 __ movl(CpuRegister(TMP), Address(temp2, component_offset)); in VisitSystemArrayCopy()
1351 __ cmpl(temp1, temp2); in VisitSystemArrayCopy()
1414 GetAssembler(), type, src, src_pos, dest, dest_pos, length, temp1, temp2, temp3); in VisitSystemArrayCopy()
1472 __ movl(Address(temp2, 0), CpuRegister(TMP)); in VisitSystemArrayCopy()
1474 __ addl(temp2, Immediate(element_size)); in VisitSystemArrayCopy()
1490 __ movl(Address(temp2, 0), CpuRegister(TMP)); in VisitSystemArrayCopy()
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| D | intrinsics_mips.cc | 2093 Register temp2 = locations->GetTemp(1).AsRegister<Register>(); in VisitStringEquals() local
2132 __ Lw(temp2, arg, class_offset); in VisitStringEquals()
2133 __ Bne(temp1, temp2, &return_false); in VisitStringEquals()
2138 __ Lw(temp2, arg, count_offset); in VisitStringEquals()
2141 __ Bne(temp1, temp2, &return_false); in VisitStringEquals()
2159 __ Ext(temp2, temp1, 0, 1); in VisitStringEquals()
2161 __ Sll(temp2, temp1, 31); in VisitStringEquals()
2162 __ Srl(temp2, temp2, 31); in VisitStringEquals()
2165 __ Sllv(temp1, temp1, temp2); // Double the byte count if uncompressed. in VisitStringEquals()
2172 __ Lw(temp2, temp3, value_offset); in VisitStringEquals()
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| D | intrinsics_mips64.cc | 1668 GpuRegister temp2 = locations->GetTemp(1).AsRegister<GpuRegister>(); in VisitStringEquals() local
1708 __ Lw(temp2, arg, class_offset); in VisitStringEquals()
1709 __ Bnec(temp1, temp2, &return_false); in VisitStringEquals()
1714 __ Lw(temp2, arg, count_offset); in VisitStringEquals()
1717 __ Bnec(temp1, temp2, &return_false); in VisitStringEquals()
1733 __ Dext(temp2, temp1, 0, 1); // Extract compression flag. in VisitStringEquals()
1735 __ Sllv(temp1, temp1, temp2); // Double the byte count if uncompressed. in VisitStringEquals()
1742 __ Ld(temp2, temp3, value_offset); in VisitStringEquals()
1743 __ Bnec(out, temp2, &return_false); in VisitStringEquals()
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| D | code_generator_arm_vixl.h | 340 vixl::aarch32::Register temp2,
656 vixl::aarch32::Register temp2);
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| D | code_generator_arm_vixl.cc | 1024 vixl32::Register temp2, in LoadReferenceWithBakerReadBarrierAndUpdateFieldSlowPathARMVIXL() argument
1033 temp2_(temp2) { in LoadReferenceWithBakerReadBarrierAndUpdateFieldSlowPathARMVIXL()
4396 vixl32::Register temp2 = RegisterFrom(locations->GetTemp(1)); in GenerateDivRemWithAnyConstant() local
4405 __ Smull(temp2, temp1, dividend, temp1); in GenerateDivRemWithAnyConstant()
4422 __ Mov(temp2, imm); in GenerateDivRemWithAnyConstant()
4423 __ Mls(out, temp1, temp2, dividend); in GenerateDivRemWithAnyConstant()
5375 vixl32::Register temp2, in GenerateWideAtomicStore() argument
5392 __ ldrexd(temp1, temp2, MemOperand(addr)); in GenerateWideAtomicStore()
6397 vixl32::Register temp2 = RegisterFrom(temp2_loc); in VisitArraySet() local
6451 GetAssembler()->LoadFromOffset(kLoadWord, temp2, value, class_offset); in VisitArraySet()
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| D | code_generator_arm64.cc | 2995 Register temp2 = temps.AcquireSameSizeAs(array); in VisitArraySet() local
3008 __ Ldr(temp2, HeapOperand(Register(value), class_offset)); in VisitArraySet()
3011 __ Cmp(temp, temp2); in VisitArraySet()
3012 temps.Release(temp2); in VisitArraySet()
3033 Register temp2 = temps.AcquireSameSizeAs(array); in VisitArraySet() local
3035 __ Mov(temp2, value.W()); in VisitArraySet()
3036 GetAssembler()->PoisonHeapReference(temp2); in VisitArraySet()
3037 source = temp2; in VisitArraySet()
3523 Register temp2 = temps.AcquireX(); in HandleGoto() local
3525 __ Ldrh(temp2, MemOperand(temp1, ArtMethod::HotnessCountOffset().Int32Value())); in HandleGoto()
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| D | code_generator_x86_64.h | 474 CpuRegister* temp2 = nullptr);
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| D | code_generator_x86_64.cc | 556 CpuRegister temp2) in ReadBarrierMarkAndUpdateFieldSlowPathX86_64() argument
563 temp2_(temp2) { in ReadBarrierMarkAndUpdateFieldSlowPathX86_64()
6631 CpuRegister* temp2) { in GenerateReferenceLoadWithBakerReadBarrier() argument
6690 DCHECK(temp2 != nullptr); in GenerateReferenceLoadWithBakerReadBarrier()
6692 instruction, ref, obj, src, /* unpoison_ref_before_marking */ true, *temp1, *temp2); in GenerateReferenceLoadWithBakerReadBarrier()
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| D | code_generator_mips64.cc | 2571 GpuRegister temp2 = TMP; // Doesn't need to survive slow path. in VisitArraySet() local
2610 __ LoadFromOffset(kLoadUnsignedWord, temp2, value, class_offset); in VisitArraySet()
2616 __ Beqc(temp1, temp2, &do_put); in VisitArraySet()
2628 __ Bnec(temp1, temp2, slow_path->GetEntryLabel()); in VisitArraySet()
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| D | code_generator_mips.cc | 2990 Register temp2 = TMP; // Doesn't need to survive slow path. in VisitArraySet() local
3031 __ LoadFromOffset(kLoadWord, temp2, value, class_offset); in VisitArraySet()
3037 __ Beq(temp1, temp2, &do_put); in VisitArraySet()
3049 __ Bne(temp1, temp2, slow_path->GetEntryLabel()); in VisitArraySet()
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| D | code_generator_x86.cc | 4981 XmmRegister temp2 = locations->GetTemp(1).AsFpuRegister<XmmRegister>(); in HandleFieldSet() local
4983 __ movd(temp2, value.AsRegisterPairHigh<Register>()); in HandleFieldSet()
4984 __ punpckldq(temp1, temp2); in HandleFieldSet()
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| /art/runtime/ |
| D | common_dex_operations.h | 209 std::string temp1, temp2, temp3; in DoFieldPutCommon() local
213 field_class->GetDescriptor(&temp2), in DoFieldPutCommon()
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| D | class_linker_test.cc | 279 std::string temp2; in AssertClass() local
281 klass->GetDescriptor(&temp2))); in AssertClass()
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| /art/test/458-checker-instruct-simplification/src/ |
| D | Main.java | 731 int temp2 = -arg2; in $noinline$AddNegs2() local
732 return (temp1 + temp2) | (temp1 + temp2); in $noinline$AddNegs2()
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| /art/runtime/mirror/ |
| D | class.cc | 435 std::string temp1, temp2; in IsInSamePackage() local
436 return IsInSamePackage(klass1->GetDescriptor(&temp1), klass2->GetDescriptor(&temp2)); in IsInSamePackage()
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| /art/runtime/interpreter/ |
| D | interpreter_common.cc | 1344 std::string temp1, temp2; in DoCallCommon() local
1349 arg_type->GetDescriptor(&temp2)); in DoCallCommon()
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| D | interpreter_switch_impl.cc | 416 std::string temp1, temp2; in ExecuteSwitchImplCpp() local
420 return_type->GetDescriptor(&temp2)); in ExecuteSwitchImplCpp()
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