/external/pcre/dist2/src/sljit/ |
D | sljitNativePPC_common.c | 133 #define HI(opcode) ((opcode) << 26) macro 136 #define ADD (HI(31) | LO(266)) 137 #define ADDC (HI(31) | LO(10)) 138 #define ADDE (HI(31) | LO(138)) 139 #define ADDI (HI(14)) 140 #define ADDIC (HI(13)) 141 #define ADDIS (HI(15)) 142 #define ADDME (HI(31) | LO(234)) 143 #define AND (HI(31) | LO(28)) 144 #define ANDI (HI(28)) [all …]
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D | sljitNativeMIPS_common.c | 93 #define HI(opcode) ((opcode) << 26) macro 98 #define ABS_S (HI(17) | FMT_S | LO(5)) 99 #define ADD_S (HI(17) | FMT_S | LO(0)) 100 #define ADDIU (HI(9)) 101 #define ADDU (HI(0) | LO(33)) 102 #define AND (HI(0) | LO(36)) 103 #define ANDI (HI(12)) 104 #define B (HI(4)) 105 #define BAL (HI(1) | (17 << 16)) 106 #define BC1F (HI(17) | (8 << 21)) [all …]
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/external/llvm/test/CodeGen/AArch64/ |
D | nontemporal.ll | 16 ; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 17 ; CHECK-NEXT: stnp d0, d[[HI]], [x0] 25 ; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 26 ; CHECK-NEXT: stnp d0, d[[HI]], [x0] 34 ; CHECK-NEXT: mov d[[HI:[0-9]+]], v0[1] 35 ; CHECK-NEXT: stnp d0, d[[HI]], [x0] 43 ; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1] 44 ; CHECK-NEXT: stnp s0, s[[HI]], [x0] 52 ; CHECK-NEXT: mov s[[HI:[0-9]+]], v0[1] 53 ; CHECK-NEXT: stnp s0, s[[HI]], [x0] [all …]
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D | basic-pic.ll | 32 ; CHECK: adrp x[[HI:[0-9]+]], hiddenvar 33 ; CHECK: ldr w0, [x[[HI]], {{#?}}:lo12:hiddenvar] 42 ; CHECK: adrp [[HI:x[0-9]+]], hiddenvar 43 ; CHECK: add x0, [[HI]], {{#?}}:lo12:hiddenvar
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D | arm64-basic-pic.ll | 32 ; CHECK: adrp x[[HI:[0-9]+]], hiddenvar 33 ; CHECK: ldr w0, [x[[HI]], :lo12:hiddenvar] 42 ; CHECK: adrp [[HI:x[0-9]+]], hiddenvar 43 ; CHECK: add x0, [[HI]], :lo12:hiddenvar
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/external/llvm/lib/CodeGen/AsmPrinter/ |
D | DwarfAccelTable.cpp | 166 for (HashList::const_iterator HI = Buckets[i].begin(), in EmitHashes() local 168 HI != HE; ++HI) { in EmitHashes() 169 uint32_t HashValue = (*HI)->HashValue; in EmitHashes() 186 for (HashList::const_iterator HI = Buckets[i].begin(), in emitOffsets() local 188 HI != HE; ++HI) { in emitOffsets() 189 uint32_t HashValue = (*HI)->HashValue; in emitOffsets() 196 MCSymbolRefExpr::create((*HI)->Sym, Context), in emitOffsets() 209 for (HashList::const_iterator HI = Buckets[i].begin(), in EmitData() local 211 HI != HE; ++HI) { in EmitData() 214 if (PrevHash != UINT64_MAX && PrevHash != (*HI)->HashValue) in EmitData() [all …]
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/external/valgrind/none/tests/mips64/ |
D | arithmetic_instruction.stdout.exp-mips64 | 8961 ddiv $t0, $t1 :: rs 0x0, rt 0xffffffffb1f740b4, HI 0x0, LO 0x0 8962 ddiv $v0, $v1 :: rs 0x12bd6aa, rt 0xa2a6ec661ba84121, HI 0x12bd6aa, LO 0x0 8963 ddiv $t0, $t1 :: rs 0x0, rt 0xffffffffb5365d03, HI 0x0, LO 0x0 8964 ddiv $v0, $v1 :: rs 0x7e876382d2ab13, rt 0x614d9b445f12236b, HI 0x7e876382d2ab13, LO 0x0 8965 ddiv $t0, $t1 :: rs 0x9823b6e, rt 0xffffffffb8757bda, HI 0x9823b6e, LO 0x0 8966 ddiv $v0, $v1 :: rs 0x976d6e9ac31510f3, rt 0x3baa99471f6d4d75, HI 0xd31807e1e2825e68, LO 0xffffffff… 8967 ddiv $t0, $t1 :: rs 0xd4326d9, rt 0xffffffffbcb4666d, HI 0xd4326d9, LO 0x0 8968 ddiv $v0, $v1 :: rs 0xb7746d775ad6a5fb, rt 0x680cce5fb236b666, HI 0xb7746d775ad6a5fb, LO 0x0 8969 ddiv $t0, $t1 :: rs 0x130476dc, rt 0xffffffffa2f33668, HI 0x130476dc, LO 0x0 8970 ddiv $v0, $v1 :: rs 0x42b0c0a28677b502, rt 0x58ec644d6481af17, HI 0x42b0c0a28677b502, LO 0x0 [all …]
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D | arithmetic_instruction.stdout.exp-mips64r2 | 8961 ddiv $t0, $t1 :: rs 0x0, rt 0xffffffffb1f740b4, HI 0x0, LO 0x0 8962 ddiv $v0, $v1 :: rs 0x12bd6aa, rt 0xa2a6ec661ba84121, HI 0x12bd6aa, LO 0x0 8963 ddiv $t0, $t1 :: rs 0x0, rt 0xffffffffb5365d03, HI 0x0, LO 0x0 8964 ddiv $v0, $v1 :: rs 0x7e876382d2ab13, rt 0x614d9b445f12236b, HI 0x7e876382d2ab13, LO 0x0 8965 ddiv $t0, $t1 :: rs 0x9823b6e, rt 0xffffffffb8757bda, HI 0x9823b6e, LO 0x0 8966 ddiv $v0, $v1 :: rs 0x976d6e9ac31510f3, rt 0x3baa99471f6d4d75, HI 0xd31807e1e2825e68, LO 0xffffffff… 8967 ddiv $t0, $t1 :: rs 0xd4326d9, rt 0xffffffffbcb4666d, HI 0xd4326d9, LO 0x0 8968 ddiv $v0, $v1 :: rs 0xb7746d775ad6a5fb, rt 0x680cce5fb236b666, HI 0xb7746d775ad6a5fb, LO 0x0 8969 ddiv $t0, $t1 :: rs 0x130476dc, rt 0xffffffffa2f33668, HI 0x130476dc, LO 0x0 8970 ddiv $v0, $v1 :: rs 0x42b0c0a28677b502, rt 0x58ec644d6481af17, HI 0x42b0c0a28677b502, LO 0x0 [all …]
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D | macro_int.h | 53 unsigned long long HI; \ 63 : "=r" (HI), "=r" (LO) \ 68 instruction, (long long) RSval, (long long) RTval, HI, LO); \ 73 unsigned long long HI; \ 83 : "=r" (HI), "=r" (LO) \ 88 instruction, (long long) RSval, (long long) RTval, HI, LO); \
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/external/llvm/test/CodeGen/AMDGPU/ |
D | fcanonicalize.ll | 190 ; GCN: v_mov_b32_e32 v[[HI:[0-9]+]], v[[LO]]{{$}} 191 ; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} 200 ; GCN-DAG: v_bfrev_b32_e32 v[[HI:[0-9]+]], 1{{$}} 201 ; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} 210 ; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0x3ff00000{{$}} 211 ; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} 220 ; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0xbff00000{{$}} 221 ; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} 230 ; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0x40300000{{$}} 231 ; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} [all …]
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D | zext-i64-bit-operand.ll | 4 ; GCN: buffer_load_dwordx2 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}} 7 ; GCN-NOT: v[[HI]] 11 ; GCN-NOT: v[[HI]] 13 ; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} 24 ; GCN: buffer_load_dwordx2 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}} 27 ; GCN-NOT: v[[HI]] 30 ; GCN-NOT: v[[HI]] 33 ; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
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D | fract.f64.ll | 12 ; SI-DAG: v_fract_f64_e32 [[FRC:v\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]] 16 ; SI-DAG: v_cmp_class_f64_e64 [[COND:s\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO]]:[[HI]]], 3 18 ; SI: v_cndmask_b32_e64 v[[RESHI:[0-9]+]], v[[MINHI]], v[[HI]], [[COND]] 19 ; SI: v_add_f64 [[SUB0:v\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO]]:[[HI]]{{\]}}, -v{{\[}}[[RESLO]]:[[RESHI]… 20 ; SI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO]]:[[HI]]{{\]}}, -[[SUB0]] 39 ; SI-DAG: v_fract_f64_e64 [[FRC:v\[[0-9]+:[0-9]+\]]], -v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]] 43 ; SI-DAG: v_cmp_class_f64_e64 [[COND:s\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO]]:[[HI]]], 3 45 ; SI: v_cndmask_b32_e64 v[[RESHI:[0-9]+]], v[[MINHI]], v[[HI]], [[COND]] 46 ; SI: v_add_f64 [[SUB0:v\[[0-9]+:[0-9]+\]]], -v{{\[}}[[LO]]:[[HI]]{{\]}}, -v{{\[}}[[RESLO]]:[[RESHI… 47 ; SI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -v{{\[}}[[LO]]:[[HI]]{{\]}}, -[[SUB0]] [all …]
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D | shift-i64-opts.ll | 9 ; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0{{$}} 10 ; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} 21 ; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0{{$}} 22 ; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} 33 ; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0{{$}} 34 ; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} 44 ; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], 0{{$}} 45 ; GCN: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} 57 ; GCN: buffer_load_dwordx2 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}} 58 ; GCN: v_bfe_u32 v[[BFE:[0-9]+]], v[[HI]], 8, 23 [all …]
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D | addrspacecast.ll | 15 ; HSA-DAG: v_cndmask_b32_e32 v[[HI:[0-9]+]], 0, [[VAPERTURE]] 19 ; HSA: flat_store_dword v{{\[}}[[LO]]:[[HI]]{{\]}}, [[K]] 38 ; HSA-DAG: v_cndmask_b32_e32 v[[HI:[0-9]+]], 0, [[VAPERTURE]] 42 ; HSA: flat_store_dword v{{\[}}[[LO]]:[[HI]]{{\]}}, [[K]] 137 ; HSA-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], [[APERTURE]] 140 ; HSA: flat_store_dword v{{\[}}[[LO]]:[[HI]]{{\]}}, v[[K]] 160 ; HSA: v_mov_b32_e32 v[[HI:[0-9]+]], 0{{$}} 161 ; HSA: flat_store_dword v{{\[}}[[LO]]:[[HI]]{{\]}}, v[[K]] 180 ; HSA-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], [[APERTURE]] 183 ; HSA: flat_store_dword v{{\[}}[[LO]]:[[HI]]{{\]}}, v[[K]]
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/external/valgrind/none/tests/mips32/ |
D | MIPS32int.stdout.exp-mips32-BE | 99 div $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003 100 div $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001 101 div $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff 102 div $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000000 LO 0xffffffff 103 div $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000 105 divu $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003 106 divu $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001 107 divu $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff 108 divu $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000001 LO 0x00000000 109 divu $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000 [all …]
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D | MIPS32int.stdout.exp-mips32-LE | 99 div $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003 100 div $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001 101 div $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff 102 div $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000000 LO 0xffffffff 103 div $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000 105 divu $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003 106 divu $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001 107 divu $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff 108 divu $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000001 LO 0x00000000 109 divu $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000 [all …]
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D | MIPS32int.stdout.exp-mips32r2-LE | 99 div $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003 100 div $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001 101 div $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff 102 div $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000000 LO 0xffffffff 103 div $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000 105 divu $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003 106 divu $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001 107 divu $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff 108 divu $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000001 LO 0x00000000 109 divu $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000 [all …]
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D | MIPS32int.stdout.exp-mips32r2-BE | 99 div $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003 100 div $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001 101 div $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff 102 div $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000000 LO 0xffffffff 103 div $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000 105 divu $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003 106 divu $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001 107 divu $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff 108 divu $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000001 LO 0x00000000 109 divu $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000 [all …]
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/external/llvm/test/CodeGen/PowerPC/ |
D | fp128-bitcast-after-operation.ll | 16 ; PPC64-DAG: ld [[HI:[0-9]+]], [[OFFSET_LO]]([[SP]]) 18 ; PPC64: and [[FLIP_BIT:[0-9]+]], [[HI]], [[MASK_REG]] 19 ; PPC64-DAG: xor 3, [[HI]], [[FLIP_BIT]] 25 ; PPC64-P8-DAG: mfvsrd [[HI:[0-9]+]], 1 28 ; PPC64-P8: and [[FLIP_BIT:[0-9]+]], [[HI]], [[SHIFT_REG]] 29 ; PPC64-P8-DAG: xor 3, [[HI]], [[FLIP_BIT]] 58 ; PPC64-DAG: ld [[HI:[0-9]+]], [[OFFSET_LO]]([[SP]]) 61 ; PPC64-DAG: xor 3, [[HI]], [[FLIP_BIT]] 67 ; PPC64-P8-DAG: mfvsrd [[HI:[0-9]+]], 1 71 ; PPC64-P8-DAG: xor 3, [[HI]], [[FLIP_BIT]] [all …]
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/external/curl/tests/libtest/ |
D | lib1521.c | 33 #define HI LONG_MAX macro 158 res = curl_easy_setopt(curl, CURLOPT_PORT, HI); in test() 220 res = curl_easy_setopt(curl, CURLOPT_TIMEOUT, HI); in test() 232 res = curl_easy_setopt(curl, CURLOPT_INFILESIZE, HI); in test() 269 res = curl_easy_setopt(curl, CURLOPT_LOW_SPEED_LIMIT, HI); in test() 281 res = curl_easy_setopt(curl, CURLOPT_LOW_SPEED_TIME, HI); in test() 293 res = curl_easy_setopt(curl, CURLOPT_RESUME_FROM, HI); in test() 335 res = curl_easy_setopt(curl, CURLOPT_CRLF, HI); in test() 365 res = curl_easy_setopt(curl, CURLOPT_SSLVERSION, HI); in test() 377 res = curl_easy_setopt(curl, CURLOPT_TIMECONDITION, HI); in test() [all …]
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/external/pdfium/core/fxcodec/jbig2/ |
D | JBig2_TrdProc.cpp | 167 uint32_t HI = IBI->height(); in decode_Huffman() local 173 CURS += HI - 1; in decode_Huffman() 188 SBREG->composeFrom(SI, TI - HI + 1, IBI.Get(), SBCOMBOP); in decode_Huffman() 191 SBREG->composeFrom(SI - WI + 1, TI - HI + 1, IBI.Get(), SBCOMBOP); in decode_Huffman() 203 SBREG->composeFrom(TI, SI - HI + 1, IBI.Get(), SBCOMBOP); in decode_Huffman() 206 SBREG->composeFrom(TI - WI + 1, SI - HI + 1, IBI.Get(), SBCOMBOP); in decode_Huffman() 215 CURS += HI - 1; in decode_Huffman() 360 uint32_t HI = pIBI->height(); in decode_Arith() local 366 CURS += HI - 1; in decode_Arith() 381 SBREG->composeFrom(SI, TI - HI + 1, pIBI.Get(), SBCOMBOP); in decode_Arith() [all …]
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/external/icu/icu4c/source/data/translit/ |
D | blt_blt_FONIPA.txt | 39 $HI = [ꪁ ꪃ ꪅ ꪇ ꪉ ꪋ ꪍ ꪏ ꪑ ꪓ ꪕ ꪗ ꪙ ꪛ ꪝ ꪟ ꪡ ꪣ ꪥ ꪧ ꪩ ꪫ ꪭ ꪯ]; 40 $C = [$LO $HI]; 62 $HI $W? $V12 {($CHK)} → $1 ˦; # Tone class 5: High-mid tone 63 $HI $W? {($V3 $CHK)} → $1 ˦; # Tone class 5: High-mid tone 69 $HI $W? { \uAABF ($V3 $F?)} → $1 ˦; # Tone class 5: High-mid tone 70 $HI $W? { \uAAC1 ($V3 $F?)} → $1 ˧˩; # Tone class 6: Mid-falling tone 76 $HI $W? $V12 { \uAABF ($F?)} → $1 ˦; # Tone class 5: High-mid tone 77 $HI $W? $V12 { \uAAC1 ($F?)} → $1 ˧˩; # Tone class 6: Mid-falling tone 80 {($HI $W? $V123 $F?)} $NOT_IPA_TONE → $1 ˥; # Tone class 4: High tone.
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/external/python/cpython3/Modules/_ctypes/libffi/src/nios2/ |
D | ffi.c | 280 #define HI(x) ((((unsigned int) (x)) >> 16) & 0xffff) in ffi_prep_closure_loc() macro 282 tramp[0] = (0 << 27) | (8 << 22) | (HI (ffi_closure_sysv) << 6) | 0x34; in ffi_prep_closure_loc() 284 tramp[2] = (0 << 27) | (9 << 22) | (HI (ffi_closure_helper) << 6) | 0x34; in ffi_prep_closure_loc() 286 tramp[4] = (0 << 27) | (10 << 22) | (HI (closure) << 6) | 0x34; in ffi_prep_closure_loc() 289 #undef HI in ffi_prep_closure_loc()
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/external/python/cpython2/Modules/_ctypes/libffi/src/nios2/ |
D | ffi.c | 280 #define HI(x) ((((unsigned int) (x)) >> 16) & 0xffff) in ffi_prep_closure_loc() macro 282 tramp[0] = (0 << 27) | (8 << 22) | (HI (ffi_closure_sysv) << 6) | 0x34; in ffi_prep_closure_loc() 284 tramp[2] = (0 << 27) | (9 << 22) | (HI (ffi_closure_helper) << 6) | 0x34; in ffi_prep_closure_loc() 286 tramp[4] = (0 << 27) | (10 << 22) | (HI (closure) << 6) | 0x34; in ffi_prep_closure_loc() 289 #undef HI in ffi_prep_closure_loc()
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/external/libffi/src/nios2/ |
D | ffi.c | 280 #define HI(x) ((((unsigned int) (x)) >> 16) & 0xffff) in ffi_prep_closure_loc() macro 282 tramp[0] = (0 << 27) | (8 << 22) | (HI (ffi_closure_sysv) << 6) | 0x34; in ffi_prep_closure_loc() 284 tramp[2] = (0 << 27) | (9 << 22) | (HI (ffi_closure_helper) << 6) | 0x34; in ffi_prep_closure_loc() 286 tramp[4] = (0 << 27) | (10 << 22) | (HI (closure) << 6) | 0x34; in ffi_prep_closure_loc() 289 #undef HI in ffi_prep_closure_loc()
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