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Searched refs:HRcInt32 (Results 1 – 14 of 14) sorted by relevance

/external/valgrind/VEX/priv/
Dhost_arm_defs.h43 ST_IN HReg hregARM_R4 ( void ) { return mkHReg(False, HRcInt32, 4, 0); } in hregARM_R4()
44 ST_IN HReg hregARM_R5 ( void ) { return mkHReg(False, HRcInt32, 5, 1); } in hregARM_R5()
45 ST_IN HReg hregARM_R6 ( void ) { return mkHReg(False, HRcInt32, 6, 2); } in hregARM_R6()
46 ST_IN HReg hregARM_R7 ( void ) { return mkHReg(False, HRcInt32, 7, 3); } in hregARM_R7()
47 ST_IN HReg hregARM_R10 ( void ) { return mkHReg(False, HRcInt32, 10, 4); } in hregARM_R10()
48 ST_IN HReg hregARM_R11 ( void ) { return mkHReg(False, HRcInt32, 11, 5); } in hregARM_R11()
50 ST_IN HReg hregARM_R0 ( void ) { return mkHReg(False, HRcInt32, 0, 6); } in hregARM_R0()
51 ST_IN HReg hregARM_R1 ( void ) { return mkHReg(False, HRcInt32, 1, 7); } in hregARM_R1()
52 ST_IN HReg hregARM_R2 ( void ) { return mkHReg(False, HRcInt32, 2, 8); } in hregARM_R2()
53 ST_IN HReg hregARM_R3 ( void ) { return mkHReg(False, HRcInt32, 3, 9); } in hregARM_R3()
[all …]
Dhost_x86_defs.h50 ST_IN HReg hregX86_EAX ( void ) { return mkHReg(False, HRcInt32, 0, 0); } in hregX86_EAX()
51 ST_IN HReg hregX86_EBX ( void ) { return mkHReg(False, HRcInt32, 3, 1); } in hregX86_EBX()
52 ST_IN HReg hregX86_ECX ( void ) { return mkHReg(False, HRcInt32, 1, 2); } in hregX86_ECX()
53 ST_IN HReg hregX86_EDX ( void ) { return mkHReg(False, HRcInt32, 2, 3); } in hregX86_EDX()
54 ST_IN HReg hregX86_ESI ( void ) { return mkHReg(False, HRcInt32, 6, 4); } in hregX86_ESI()
55 ST_IN HReg hregX86_EDI ( void ) { return mkHReg(False, HRcInt32, 7, 5); } in hregX86_EDI()
73 ST_IN HReg hregX86_ESP ( void ) { return mkHReg(False, HRcInt32, 4, 20); } in hregX86_ESP()
74 ST_IN HReg hregX86_EBP ( void ) { return mkHReg(False, HRcInt32, 5, 21); } in hregX86_EBP()
Dhost_generic_regs.h116 HRcInt32=3, /* 32-bit int */ enumerator
152 vassert(rc >= HRcInt32 && rc <= HRcVec128); in hregClass()
Dhost_generic_regs.c50 case HRcInt32: vex_printf("HRcInt32"); break; in ppHRegClass()
74 case HRcInt32: vex_printf("%%%sr%u", maybe_v, regNN); return; in ppHReg()
Dhost_x86_isel.c220 HReg reg = mkHReg(True/*virtual reg*/, HRcInt32, 0/*enc*/, env->vreg_ctr); in newVRegI()
291 vassert(hregClass(src) == HRcInt32); in mk_iMOVsd_RR()
292 vassert(hregClass(dst) == HRcInt32); in mk_iMOVsd_RR()
845 vassert(hregClass(r) == HRcInt32); in iselIntExpr_R()
1535 toBool( hregClass(am->Xam.IR.reg) == HRcInt32 in sane_AMode()
1540 toBool( hregClass(am->Xam.IRRS.base) == HRcInt32 in sane_AMode()
1542 && hregClass(am->Xam.IRRS.index) == HRcInt32 in sane_AMode()
1632 vassert(hregClass(rmi->Xrmi.Reg.reg) == HRcInt32); in iselIntExpr_RMI()
1695 vassert(hregClass(ri->Xri.Reg.reg) == HRcInt32); in iselIntExpr_RI()
1740 vassert(hregClass(rm->Xrm.Reg.reg) == HRcInt32); in iselIntExpr_RM()
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Dhost_arm_isel.c156 HReg reg = mkHReg(True/*virtual reg*/, HRcInt32, 0/*enc*/, env->vreg_ctr); in newVRegI()
284 vassert(hregClass(src) == HRcInt32); in mk_iMOVds_RR()
285 vassert(hregClass(dst) == HRcInt32); in mk_iMOVds_RR()
883 toBool( hregClass(am->ARMam1.RI.reg) == HRcInt32 in sane_AMode1()
890 toBool( hregClass(am->ARMam1.RRS.base) == HRcInt32 in sane_AMode1()
892 && hregClass(am->ARMam1.RRS.index) == HRcInt32 in sane_AMode1()
952 toBool( hregClass(am->ARMam2.RI.reg) == HRcInt32 in sane_AMode2()
958 toBool( hregClass(am->ARMam2.RR.base) == HRcInt32 in sane_AMode2()
960 && hregClass(am->ARMam2.RR.index) == HRcInt32 in sane_AMode2()
1015 return toBool( hregClass(am->reg) == HRcInt32 in sane_AModeV()
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Dhost_ppc_isel.c48 #define HRcGPR(_mode64) ((_mode64) ? HRcInt64 : HRcInt32)
520 vassert(hregClass(r_src) == HRcInt32 || in mk_iMOVds_RR()
574 vassert(hregClass(r_srcHi) == HRcInt32); in mk_LoadRR32toFPR()
575 vassert(hregClass(r_srcLo) == HRcInt32); in mk_LoadRR32toFPR()
3212 vassert(hregClass(*rHi) == HRcInt32); in iselInt128Expr_to_32x4()
3214 vassert(hregClass(*rMedHi) == HRcInt32); in iselInt128Expr_to_32x4()
3216 vassert(hregClass(*rMedLo) == HRcInt32); in iselInt128Expr_to_32x4()
3218 vassert(hregClass(*rLo) == HRcInt32); in iselInt128Expr_to_32x4()
3270 vassert(hregClass(*rHi) == HRcInt32); in iselInt64Expr()
3272 vassert(hregClass(*rLo) == HRcInt32); in iselInt64Expr()
[all …]
Dhost_mips_isel.c59 #define HRcGPR(_mode64) ((_mode64) ? HRcInt64 : HRcInt32)
323 vassert(hregClass(r_src) == HRcInt32 || hregClass(r_src) == HRcInt64); in mk_iMOVds_RR()
354 vassert(hregClass(r_srcHi) == HRcInt32); in mk_LoadRR32toFPR()
355 vassert(hregClass(r_srcLo) == HRcInt32); in mk_LoadRR32toFPR()
1959 vassert(hregClass(ri->Mrh.Reg.reg) == HRcInt32); in iselWordExpr_RH5u()
2274 vassert(hregClass(*rHi) == HRcInt32); in iselInt64Expr()
2276 vassert(hregClass(*rLo) == HRcInt32); in iselInt64Expr()
4234 hreg = mkHReg(True, HRcInt32, 0, j++); in iselSB_MIPS()
4242 hreg = mkHReg(True, HRcInt32, 0, j++); in iselSB_MIPS()
4243 hregHI = mkHReg(True, HRcInt32, 0, j++); in iselSB_MIPS()
Dhost_mips_defs.h44 mkHReg(False, (_mode64) ? HRcInt64 : HRcInt32, \
Dhost_mips_defs.c159 vassert(hregClass(reg) == HRcInt32 || hregClass(reg) == HRcInt64 || in ppHRegMIPS()
164 case HRcInt32: in ppHRegMIPS()
1982 case HRcInt32: in genSpill_MIPS()
2012 case HRcInt32: in genReload_MIPS()
2037 vassert(hregClass(r) == (mode64 ? HRcInt64 : HRcInt32)); in iregNo()
Dhost_x86_defs.c110 case HRcInt32: in ppHRegX86()
1715 case HRcInt32: in genSpill_X86()
1740 case HRcInt32: in genReload_X86()
1837 vassert(hregClass(r) == HRcInt32); in iregEnc()
Dhost_ppc_defs.h49 mkHReg(False, (_mode64) ? HRcInt64 : HRcInt32, \
Dhost_arm_defs.c152 case HRcInt32: in ppHRegARM()
2675 case HRcInt32: in genSpill_ARM()
2730 case HRcInt32: in genReload_ARM()
2783 vassert(hregClass(r) == HRcInt32); in iregEnc()
Dhost_ppc_defs.c173 case HRcInt32: in ppHRegPPC()
3166 case HRcInt32: in genSpill_PPC()
3196 case HRcInt32: in genReload_PPC()
3219 vassert(hregClass(r) == (mode64 ? HRcInt64 : HRcInt32)); in iregEnc()