Searched refs:I10 (Results 1 – 12 of 12) sorted by relevance
| /external/mesa3d/src/mesa/vbo/ |
| D | vbo_attrib_tmp.h | 177 #define ATTRI10_1( A, I10 ) ATTRF( A, 1, conv_i10_to_i((I10) & 0x3ff), 0, 0, 1 ) argument
178 #define ATTRI10_2( A, I10 ) ATTRF( A, 2, \ argument
179 conv_i10_to_i((I10) & 0x3ff), \
180 conv_i10_to_i(((I10) >> 10) & 0x3ff), 0, 1 )
181 #define ATTRI10_3( A, I10 ) ATTRF( A, 3, \ argument
182 conv_i10_to_i((I10) & 0x3ff), \
183 conv_i10_to_i(((I10) >> 10) & 0x3ff), \
184 conv_i10_to_i(((I10) >> 20) & 0x3ff), 1 )
185 #define ATTRI10_4( A, I10 ) ATTRF( A, 4, \ argument
186 conv_i10_to_i((I10) & 0x3ff), \
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| /external/clang/test/CodeGenObjC/ |
| D | interface-layout-64.m | 104 @interface I10 : I9 { interface
108 @implementation I10 implementation
112 @interface I11 : I10
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| /external/webp/src/dsp/ |
| D | mips_macro.h | 162 I8, I9, I10, I11, I12, I13) \ argument
184 "usw %[" #IO2 "], " XSTR(I13) "*" #I10 "(%[" #I8 "]) \n\t" \
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| D | enc_mips_dsp_r2.c | 57 I8, I9, I10, I11, I12, I13, I14, I15) \ argument
66 "dpax.w.ph $ac0, %[" #I15 "], %[" #I10 "] \n\t" \
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| /external/libxkbcommon/xkbcommon/test/data/keycodes/ |
| D | xfree86 | 179 <I10> = 144;
339 alias <HELP> = <I10>;
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| /external/clang/test/ASTMerge/Inputs/ |
| D | interface1.m | 73 @class I10, I11;
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| D | interface2.m | 72 @class I10; @interface I12 @end
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| /external/libxkbcommon/xkbcommon/test/data/symbols/ |
| D | inet | 20 key <I10> { [ XF86AudioPrev ] };
338 key <I10> { [ XF86ScrollUp ] };
363 key <I10> { [ XF86AudioStop ] };
381 key <I10> { [ XF86AudioStop ] };
400 key <I10> { [ XF86AudioStop ] };
926 key <I10> { [ XF86Game ] };
1432 key <I10> { [ XF86ScrollUp ] };
1476 key <I10> { [ XF86ScrollDown ] };
1596 key <I10> { [ XF86AudioPlay, XF86AudioPause ] };
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| /external/llvm/test/CodeGen/Mips/msa/ |
| D | i10.ll | 1 ; Test the MSA intrinsics that are encoded with the I10 instruction format.
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| /external/curl/tests/certs/ |
| D | Server-localhost0h-sv.crt | 76 LCfOKMOm0Ni6jDifeP9Ux3YFN0f101WcLBJBgRTKSKK3bQVJK8X1e2Ntb80/9I10
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| D | Server-localhost0h-sv.pem | 117 LCfOKMOm0Ni6jDifeP9Ux3YFN0f101WcLBJBgRTKSKK3bQVJK8X1e2Ntb80/9I10
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUOperands.td | 652 // D-form : [r+I10] (10-bit signed offset + reg)
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