Searched refs:LIV (Results 1 – 5 of 5) sorted by relevance
4 ; itself is an LIV loop condition (not partial LIV which could occur in and/or).15 ; %cond.and only has %cond1 as LIV so no unswitch should happen.
704 void ConnectedVNInfoEqClasses::Distribute(LiveInterval *LIV[], in Distribute() argument706 assert(LIV[0] && "LIV[0] must be set"); in Distribute()707 LiveInterval &LI = *LIV[0]; in Distribute()722 MO.setReg(LIV[getEqClass(VNI)]->reg); in Distribute()731 assert((LIV[eq]->empty() || LIV[eq]->expiredAt(I->start)) && in Distribute()733 LIV[eq]->ranges.push_back(*I); in Distribute()746 VNI->id = LIV[eq]->getNumValNums(); in Distribute()747 LIV[eq]->valnos.push_back(VNI); in Distribute()
1185 void ConnectedVNInfoEqClasses::Distribute(LiveInterval &LI, LiveInterval *LIV[], in Distribute() argument1209 MO.setReg(LIV[EqClass-1]->reg); in Distribute()1238 = LIV[ComponentNum-1]->createSubRange(Allocator, SR.LaneMask); in Distribute()1249 DistributeRange(LI, LIV, EqClass); in Distribute()
588 void Distribute(LiveInterval *LIV[], MachineRegisterInfo &MRI);
873 void Distribute(LiveInterval &LI, LiveInterval *LIV[],