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Searched refs:LoadStore (Results 1 – 12 of 12) sorted by relevance

/external/valgrind/none/tests/mips32/
DMakefile.am16 LoadStore.stdout.exp LoadStore.stdout.exp-BE LoadStore.stderr.exp \
17 LoadStore.vgtest \
50 LoadStore \ program
DMakefile.in125 FPUarithmetic$(EXEEXT) LoadStore$(EXEEXT) LoadStore1$(EXEEXT) \
146 LoadStore_SOURCES = LoadStore.c
147 LoadStore_OBJECTS = LoadStore.$(OBJEXT)
256 SOURCES = FPUarithmetic.c LoadStore.c LoadStore1.c MIPS32int.c \
262 DIST_SOURCES = FPUarithmetic.c LoadStore.c LoadStore1.c MIPS32int.c \
672 LoadStore.stdout.exp LoadStore.stdout.exp-BE LoadStore.stderr.exp \
673 LoadStore.vgtest \
747 LoadStore$(EXEEXT): $(LoadStore_OBJECTS) $(LoadStore_DEPENDENCIES) $(EXTRA_LoadStore_DEPENDENCIES)
748 @rm -f LoadStore$(EXEEXT)
834 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/LoadStore.Po@am__quote@
DLoadStore.vgtest1 prog: LoadStore
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUSchedule.td20 def LoadStore : InstrItinClass; // ODD_UNIT
41 InstrItinData<LoadStore , [InstrStage<6, [ODD_UNIT]>]>,
DSPUInstrInfo.td47 LoadStore,
54 LoadStore,
79 LoadStore,
86 LoadStore,
111 LoadStore,
118 LoadStore,
148 "lqr\t$rT, $disp", LoadStore,
159 LoadStore,
166 LoadStore,
191 LoadStore,
[all …]
/external/llvm/lib/Target/NVPTX/
DNVPTX.h93 enum LoadStore { enum
/external/v8/src/arm64/
Dassembler-arm64.cc1633 LoadStore(rt, src, LDRB_w); in ldrb()
1638 LoadStore(rt, dst, STRB_w); in strb()
1643 LoadStore(rt, src, rt.Is64Bits() ? LDRSB_x : LDRSB_w); in ldrsb()
1648 LoadStore(rt, src, LDRH_w); in ldrh()
1653 LoadStore(rt, dst, STRH_w); in strh()
1658 LoadStore(rt, src, rt.Is64Bits() ? LDRSH_x : LDRSH_w); in ldrsh()
1663 LoadStore(rt, src, LoadOpFor(rt)); in ldr()
1668 LoadStore(rt, src, StoreOpFor(rt)); in str()
1674 LoadStore(rt, src, LDRSW_x); in ldrsw()
2554 void Assembler::LoadStore(const CPURegister& rt, in LoadStore() function in v8::internal::Assembler
Dmacro-assembler-arm64.cc578 LoadStore(rt, MemOperand(addr.base(), temp), op); in LoadStoreMacro()
581 LoadStore(rt, MemOperand(addr.base()), op); in LoadStoreMacro()
586 LoadStore(rt, MemOperand(addr.base()), op); in LoadStoreMacro()
589 LoadStore(rt, addr, op); in LoadStoreMacro()
Dassembler-arm64.h1882 void LoadStore(const CPURegister& rt,
/external/vixl/src/aarch64/
Dassembler-aarch64.cc1034 LoadStore(rt, src, LDRB_w, option); in ldrb()
1043 LoadStore(rt, dst, STRB_w, option); in strb()
1052 LoadStore(rt, src, rt.Is64Bits() ? LDRSB_x : LDRSB_w, option); in ldrsb()
1061 LoadStore(rt, src, LDRH_w, option); in ldrh()
1070 LoadStore(rt, dst, STRH_w, option); in strh()
1079 LoadStore(rt, src, rt.Is64Bits() ? LDRSH_x : LDRSH_w, option); in ldrsh()
1088 LoadStore(rt, src, LoadOpFor(rt), option); in ldr()
1097 LoadStore(rt, dst, StoreOpFor(rt), option); in str()
1107 LoadStore(xt, src, LDRSW_x, option); in ldrsw()
1116 LoadStore(rt, src, LDRB_w, option); in ldurb()
[all …]
Dmacro-assembler-aarch64.cc1858 LoadStore(rt, MemOperand(addr.GetBaseRegister(), temp), op); in LS_MACRO_LIST()
1861 LoadStore(rt, MemOperand(addr.GetBaseRegister()), op); in LS_MACRO_LIST()
1866 LoadStore(rt, MemOperand(addr.GetBaseRegister()), op); in LS_MACRO_LIST()
1869 LoadStore(rt, addr, op); in LS_MACRO_LIST()
Dassembler-aarch64.h3090 void LoadStore(const CPURegister& rt,