Searched refs:MFOCRF (Results 1 – 16 of 16) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCMCCodeEmitter.cpp | 170 assert((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) && in get_crbitm_encoding()
182 assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF) || in getMachineOpValue()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCCodeEmitter.cpp | 141 assert((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) && in get_crbitm_encoding()
251 assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF) || in getMachineOpValue()
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| D | PPCISelDAGToDAG.cpp | 703 IntCR = SDValue(CurDAG->getMachineNode(PPC::MFOCRF, dl, MVT::i32, CR7Reg, in SelectSETCC()
839 return CurDAG->getMachineNode(PPC::MFOCRF, dl, MVT::i32, in Select()
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| D | PPCInstrInfo.td | 1116 def MFOCRF: XFXForm_5a<31, 19, (outs GPRC:$rT), (ins crbitm:$FXM),
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| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCMCCodeEmitter.cpp | 348 MI.getOpcode() == PPC::MFOCRF || MI.getOpcode() == PPC::MFOCRF8) && in get_crbitm_encoding()
362 MI.getOpcode() != PPC::MFOCRF && MI.getOpcode() != PPC::MFOCRF8) || in getMachineOpValue()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 509 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg) in lowerCRSpilling()
599 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg) in lowerCRBitSpilling()
647 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), RegO) in lowerCRBitRestore()
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| D | PPCAsmPrinter.cpp | 962 case PPC::MFOCRF: in EmitInstruction()
968 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; in EmitInstruction()
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| D | PPCISelLowering.h | 137 MFOCRF, enumerator
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| D | PPC.td | 67 "Enable the MFOCRF instruction">;
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| D | PPCInstrInfo.cpp | 889 BuildMI(MBB, I, DL, get(PPC::MFOCRF), DestReg).addReg(CRReg); in copyPhysReg()
906 BuildMI(MBB, I, DL, get(PPC::MFOCRF), DestReg).addReg(SrcReg); in copyPhysReg()
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| D | PPCISelDAGToDAG.cpp | 2395 IntCR = SDValue(CurDAG->getMachineNode(PPC::MFOCRF, dl, MVT::i32, CR7Reg, in trySETCC()
2464 case PPCISD::MFOCRF: { in Select()
2466 ReplaceNode(N, CurDAG->getMachineNode(PPC::MFOCRF, dl, MVT::i32, in Select()
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| D | PPCISelLowering.cpp | 1047 case PPCISD::MFOCRF: return "PPCISD::MFOCRF"; in getTargetNodeName()
7808 SDValue Flags = DAG.getNode(PPCISD::MFOCRF, dl, MVT::i32, in LowerINTRINSIC_WO_CHAIN()
11076 if (FlagUser->getOpcode() == PPCISD::MFOCRF) in PerformDAGCombine()
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| D | PPCInstrInfo.td | 2394 def MFOCRF: XFXForm_5a<31, 19, (outs gprc:$rT), (ins crbitm:$FXM),
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| /external/v8/src/ppc/ |
| D | constants-ppc.h | 1777 V(mfocrf, MFOCRF, 0x7C100026) \
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| /external/capstone/arch/PowerPC/ |
| D | PPCGenAsmWriter.inc | 700 109070961U, // MFOCRF
1973 0U, // MFOCRF
3866 // MFOCRF, MFOCRF8
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| D | PPCGenDisassemblerTables.inc | 937 /* 3785 */ MCD_OPC_Decode, 168, 5, 52, // Opcode: MFOCRF
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