Searched refs:P5600 (Results 1 – 3 of 3) sorted by relevance
187 "MipsSubtarget::CPU::P5600",188 "The P5600 Processor", [FeatureMips32r5]>;
1 //==- MipsScheduleP5600.td - P5600 Scheduling Definitions --*- tablegen -*-===//369 // The following instruction classes are never valid on P5600.376 // The following instructions are never valid on P5600.
45 enum class CPU { P5600 }; enumerator