Searched refs:Q18 (Results 1 – 7 of 7) sorted by relevance
| /external/libxaac/decoder/ |
| D | ixheaacd_constants.h | 41 #define Q18 262144 macro
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 138 case AArch64::Q18: in isOdd()
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| D | AArch64RegisterInfo.td | 373 def Q18 : AArch64Reg<18, "q18", [D18], ["v18", ""]>, DwarfRegAlias<B18>;
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 1245 case AArch64::Q17: Reg = AArch64::Q18; break; in getNextVectorRegister()
1246 case AArch64::Q18: Reg = AArch64::Q19; break; in getNextVectorRegister()
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| /external/valgrind/memcheck/ |
| D | mc_machine.c | 1017 if (o >= GOF(Q18) && o+sz <= GOF(Q18)+SZB(Q18)) return GOF(Q18); in get_otrack_shadow_offset_wrk()
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| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 259 AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
439 AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19,
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1875 .Case("v18", AArch64::Q18) in matchVectorRegName()
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