Searched refs:READCYCLECOUNTER (Results 1 – 19 of 19) sorted by relevance
| /external/llvm/test/CodeGen/X86/ |
| D | rdtsc.ll | 4 ; Verify that we correctly lower ISD::READCYCLECOUNTER.
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 564 READCYCLECOUNTER, enumerator
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 664 READCYCLECOUNTER, enumerator
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| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| D | BlackfinISelLowering.cpp | 117 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Custom); in BlackfinTargetLowering()
485 case ISD::READCYCLECOUNTER: { in ReplaceNodeResults()
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| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelDAGToDAG.cpp | 249 case ISD::READCYCLECOUNTER: { in Select()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 80 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; in getOperationName()
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| D | LegalizeDAG.cpp | 1039 case ISD::READCYCLECOUNTER: in LegalizeOp()
2778 case ISD::READCYCLECOUNTER: in ExpandNode()
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| D | LegalizeIntegerTypes.cpp | 1326 case ISD::READCYCLECOUNTER: ExpandIntRes_READCYCLECOUNTER(N, Lo, Hi); break; in ExpandIntegerResult()
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| D | SelectionDAGBuilder.cpp | 5284 Res = DAG.getNode(ISD::READCYCLECOUNTER, sdl, in visitIntrinsicCall()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 911 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Expand); in initActions()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 490 def readcyclecounter : SDNode<"ISD::READCYCLECOUNTER", SDTIntLeaf,
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 202 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Legal); in SITargetLowering()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 412 setOperationAction(ISD::READCYCLECOUNTER , MVT::i64 , Custom); in X86TargetLowering()
10447 case ISD::READCYCLECOUNTER: return LowerREADCYCLECOUNTER(Op, DAG); in LowerOperation()
10531 case ISD::READCYCLECOUNTER: { in ReplaceNodeResults()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 833 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, isPPC64 ? Legal : Custom); in PPCTargetLowering()
8315 case ISD::READCYCLECOUNTER: { in ReplaceNodeResults()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 5891 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; in getOperationName()
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| D | SelectionDAGBuilder.cpp | 4935 Res = DAG.getNode(ISD::READCYCLECOUNTER, dl, in visitIntrinsicCall()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 769 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Custom); in ARMTargetLowering()
7260 case ISD::READCYCLECOUNTER: in ReplaceNodeResults()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 380 setOperationAction(ISD::READCYCLECOUNTER , MVT::i64 , Custom); in X86TargetLowering()
21750 case ISD::READCYCLECOUNTER: return LowerREADCYCLECOUNTER(Op, Subtarget,DAG); in LowerOperation()
21938 case ISD::READCYCLECOUNTER: { in ReplaceNodeResults()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 397 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Legal); in AArch64TargetLowering()
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