/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrSPE.td | 17 bits<5> RT; 23 let Inst{6-10} = RT; 51 bits<5> RT; 56 let Inst{6-10} = RT; 73 def EVLDD : EVXForm_D<769, (outs gprc:$RT), (ins spe8dis:$dst), 74 "evldd $RT, $dst", IIC_VecFP>; 75 def EVLDW : EVXForm_D<771, (outs gprc:$RT), (ins spe8dis:$dst), 76 "evldw $RT, $dst", IIC_VecFP>; 77 def EVLDH : EVXForm_D<773, (outs gprc:$RT), (ins spe8dis:$dst), 78 "evldh $RT, $dst", IIC_VecFP>; [all …]
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D | p9-instrs.txt | 12 [PO RT d1 d0 XO d2] addpcis RT,D 93 [PO RT /// L /// XO /] darn RT,L 96 [PO RT RA RB RC XO] maddhd RT,RA.RB,RC 99 [PO RT RA RB RC XO] maddhdu RT,RA.RB,RC 102 [PO RT RA RB RC XO] maddld RT,RA.RB,RC 105 [PO RT RA RB XO /] modsw RT,RA,RB 108 [PO RT RA RB XO /] moduw RT,RA,RB 111 [PO RT RA RB XO /] modsd RT,RA,RB 114 [PO RT RA RB XO /] modud RT,RA,RB 129 [PO RT RA FC XO /] lwat RT,RA,FC [all …]
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/external/valgrind/none/tests/mips64/ |
D | macro_int.h | 1 #define TEST1(instruction, RSval, RTval, RD, RS, RT) \ argument 6 "move $"#RT", %2" "\n\t" \ 12 : #RD, #RS, #RT \ 19 #define TEST2(instruction, RSval, imm, RT, RS) \ argument 24 "move $"#RT", $zero" "\n\t" \ 26 "move %0, $"#RT "\n\t" \ 29 : #RT, #RS \ 51 #define TEST4(instruction, RSval, RTval, RS, RT) \ argument 57 "move $"#RT", %3" "\n\t" \ 65 : #RS, #RT \ [all …]
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D | cvm_ins.c | 70 #define TESTINST1(instruction, RSVal, RT, RS, p, lenm1) \ argument 74 "li $" #RT ", 0" "\n\t" \ 77 "move %0, $" #RT "\n\t" \ 80 : #RS, #RT, "cc", "memory" \ 85 #define TESTINST2(instruction, RSVal, RTval, RD, RS, RT) \ argument 91 "move $" #RT ", %2" "\n\t" \ 96 : #RD, #RS, #RT, "cc", "memory" \ 101 #define TESTINST3(instruction, RSVal, RT, RS, imm) \ argument 105 "li $" #RT ", 0" "\n\t" \ 108 "move %0, $" #RT "\n\t" \ [all …]
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D | branches.c | 130 #define TESTINST4(instruction, RDval, RSval, RTval, RD, RS, RT) \ argument 136 "move $"#RT", %2" "\n\t" \ 138 instruction" $"#RS", $"#RT", end"instruction#RDval "\n\t" \ 147 : #RD, #RS, #RT \ 201 #define TESTINST4l(instruction, RDval, RSval, RTval, RD, RS, RT) \ argument 207 "move $"#RT", %2" "\n\t" \ 209 instruction" $"#RS", $"#RT", end"instruction#RDval "\n\t" \ 218 : #RD, #RS, #RT \
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D | load_store_multiple.c | 23 #define TESTINST1(instruction, RTval, offset, RT, RS) \ argument 28 "li $"#RT", "#RTval "\n\t" \ 33 : #RT, #RS \ 40 "li $"#RT", " #RTval "\n\t" \ 45 : #RT, #RS \ 53 #define TESTINSTsw(RTval, offset, RT, RS) \ argument 59 "li $"#RT", "#RTval "\n\t" \ 65 : #RT, #RS \
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/external/mesa3d/src/gallium/drivers/swr/rasterizer/core/ |
D | rasterizer.cpp | 42 template <typename RT> 44 template <typename RT> 286 template<typename RT> 289 …static_assert(RT::PrecisionT::BitsT::value + RT::ConservativePrecisionT::BitsT::value >= RT::EdgeP… in ManhToEdgePrecisionAdjust() 291 …return ((RT::PrecisionT::BitsT::value + RT::ConservativePrecisionT::BitsT::value) - RT::EdgePrecis… in ManhToEdgePrecisionAdjust() 301 template <typename RT, typename ConservativeEdgeOffsetT> 329 …static_assert(RT::PrecisionT::BitsT::value + RT::ConservativePrecisionT::BitsT::value >= RT::EdgeP… in adjustEdgeConservative() 334 manh = _mm256_mul_pd(manh, _mm256_set1_pd(ManhToEdgePrecisionAdjust<RT>() * 0.5)); in adjustEdgeConservative() 345 template <typename RT> 346 struct adjustEdgeConservative<RT, std::integral_constant<int32_t, 0>> [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
D | SPUInstrFormats.td | 34 bits<7> RT; 41 let Inst{25-31} = RT; 61 let RT = 0 in { 62 // RR Format, where RT is zeroed (don't care), or as the instruction handbook 63 // says, "RT is a false target." Used in "Halt if" instructions 78 bits<7> RT; 83 let Inst{4-10} = RT; 96 bits<7> RT; 103 let Inst{25-31} = RT; 112 bits<7> RT; [all …]
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/external/tcpdump/tests/ |
D | udld-v.out | 1 UDLDv1, Code Probe message (1), Flags [RT, RSY] (0x03), length 60 10 UDLDv1, Code Echo message (2), Flags [RT] (0x00), length 80 19 UDLDv1, Code Echo message (2), Flags [RT] (0x00), length 80 28 UDLDv1, Code Echo message (2), Flags [RT] (0x00), length 80 37 UDLDv1, Code Echo message (2), Flags [RT] (0x00), length 80 46 UDLDv1, Code Echo message (2), Flags [RT] (0x00), length 80 55 UDLDv1, Code Echo message (2), Flags [RT] (0x00), length 80 64 UDLDv1, Code Echo message (2), Flags [RT] (0x00), length 80 73 UDLDv1, Code Echo message (2), Flags [RT] (0x00), length 80 82 UDLDv1, Code Echo message (2), Flags [RT] (0x00), length 80 [all …]
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/external/valgrind/none/tests/mips32/ |
D | MoveIns.c | 39 #define TESTINSNMOVE(instruction, offset, FS, RT) \ argument 50 "move %1, $" #RT "\n\t" \ 54 : "t0", "$"#FS, #RT, "memory" \ 61 #define TESTINSNMOVEd(instruction, offset, FS, RT) \ argument 68 "move %0, $" #RT "\n\t" \ 71 : "t0", "$"#FS, #RT, "memory" \ 78 #define TESTINSNMOVEt(instruction, offset, FS, RT) \ argument 86 "lw $" #RT ", "#offset"($t0)\n\t" \ 89 "move %1, $" #RT "\n\t" \ 93 : "t0", "$"#FS, #RT, "memory" \ [all …]
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D | mips32_dspr2.c | 39 #define TESTDSPINST_RD_RT_DSPC(instruction, RTval, RD, RT) \ argument 46 "move $" #RT ", %2 \n\t" \ 53 : #RT, #RD \ 59 #define TESTDSPINST_RD_RT_NODSPC(instruction, RTval, RD, RT) \ argument 65 "move $" #RT ", %1 \n\t" \ 70 : #RT, #RD \ 92 #define TESTDSPINST_RD_RS_RT_DSPC(instruction, RSval, RTval, RD, RS, RT) \ argument 101 "move $" #RT ", %3 \n\t" \ 107 : #RD, #RS, #RT \ 134 #define TESTDSPINST_RS_RT_DSPC(instruction, RSval, RTval, RS, RT) \ argument [all …]
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D | LoadStore.c | 24 #define TESTINST1(instruction, RTval, offset, RT, RS) \ argument 29 "li $" #RT", " #RTval" \n\t" \ 34 : #RS, #RT, "memory" \ 41 "li $" #RT", " #RTval " \n\t" \ 46 : #RS, #RT, "memory" \ 54 #define TESTINSTsw(RTval, offset, RT, RS) \ argument 60 "li $" #RT", " #RTval" \n\t" \ 66 : #RT, #RS, "memory" \
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D | LoadStore1.c | 24 #define TESTINST1(instruction, RTval, offset, RT, RS) \ argument 29 "li $" #RT", " #RTval" \n\t" \ 34 : #RS, #RT, "memory" \ 41 "li $" #RT", " #RTval " \n\t" \ 46 : #RS, #RT, "memory" \ 54 #define TESTINSTsw(RTval, offset, RT, RS) \ argument 60 "li $" #RT", " #RTval" \n\t" \ 66 : #RT, #RS, "memory" \
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D | vfp.c | 64 #define TESTINSN5LOAD(instruction, RTval, offset, RT) \ argument 72 "mov.d %0, $" #RT "\n\t" \ 73 "sdc1 $" #RT ", 0(%3) \n\t" \ 76 : "t0", "t1", "$"#RT, "memory" \ 83 #define TESTINSN5LOADw(instruction, RTval, offset, RT) \ argument 91 "mov.d %0, $" #RT "\n\t" \ 92 "mfc1 %1, $" #RT "\n\t" \ 95 : "t0", "t1", "$"#RT, "memory" \
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/external/valgrind/memcheck/tests/ppc64/ |
D | power_ISA2_07.c | 14 unsigned long RT; in test_reservation() local 28 __asm__ volatile ("lbarx %0, 20, 21, 1":"=r" (RT)); in test_reservation() 29 printf("lbarx => 0x%lx\n", RT); in test_reservation() 35 __asm__ volatile ("lharx %0, 20, 21, 1":"=r" (RT)); in test_reservation() 36 printf("lharx => 0x%lx\n", RT); in test_reservation()
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D | power_ISA2_05.c | 176 unsigned long long RT; in test_reservation() local 187 __asm__ volatile ("lwarx %0, 20, 21, 1":"=r" (RT)); in test_reservation() 188 printf("lwarx => 0x%llx\n", RT); in test_reservation() 195 __asm__ volatile ("ldarx %0, 20, 21, 1":"=r" (RT)); in test_reservation() 196 printf("ldarx => 0x%llx\n", RT); in test_reservation()
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/external/valgrind/memcheck/tests/ppc32/ |
D | power_ISA2_07.c | 14 unsigned RT; in test_reservation() local 28 __asm__ volatile ("lbarx %0, 20, 21, 1":"=r" (RT)); in test_reservation() 29 printf("lbarx => 0x%x\n", RT); in test_reservation() 35 __asm__ volatile ("lharx %0, 20, 21, 1":"=r" (RT)); in test_reservation() 36 printf("lharx => 0x%x\n", RT); in test_reservation()
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D | power_ISA2_05.c | 171 int RT; in test_reservation() local 181 __asm__ volatile ("lwarx %0, 20, 21, 1":"=r" (RT)); in test_reservation() 182 printf("lwarx => %x\n", RT); in test_reservation() 187 __asm__ volatile ("ldarx %0, 20, 21, 1":"=r" (RT)); in test_reservation() 188 printf("ldarx => %x\n", RT); in test_reservation()
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/external/clang/lib/StaticAnalyzer/Checkers/ |
D | ReturnUndefChecker.cpp | 47 QualType RT = CallEvent::getDeclaredResultType(SFC->getDecl()); in checkPreStmt() local 58 if (!RT.isNull() && RT->isVoidType()) in checkPreStmt() 64 if (RT.isNull() && isa<BlockDecl>(SFC->getDecl()) && in checkPreStmt() 72 if (RT.isNull()) in checkPreStmt() 75 if (RT->isReferenceType()) { in checkPreStmt()
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/external/emma/core/java12/com/vladium/emma/rt/ |
D | RT.java | 27 abstract class RT implements IAppConstants class 39 ClassLoader loader = RT.class.getClassLoader (); in reset() 84 …final Runnable exitHook = new RTExitHook (RT.class, cdata, getCoverageOutFile (), getCoverageOutMe… in reset() 150 … if (DEBUG) System.out.println ("RT::dumpCoverageData() DUMPING " + RT.class.getClassLoader ()); in dumpCoverageData() 176 private RT () {} // prevent subclassing in RT() method in RT 218 …) System.out.println ("RT[" + System.identityHashCode (RT.class) + "]::<clinit>: loaded by " + RT.…
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/external/llvm/test/Instrumentation/EfficiencySanitizer/ |
D | struct_field_gep.ll | 7 ; struct RT { 15 ; struct RT Z; 22 %struct.RT = type { i8, [10 x [20 x i32]], i8 } 23 %struct.ST = type { i32, double, %struct.RT } 37 ; CHECK-NEXT: %4 = load i64, i64* getelementptr inbounds ([4 x i64], [4 x i64]* @"struct.RT#3#11#… 39 ; CHECK-NEXT: store i64 %5, i64* getelementptr inbounds ([4 x i64], [4 x i64]* @"struct.RT#3#11#1…
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/external/deqp/framework/platform/android/ |
D | tcuAndroidInternals.cpp | 64 template <typename RT, typename T1, typename T2, typename T3, typename T4> 65 RT* callConstructor4 (GenericFptr fptr, void* memory, size_t memorySize, T1 param1, T2 param2, T3 p… in callConstructor4() 71 typedef RT* (*ABIFptr)(void*, T1, T2, T3, T4); in callConstructor4() 73 return reinterpret_cast<RT*>(memory); in callConstructor4() 78 return reinterpret_cast<RT*>(memory); in callConstructor4() 83 return reinterpret_cast<RT*>(memory); in callConstructor4() 88 return reinterpret_cast<RT*>(memory); in callConstructor4()
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/external/clang/lib/CodeGen/ |
D | CodeGenTypes.cpp | 161 if (const auto *RT = T->getAs<RecordType>()) in isSafeToConvert() local 162 return isSafeToConvert(RT->getDecl(), CGT, AlreadyChecked); in isSafeToConvert() 206 const RecordType *RT = dyn_cast<RecordType>(TT); in isFuncParamTypeConvertible() local 207 if (!RT) return true; in isFuncParamTypeConvertible() 216 return isSafeToConvert(RT->getDecl(), *this); in isFuncParamTypeConvertible() 321 if (const RecordType *RT = FT->getReturnType()->getAs<RecordType>()) in ConvertFunctionType() local 322 ConvertRecordDeclType(RT->getDecl()); in ConvertFunctionType() 325 if (const RecordType *RT = FPT->getParamType(i)->getAs<RecordType>()) in ConvertFunctionType() local 326 ConvertRecordDeclType(RT->getDecl()); in ConvertFunctionType() 385 if (const RecordType *RT = dyn_cast<RecordType>(Ty)) in ConvertType() local [all …]
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/external/jacoco/org.jacoco.agent.rt/src/com/vladium/emma/rt/ |
D | RT.java | 27 public final class RT { class 29 private RT() { in RT() method in RT 52 out.write(org.jacoco.agent.rt.RT.getAgent().getExecutionData(false)); in dumpCoverageData()
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/external/syslinux/gnu-efi/gnu-efi-3.0/lib/runtime/ |
D | vm.c | 51 ConvertPointer = RT->ConvertPointer; in RtLibEnableVirtualMappings() 58 ConvertPointer (EFI_INTERNAL_PTR, (VOID **)&RT); in RtLibEnableVirtualMappings() 83 ConvertPointer = RT->ConvertPointer; in RtConvertList()
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