| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandCondsets.cpp | 215 struct RegisterRef { struct in __anonceba9f4e0111::HexagonExpandCondsets
216 RegisterRef(const MachineOperand &Op) : Reg(Op.getReg()), in RegisterRef() argument
218 RegisterRef(unsigned R = 0, unsigned S = 0) : Reg(R), Sub(S) {} in RegisterRef() argument
219 bool operator== (RegisterRef RR) const { in operator ==() argument
222 bool operator!= (RegisterRef RR) const { return !operator==(RR); } in operator !=() argument
223 bool operator< (RegisterRef RR) const { in operator <() argument
236 void addRefToMap(RegisterRef RR, ReferenceMap &Map, unsigned Exec);
237 bool isRefInMap(RegisterRef, ReferenceMap &Map, unsigned Exec);
257 MachineInstr *getReachingDefForPred(RegisterRef RD,
265 void renameInRange(RegisterRef RO, RegisterRef RN, unsigned PredR,
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| D | RDFGraph.h | 369 struct RegisterRef { struct
373 RegisterRef() = default; argument
374 RegisterRef(const RegisterRef &RR) = default;
375 RegisterRef &operator= (const RegisterRef &RR) = default; argument
376 bool operator== (const RegisterRef &RR) const {
379 bool operator!= (const RegisterRef &RR) const {
382 bool operator< (const RegisterRef &RR) const {
386 typedef std::set<RegisterRef> RegisterSet;
392 virtual std::vector<RegisterRef> getAliasSet(RegisterRef RR) const;
393 virtual bool alias(RegisterRef RA, RegisterRef RB) const;
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| D | RDFCopy.cpp | 35 RegisterRef DstR = { Dst.getReg(), Dst.getSubReg() }; in interpretAsCopy()
36 RegisterRef SrcR = { Src.getReg(), Src.getSubReg() }; in interpretAsCopy()
59 RegisterRef DefR = { Dst.getReg(), Dst.getSubReg() }; in interpretAsCopy()
66 RegisterRef DR = { DefR.Reg, S }; in interpretAsCopy()
67 RegisterRef SR = { I.Reg, I.SubReg }; in interpretAsCopy()
152 dbgs() << ' ' << Print<RegisterRef>(J.first, DFG) << '=' in run()
153 << Print<RegisterRef>(J.second, DFG); in run()
158 dbgs() << Print<RegisterRef>(R.first, DFG) << " -> {"; in run()
183 RegisterRef DR = DA.Addr->getRegRef(); in run()
187 RegisterRef SR = FR->second; in run()
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| D | RDFLiveness.h | 34 typedef std::map<RegisterRef,NodeSet> RefMap;
40 NodeList getAllReachingDefs(RegisterRef RefRR, NodeAddr<RefNode*> RefA,
43 NodeSet getAllReachingDefsRec(RegisterRef RefRR, NodeAddr<RefNode*> RefA,
45 NodeSet getAllReachedUses(RegisterRef RefRR, NodeAddr<DefNode*> DefA,
100 RegisterRef RR) const;
101 RegisterRef getRestrictedRegRef(NodeAddr<RefNode*> RA) const;
102 unsigned getPhysReg(RegisterRef RR) const;
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| D | BitTracker.h | 31 struct RegisterRef;
48 RegisterCell get(RegisterRef RR) const;
49 void put(RegisterRef RR, const RegisterCell &RC);
50 void subst(RegisterRef OldRR, RegisterRef NewRR);
91 struct BitTracker::RegisterRef { struct
92 RegisterRef(unsigned R = 0, unsigned S = 0)
94 RegisterRef(const MachineOperand &MO) in RegisterRef() function
347 uint16_t getRegBitWidth(const RegisterRef &RR) const;
349 RegisterCell getCell(const RegisterRef &RR, const CellMapType &M) const;
350 void putCell(const RegisterRef &RR, RegisterCell RC, CellMapType &M) const;
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| D | HexagonBitSimplify.cpp | 167 static bool getSubregMask(const BitTracker::RegisterRef &RR,
174 BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH);
182 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI);
183 static bool isTransparentCopy(const BitTracker::RegisterRef &RD,
184 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI);
363 bool HexagonBitSimplify::getSubregMask(const BitTracker::RegisterRef &RR, in getSubregMask()
390 BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH) { in parseRegSequence()
850 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI) { in getFinalVRegClass()
880 bool HexagonBitSimplify::isTransparentCopy(const BitTracker::RegisterRef &RD, in isTransparentCopy()
881 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI) { in isTransparentCopy()
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| D | RDFGraph.cpp | 32 raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterRef> &P) { in operator <<()
90 << Print<RegisterRef>(RA.Addr->getRegRef(), G) << '>'; in printRefHeader()
283 OS << ' ' << Print<RegisterRef>(I, P.G); in operator <<()
293 << '<' << Print<RegisterRef>(I->Addr->getRegRef(), P.G) << '>'; in operator <<()
379 RegisterRef RefNode::getRegRef() const { in getRegRef()
389 void RefNode::setRegRef(RegisterRef RR) { in setRegRef()
573 bool RegisterAliasInfo::covers(RegisterRef RA, RegisterRef RB) const { in covers()
593 bool RegisterAliasInfo::covers(const RegisterSet &RRs, RegisterRef RR) const { in covers()
617 std::vector<RegisterRef> RegisterAliasInfo::getAliasSet(RegisterRef RR) const { in getAliasSet()
620 std::vector<RegisterRef> AS; in getAliasSet()
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| D | HexagonRDF.h | 21 bool covers(RegisterRef RA, RegisterRef RR) const override;
22 bool covers(const RegisterSet &RRs, RegisterRef RR) const override;
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| D | RDFLiveness.cpp | 45 OS << ' ' << Print<RegisterRef>(I.first, P.G) << '{'; in operator <<()
87 NodeList Liveness::getAllReachingDefs(RegisterRef RefRR, in getAllReachingDefs()
111 RegisterRef RR = TA.Addr->getRegRef(); in getAllReachingDefs()
240 NodeSet Liveness::getAllReachingDefsRec(RegisterRef RefRR, in getAllReachingDefsRec()
281 NodeSet Liveness::getAllReachedUses(RegisterRef RefRR, in getAllReachedUses()
515 RegisterRef RR = NodeAddr<DefNode*>(Ds[0]).Addr->getRegRef(); in computePhiInfo()
516 dbgs() << '<' << Print<RegisterRef>(RR, DFG) << '>'; in computePhiInfo()
604 RegisterRef RR = R.first; in computeLiveIns()
642 dbgs() << ' ' << Print<RegisterRef>({unsigned(x),0}, DFG); in computeLiveIns()
733 RegisterRef RR) const { in isRestricted()
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| D | RDFCopy.h | 32 typedef std::map<RegisterRef, RegisterRef> EqualityMap;
42 std::map<RegisterRef,std::map<NodeId,NodeId>> RDefMap;
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| D | HexagonRDF.cpp | 19 bool HexagonRegisterAliasInfo::covers(RegisterRef RA, RegisterRef RB) const { in covers()
37 bool HexagonRegisterAliasInfo::covers(const RegisterSet &RRs, RegisterRef RR) in covers()
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| D | BitTracker.cpp | 314 uint16_t BT::MachineEvaluator::getRegBitWidth(const RegisterRef &RR) const { in getRegBitWidth()
340 BT::RegisterCell BT::MachineEvaluator::getCell(const RegisterRef &RR, in getCell()
368 void BT::MachineEvaluator::putCell(const RegisterRef &RR, RegisterCell RC, in putCell()
742 RegisterRef RD = MI.getOperand(0); in evaluate()
744 RegisterRef RS = MI.getOperand(1); in evaluate()
746 RegisterRef RT = MI.getOperand(3); in evaluate()
761 RegisterRef RD = MI.getOperand(0); in evaluate()
762 RegisterRef RS = MI.getOperand(1); in evaluate()
792 RegisterRef DefRR(MD); in visitPHI()
812 RegisterRef RU = PI.getOperand(i); in visitPHI()
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| D | HexagonBlockRanges.h | 35 struct RegisterRef { struct
37 bool operator<(RegisterRef R) const {
41 typedef std::set<RegisterRef> RegisterSet;
136 typedef std::map<RegisterRef,RangeList> RegToRangeMap;
139 static RegisterSet expandToSubRegs(RegisterRef R,
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| D | HexagonBlockRanges.cpp | 254 RegisterRef R, const MachineRegisterInfo &MRI, in expandToSubRegs()
285 std::map<RegisterRef,IndexType> LastDef, LastUse; in computeInitialLiveRanges()
297 auto closeRange = [&LastUse,&LastDef,&LiveMap] (RegisterRef R) -> void { in computeInitialLiveRanges()
315 RegisterRef R = { Op.getReg(), Op.getSubReg() }; in computeInitialLiveRanges()
329 RegisterRef R = { Op.getReg(), Op.getSubReg() }; in computeInitialLiveRanges()
382 auto addDeadRanges = [&IndexMap,&LiveMap,&DeadMap] (RegisterRef R) -> void { in computeDeadMap()
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| D | HexagonBitTracker.h | 22 typedef BitTracker::RegisterRef RegisterRef; typedef
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| D | HexagonOptAddrMode.cpp | 73 std::map<RegisterRef, std::map<NodeId, NodeId>> RDefMap;
148 RegisterRef OffsetRR; in canRemoveAddasl()
151 RegisterRef RR = UA.Addr->getRegRef(); in canRemoveAddasl()
194 RegisterRef UR = UN.Addr->getRegRef(); in allValidCandidates()
218 RegisterRef DR = DA.Addr->getRegRef(); in getAllRealUses()
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| D | HexagonBitTracker.cpp | 84 uint16_t RW = getRegBitWidth(RegisterRef(Reg, Sub)); in mask()
102 std::vector<BT::RegisterRef> Vector;
109 Vector[i] = BT::RegisterRef(MO); in RegisterRefs()
116 const BT::RegisterRef &operator[](unsigned n) const { in operator []()
918 RegisterRef PR = BI.getOperand(0); in evaluate()
1073 RegisterRef RD = MD; in evaluateLoad()
1102 RegisterRef RD = MI.getOperand(0); in evaluateFormalCopy()
1103 RegisterRef RS = MI.getOperand(1); in evaluateFormalCopy()
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| D | HexagonRDFOpt.cpp | 98 auto mapRegs = [MI,&EM] (RegisterRef DstR, RegisterRef SrcR) -> void { in interpretAsCopy()
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| D | HexagonFrameLowering.cpp | 1885 auto getRegClass = [&MRI,&HRI] (HexagonBlockRanges::RegisterRef R) in optimizeSpillSlots()
2110 HexagonBlockRanges::RegisterRef SrcRR = { SrcOp.getReg(), in optimizeSpillSlots()
2171 HexagonBlockRanges::RegisterRef FoundRR = { FoundR, 0 }; in optimizeSpillSlots()
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