Searched refs:Rounding (Results 1 – 25 of 41) sorted by relevance
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173 // Vector Rounding Halving Add188 // Vector Rounding Add High-Half194 // Vector Saturating Rounding Doubling Multiply High233 // Vector Rounding Subtract High-Half309 // Vector Rounding Shift Left313 // Vector Saturating Rounding Shift Left323 // Vector Signed->Unsigned Rounding Narrowing Saturating Shift Right by Const330 // Vector Rounding Narrowing Shift Right by Constant333 // Vector Rounding Narrowing Saturating Shift Right by Constant409 // Vector FP Rounding: only ties to even is unrepresented by a normal
333 // Vector Rounding Shift.346 // Vector Saturating Rounding Shift.415 // Vector Rounding
11 // Rounding Mode Specifier24 // Rounding Mode Operand
480 # Scalar Integer Saturating Rounding Shift Left (Signed, Unsigned)1481 # Scalar Integer Saturating Rounding Doubling Multiply Half High1826 # Scalar Signed Rounding Shift Right (Immediate)1832 # Scalar Unigned Rounding Shift Right (Immediate)1850 # Scalar Signed Rounding Shift Right and Accumulate (Immediate)1856 # Scalar Unsigned Rounding Shift Right and Accumulate (Immediate)2532 # Scalar Floating-point Convert To Lower Precision Narrow, Rounding To2539 # Scalar Floating-point Convert To Signed Integer, Rounding To Nearest2549 # Scalar Floating-point Convert To Unsigned Integer, Rounding To2558 # Scalar Floating-point Convert To Signed Integer, Rounding Toward[all …]
291 // Vector Rounding Shift.304 // Vector Saturating Rounding Shift.
1363 // Scalar Saturating Rounding Shift Left1373 // Signed/Unsigned Rounding Shift Right (Immediate)1378 // Signed/Unsigned Rounding Shift Right and Accumulate (Immediate)1437 // Scalar Integer Saturating Rounding Doubling Multiply Half High1442 // Signed Saturating Rounding Doubling Multiply Accumulate Returning High Half1446 // Signed Saturating Rounding Doubling Multiply Subtract Returning High Half1647 // Scalar Integer Saturating Rounding Doubling Multiply Half High1652 // Signed Saturating Rounding Doubling Multiply Accumulate Returning High Half1656 // Signed Saturating Rounding Doubling Multiply Subtract Returning High Half
1915 #Subtopic Rounding1922 #In Rounding1952 #In Rounding1982 #In Rounding2011 #In Rounding2042 #In Rounding2070 #In Rounding2094 #Subtopic Rounding ##
2005 #Subtopic Rounding2024 #In Rounding2054 #In Rounding2084 #In Rounding2113 #In Rounding2144 #In Rounding2172 #In Rounding2196 #Subtopic Rounding ##
189 // Rounding may cause the significand to overflow and make
867 std::string Rounding; in visitCallConvert() local870 Rounding = DemangledName.substr(Loc, 4); in visitCallConvert()874 return getSPIRVFuncName(OC, TargetTyName + Sat + Rounding); in visitCallConvert()
2606 SPIRVFPRoundingModeKind Rounding; in getOCLConvertBuiltinName() local2609 if (U->hasFPRoundingMode(&Rounding)) { in getOCLConvertBuiltinName()2611 Name += SPIRSPIRVFPRoundingModeMap::rmap(Rounding); in getOCLConvertBuiltinName()
1 -------------------------- test FPU Conversion Operations Using a Directed Rounding Mode ----------…386 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode ------------…
1 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode ------------…
2692 Rounding add narrow returning high half.2699 Rounding add narrow returning high half (second part).2734 Rounding shift right narrow by immediate.2741 Rounding shift right narrow by immediate (second part).2748 Rounding subtract narrow returning high half.2755 Rounding subtract narrow returning high half (second part).
91 enablers which determine whether signals are treated as exceptions. Rounding947 Specification. Precision is set to nine. Rounding is set to958 Specification. Precision is set to nine. Rounding is set to1001 `Rounding Modes`_.1477 Rounding modes1596 Rounding occurred though possibly no information was lost.
397 ; Rounding to dequant and downshift
3387 // VRHADD : Vector Rounding Halving Add3404 // VRADDHN : Vector Rounding Add and Narrow Returning High Half (D = Q + Q)3467 // VQRDMULH : Vector Rounding Saturating Doubling Multiply Returning High Half3656 // VRSUBHN : Vector Rounding Subtract and Narrow Returning High Half (D=Q-Q)4149 // VRSHL : Vector Rounding Shift4156 // VRSHR : Vector Rounding Shift Right4160 // VRSHRN : Vector Rounding Shift Right and Narrow4188 // VQRSHL : Vector Saturating Rounding Shift4196 // VQRSHRN : Vector Saturating Rounding Shift Right and Narrow4202 // VQRSHRUN : Vector Saturating Rounding Shift Right and Narrow (Unsigned)[all …]
2372 // Rounding variants of the below included for disassembly only2383 let Inst{7-4} = 0b0000; // No Rounding (Inst{4} = 0)2393 let Inst{7-4} = 0b0001; // Rounding (Inst{4} = 1)2404 let Inst{7-4} = 0b0000; // No Rounding (Inst{4} = 0)2414 let Inst{7-4} = 0b0001; // Rounding (Inst{4} = 1)2425 let Inst{7-4} = 0b0000; // No Rounding (Inst{4} = 0)2435 let Inst{7-4} = 0b0001; // Rounding (Inst{4} = 1)
1 -------------------------- test FPU Conversion Operations Using a Directed Rounding Mode ----------…722 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode ------------…
91 enablers which determine whether signals are treated as exceptions. Rounding989 Specification. Precision is set to nine. Rounding is set to1000 Specification. Precision is set to nine. Rounding is set to1560 Rounding occurred though possibly no information was lost.
4143 // VRHADD : Vector Rounding Halving Add4159 // VRADDHN : Vector Rounding Add and Narrow Returning High Half (D = Q + Q)4251 // VQRDMULH : Vector Rounding Saturating Doubling Multiply Returning High Half4363 // v8.1a Neon Rounding Double Multiply-Op vector operations,4364 // VQRDMLAH : Vector Saturating Rounding Doubling Multiply Accumulate Long4434 // VQRDMLSH : Vector Saturating Rounding Doubling Multiply Subtract Long4698 // VRSUBHN : Vector Rounding Subtract and Narrow Returning High Half (D=Q-Q)5477 // VRSHL : Vector Rounding Shift5484 // VRSHR : Vector Rounding Shift Right5490 // VRSHRN : Vector Rounding Shift Right and Narrow[all …]
2604 // Rounding variants of the below included for disassembly only2615 let Inst{7-4} = 0b0000; // No Rounding (Inst{4} = 0)2625 let Inst{7-4} = 0b0001; // Rounding (Inst{4} = 1)2636 let Inst{7-4} = 0b0000; // No Rounding (Inst{4} = 0)2646 let Inst{7-4} = 0b0001; // Rounding (Inst{4} = 1)2657 let Inst{7-4} = 0b0000; // No Rounding (Inst{4} = 0)2667 let Inst{7-4} = 0b0001; // Rounding (Inst{4} = 1)
822 // Rounding mode should agree with SystemZInstrFP.td.828 // Rounding mode should agree with SystemZInstrFP.td.
1055 Rounding is unspecified (round to nearest even suggested).1070 Rounding is unspecified (round to nearest even suggested).1085 Rounding is towards zero (truncate).1101 Rounding is towards zero (truncate).
38 | <a href="#Rounding">Rounding</a> | adjust to integer bounds |2510 ## <a name="Rounding"></a> Rounding