Searched refs:VORN (Results 1 – 13 of 13) sorted by relevance
| /external/arm-neon-tests/ |
| D | ref-rvct-neon-nofp16.txt | 4237 VORN/VORNQ output:
4238 VORN/VORNQ:0:result_int8x8 [] = { fffffffd, fffffffd, ffffffff, ffffffff, fffffffd, fffffffd, fffff…
4239 VORN/VORNQ:1:result_int16x4 [] = { fffffff3, fffffff3, fffffff3, fffffff3, }
4240 VORN/VORNQ:2:result_int32x2 [] = { fffffffc, fffffffd, }
4241 VORN/VORNQ:3:result_int64x1 [] = { fffffffffffffffb, }
4242 VORN/VORNQ:4:result_uint8x8 [] = { fb, fb, fb, fb, ff, ff, ff, ff, }
4243 VORN/VORNQ:5:result_uint16x4 [] = { fff1, fff1, fff3, fff3, }
4244 VORN/VORNQ:6:result_uint32x2 [] = { fffffff7, fffffff7, }
4245 VORN/VORNQ:7:result_uint64x1 [] = { fffffffffffffffd, }
4246 VORN/VORNQ:8:result_poly8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
[all …]
|
| D | ref-rvct-neon.txt | 4771 VORN/VORNQ output:
4772 VORN/VORNQ:0:result_int8x8 [] = { fffffffd, fffffffd, ffffffff, ffffffff, fffffffd, fffffffd, fffff…
4773 VORN/VORNQ:1:result_int16x4 [] = { fffffff3, fffffff3, fffffff3, fffffff3, }
4774 VORN/VORNQ:2:result_int32x2 [] = { fffffffc, fffffffd, }
4775 VORN/VORNQ:3:result_int64x1 [] = { fffffffffffffffb, }
4776 VORN/VORNQ:4:result_uint8x8 [] = { fb, fb, fb, fb, ff, ff, ff, ff, }
4777 VORN/VORNQ:5:result_uint16x4 [] = { fff1, fff1, fff3, fff3, }
4778 VORN/VORNQ:6:result_uint32x2 [] = { fffffff7, fffffff7, }
4779 VORN/VORNQ:7:result_uint64x1 [] = { fffffffffffffffd, }
4780 VORN/VORNQ:8:result_poly8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
[all …]
|
| D | ref-rvct-all.txt | 4771 VORN/VORNQ output:
4772 VORN/VORNQ:0:result_int8x8 [] = { fffffffd, fffffffd, ffffffff, ffffffff, fffffffd, fffffffd, fffff…
4773 VORN/VORNQ:1:result_int16x4 [] = { fffffff3, fffffff3, fffffff3, fffffff3, }
4774 VORN/VORNQ:2:result_int32x2 [] = { fffffffc, fffffffd, }
4775 VORN/VORNQ:3:result_int64x1 [] = { fffffffffffffffb, }
4776 VORN/VORNQ:4:result_uint8x8 [] = { fb, fb, fb, fb, ff, ff, ff, ff, }
4777 VORN/VORNQ:5:result_uint16x4 [] = { fff1, fff1, fff3, fff3, }
4778 VORN/VORNQ:6:result_uint32x2 [] = { fffffff7, fffffff7, }
4779 VORN/VORNQ:7:result_uint64x1 [] = { fffffffffffffffd, }
4780 VORN/VORNQ:8:result_poly8x8 [] = { 33, 33, 33, 33, 33, 33, 33, 33, }
[all …]
|
| D | expected_input4gcc-nofp16.txt | 4262 VORN/VORNQ output:
|
| D | expected_input4gcc.txt | 4580 VORN/VORNQ output:
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMScheduleSwift.td | 544 "VPADDL", "VAND", "VBIC", "VEOR", "VORN", "VORR", "VTST",
|
| D | ARMScheduleA9.td | 2402 // VADD/VAND/VORR/VEOR/VBIC/VORN/VBIT/VBIF/VBSL
|
| D | ARMInstrNEON.td | 4952 // VORN : Vector Bitwise OR NOT
|
| /external/v8/src/arm/ |
| D | assembler-arm.cc | 4136 enum BinaryBitwiseOp { VAND, VBIC, VBIF, VBIT, VBSL, VEOR, VORR, VORN }; enumerator
4162 case VORN: in EncodeNeonBinaryBitwiseOp()
|
| /external/clang/include/clang/Basic/ |
| D | arm_neon.td | 806 def VORN : LOpInst<"vorn", "ddd", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl", OP_ORN>;
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 3828 // VORN : Vector Bitwise OR NOT
|
| /external/valgrind/none/tests/arm/ |
| D | neon128.stdout.exp | 133 ---- VORN ----
|
| D | neon64.stdout.exp | 167 ---- VORN ----
|