| /external/walt/android/WALT/app/src/main/jni/ |
| D | sync_clock.c | 130 int send_cmd(struct clock_connection *clk, char cmd) { in send_cmd() argument
131 return bulk_talk(clk->fd, clk->endpoint_out, &cmd, 1); in send_cmd()
135 int send_async(struct clock_connection *clk, char cmd) { in send_async() argument
136 return send_char_async(clk->fd, clk->endpoint_out, cmd, NULL); in send_async()
140 int bulk_read(struct clock_connection *clk) { in bulk_read() argument
141 memset(clk->buffer, 0, sizeof(clk->buffer)); in bulk_read()
142 int ret = bulk_talk(clk->fd, clk->endpoint_in, clk->buffer, sizeof(clk->buffer)); in bulk_read()
147 int micros(struct clock_connection *clk) { in micros() argument
148 return uptimeMicros() - clk->t_base; in micros()
153 void flush_incoming(struct clock_connection *clk) { in flush_incoming() argument
[all …]
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| D | sync_clock_linux.c | 58 struct clock_connection clk; in main() local
59 clk.fd = fd; in main()
60 clk.endpoint_in = ep_in; in main()
61 clk.endpoint_out = ep_out; in main()
63 sync_clocks(&clk); in main()
67 (long long int)clk.t_base, clk.minE, clk.maxE); in main()
70 update_bounds(&clk); in main()
74 (long long int)(clk.t_base), clk.minE, clk.maxE in main()
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| D | sync_clock_jni.c | 27 struct clock_connection clk; variable
37 clk.fd = (int)fd; in Java_org_chromium_latency_walt_WaltUsbConnection_syncClock__III()
38 clk.endpoint_in = (int)endpoint_in; in Java_org_chromium_latency_walt_WaltUsbConnection_syncClock__III()
39 clk.endpoint_out = (int)endpoint_out; in Java_org_chromium_latency_walt_WaltUsbConnection_syncClock__III()
40 clk.t_base = 0; in Java_org_chromium_latency_walt_WaltUsbConnection_syncClock__III()
41 sync_clocks(&clk); in Java_org_chromium_latency_walt_WaltUsbConnection_syncClock__III()
44 int64_t t_base = clk.t_base; in Java_org_chromium_latency_walt_WaltUsbConnection_syncClock__III()
50 update_bounds(&clk); in Java_org_chromium_latency_walt_WaltUsbConnection_updateBounds()
55 return clk.minE; in Java_org_chromium_latency_walt_WaltUsbConnection_getMinE()
61 return clk.maxE; in Java_org_chromium_latency_walt_WaltUsbConnection_getMaxE()
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| D | sync_clock.h | 43 int micros(struct clock_connection *clk);
46 void sync_clocks(struct clock_connection *clk);
49 void update_bounds(struct clock_connection *clk);
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| /external/compiler-rt/lib/tsan/tests/unit/ |
| D | tsan_clock_test.cc | 24 ThreadClock clk(0); in TEST() local
25 ASSERT_EQ(clk.size(), 1U); in TEST()
26 clk.tick(); in TEST()
27 ASSERT_EQ(clk.size(), 1U); in TEST()
28 ASSERT_EQ(clk.get(0), 1U); in TEST()
29 clk.set(3, clk.get(3) + 1); in TEST()
30 ASSERT_EQ(clk.size(), 4U); in TEST()
31 ASSERT_EQ(clk.get(0), 1U); in TEST()
32 ASSERT_EQ(clk.get(1), 0U); in TEST()
33 ASSERT_EQ(clk.get(2), 0U); in TEST()
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| /external/fio/arch/ |
| D | arch-s390.h | 12 unsigned long long clk; in get_cpu_clock() local
19 __asm__ __volatile__("stckf %0" : "=Q" (clk) : : "cc"); in get_cpu_clock()
21 __asm__ __volatile__("stck %0" : "=Q" (clk) : : "cc"); in get_cpu_clock()
23 return clk>>12; in get_cpu_clock()
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| /external/lisa/libs/utils/analysis/ |
| D | frequency_analysis.py | 119 def plotPeripheralClock(self, title='Peripheral Frequency', clk='unknown'): argument
139 rate_df = rate_df[rate_df.clk_name == clk]
146 enable_df = enable_df[enable_df.clk_name == clk]
149 disable_df = disable_df[disable_df.clk_name == clk]
156 self._log.warning('No events for clock ' + clk + ' found in trace')
193 freq_axis.set_title("Clock frequency for " + clk)
236 .format(self._trace.plots_dir, self._trace.plots_prefix, clk)
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| /external/perfetto/src/ftrace_reader/test/data/android_walleye_OPM5.171019.017.A1_4.4.88/events/ufs/ufshcd_clk_scaling/ |
| D | format | 11 field:__data_loc char[] clk; offset:16; size:4; signed:0;
15 print fmt: "%s: %s %s from %u to %u Hz", __get_str(dev_name), __get_str(state), __get_str(clk), REC…
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| /external/fio/engines/ |
| D | posixaio.c | 24 clockid_t clk = CLOCK_MONOTONIC; in fill_timespec() local
26 clockid_t clk = CLOCK_REALTIME; in fill_timespec()
28 if (!clock_gettime(clk, ts)) in fill_timespec()
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| /external/libdrm/nouveau/nvif/ |
| D | if0003.h | 30 __u32 clk; member
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| /external/perfetto/src/ftrace_reader/test/data/android_walleye_OPM5.171019.017.A1_4.4.88/events/msm_bus/bus_rules_matches/ |
| D | format | 15 print fmt: "Rule match node%d rule%d node-ab%llu:ib%llu:clk%llu", REC->node_id, REC->rule_id, (unsi…
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| /external/perfetto/src/ftrace_reader/test/data/android_seed_N2F62_3.10.49/events/msm_bus/bus_rules_matches/ |
| D | format | 15 print fmt: "node:%d rule:%d node-ab:%llu ib:%llu clk:%llu", REC->node_id, REC->rule_id, (unsigned l…
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| /external/syslinux/gpxe/src/drivers/net/ |
| D | r8169.c | 1012 u32 clk; in rtl8169_set_magic_reg() member
1021 u32 clk; in rtl8169_set_magic_reg() local
1025 clk = RTL_R8(Config2) & PCI_Clock_66MHz; in rtl8169_set_magic_reg()
1027 if ((p->mac_version == mac_version) && (p->clk == clk)) { in rtl8169_set_magic_reg()
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| D | sky2.c | 1916 static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk) in sky2_clk2us() argument
1918 return clk / sky2_mhz(hw); in sky2_clk2us()
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| /external/libdrm/include/drm/ |
| D | nouveau_class.h | 297 __u32 clk; member
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| /external/libxml2/result/HTML/ |
| D | wired.html.sax | 1954 SAX.startElement(a, href='http://r.wired.com/r/wn_is_r_ssec/http://ad.doubleclick.net/clk;653163;35…
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| /external/lisa/ipynb/examples/android/workloads/ |
| D | Android_YouTube.ipynb | 569 "trace.analysis.frequency.plotPeripheralClock(title=\"vsync clock\", clk=\"vsync_clk_src\")\n"
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