/external/llvm/test/CodeGen/AArch64/ |
D | arm64-csel.ll | 17 ; CHECK: cneg w{{[0-9]+}}, w{{[0-9]+}}, ne 41 ; CHECK: cneg 53 ; CHECK-NEXT: cneg 138 ; CHECK: cneg w0, w[[REG]], eq 149 ; CHECK: cneg x0, x[[REG]], eq
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/external/llvm/test/MC/AArch64/ |
D | basic-a64-diagnostics.s | 1427 cneg w3, wsp, ne 1428 cneg sp, x9, eq 1429 cneg x4, x5, al
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D | basic-a64-instructions.s | 1439 cneg w3, w5, gt 1440 cneg wzr, w4, le 1441 cneg w9, wzr, lt 1446 cneg x3, x5, gt 1447 cneg xzr, x4, le 1448 cneg x9, xzr, lt
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | basic-a64-instructions.txt | 995 # CHECK: cneg w3, w5, gt 996 # CHECK: cneg wzr, w4, le 997 # CHECK: cneg w9, wzr, lt 998 # CHECK: cneg x3, x5, gt 999 # CHECK: cneg xzr, x4, le 1000 # CHECK: cneg x9, xzr, lt 1001 # "cneg x4, x8, nv" and "cneg w5, w6, al" are invalid aliases for these two
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/external/v8/src/arm64/ |
D | macro-assembler-arm64-inl.h | 451 cneg(rd, rn, cond); in Cneg()
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D | assembler-arm64.h | 1272 void cneg(const Register& rd, const Register& rn, Condition cond);
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D | assembler-arm64.cc | 1387 void Assembler::cneg(const Register &rd, const Register &rn, Condition cond) { in cneg() function in v8::internal::Assembler
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 52 0x~~~~~~~~~~~~~~~~ 5a8e95cd cneg w13, w14, hi 53 0x~~~~~~~~~~~~~~~~ 5a8e85cd cneg w13, w14, ls 54 0x~~~~~~~~~~~~~~~~ da90160f cneg x15, x16, eq 55 0x~~~~~~~~~~~~~~~~ da90060f cneg x15, x16, ne
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D | log-disasm | 52 0x~~~~~~~~~~~~~~~~ 5a8e95cd cneg w13, w14, hi 53 0x~~~~~~~~~~~~~~~~ 5a8e85cd cneg w13, w14, ls 54 0x~~~~~~~~~~~~~~~~ da90160f cneg x15, x16, eq 55 0x~~~~~~~~~~~~~~~~ da90060f cneg x15, x16, ne
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D | log-all | 174 0x~~~~~~~~~~~~~~~~ 5a8e95cd cneg w13, w14, hi 176 0x~~~~~~~~~~~~~~~~ 5a8e85cd cneg w13, w14, ls 178 0x~~~~~~~~~~~~~~~~ da90160f cneg x15, x16, eq 180 0x~~~~~~~~~~~~~~~~ da90060f cneg x15, x16, ne
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 106 __ cneg(w13, w14, hi); in GenerateTestSequenceBase() local 107 __ cneg(w13, w14, ls); in GenerateTestSequenceBase() local 108 __ cneg(x15, x16, eq); in GenerateTestSequenceBase() local 109 __ cneg(x15, x16, ne); in GenerateTestSequenceBase() local
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D | test-disasm-aarch64.cc | 2173 COMPARE(cneg(w5, w6, hs), "cneg w5, w6, hs"); in TEST() 2174 COMPARE(cneg(x7, x8, lo), "cneg x7, x8, lo"); in TEST()
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 854 void cneg(const Register& rd, const Register& rn, Condition cond);
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D | macro-assembler-aarch64.h | 1110 cneg(rd, rn, cond); in Cneg()
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D | assembler-aarch64.cc | 694 void Assembler::cneg(const Register& rd, const Register& rn, Condition cond) { in cneg() function in vixl::aarch64::Assembler
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 304 void cneg(const Register& rd, const Register& rn, Condition cond)
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/external/capstone/arch/AArch64/ |
D | AArch64GenAsmWriter.inc | 7750 AsmString = "cneg $\x01, $\x02, $\xFF\x04\x08"; 7764 AsmString = "cneg $\x01, $\x02, $\xFF\x04\x08";
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 1172 def : InstAlias<"cneg $dst, $src, $cc", 1174 def : InstAlias<"cneg $dst, $src, $cc",
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