| /external/llvm/test/CodeGen/AArch64/ |
| D | cond-sel.ll | 67 ; CHECK: csinc {{w[0-9]+}}, [[LHS]], [[RHS]], ls
75 ; CHECK: csinc {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
84 ; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
92 ; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
209 ; N.b. code is not optimal here (32-bit csinc would be better) but
|
| D | arm64-early-ifcvt.ll | 42 ; CHECK-NEXT: csinc w0, w1, w0, eq
60 ; CHECK-NEXT: csinc x0, x1, x0, eq
78 ; CHECK-NEXT: csinc w0, w1, w0, ne
96 ; CHECK-NEXT: csinc x0, x1, x0, ne
|
| D | arm64-fast-isel-fcmp.ll | 87 ; CHECK-NEXT: csinc {{w[0-9]+}}, [[REG]], wzr, le
112 ; CHECK-NEXT: csinc {{w[0-9]+}}, [[REG]], wzr, vc
|
| D | ifcvt-select.ll | 7 ;CHECK: csinc
|
| /external/capstone/suite/MC/AArch64/ |
| D | basic-a64-instructions.s.cs | 508 0x01,0x14,0x93,0x1a = csinc w1, w0, w19, ne
509 0xbf,0x04,0x89,0x1a = csinc wzr, w5, w9, eq
510 0xe9,0xc7,0x9e,0x1a = csinc w9, wzr, w30, gt
511 0x81,0x47,0x9f,0x1a = csinc w1, w28, wzr, mi
512 0xf3,0xb6,0x9d,0x9a = csinc x19, x23, x29, lt
513 0x7f,0xa4,0x84,0x9a = csinc xzr, x3, x4, ge
514 0xe5,0x27,0x86,0x9a = csinc x5, xzr, x6, hs
515 0x07,0x35,0x9f,0x9a = csinc x7, x8, xzr, lo
532 0xe3,0x17,0x9f,0x1a = csinc w3, wzr, wzr, ne
533 0xe9,0x47,0x9f,0x9a = csinc x9, xzr, xzr, mi
[all …]
|
| /external/valgrind/android/aarch64/ |
| D | setjmp.S | 124 csinc w0, w1, wzr, ne
|
| /external/valgrind/none/tests/arm64/ |
| D | integer.stdout.exp | 859 cmp x17,x18 ; csinc x16,x17,x18,eq :: rd 7a6c3d1a51246496 rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
860 cmp x17,x18 ; csinc x16,x17,x18,ne :: rd afa6ef803bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
861 cmp x17,x18 ; csinc x16,x17,x18,cc :: rd 7a6c3d1a51246496 rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
862 cmp x17,x18 ; csinc x16,x17,x18,cs :: rd afa6ef803bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
863 cmp x17,x18 ; csinc x16,x17,x18,mi :: rd 7a6c3d1a51246496 rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
864 cmp x17,x18 ; csinc x16,x17,x18,pl :: rd afa6ef803bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
865 cmp x17,x18 ; csinc x16,x17,x18,vc :: rd 7a6c3d1a51246496 rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
866 cmp x17,x18 ; csinc x16,x17,x18,vs :: rd afa6ef803bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
892 cmp w17,w18 ; csinc w16,w17,w18,eq :: rd 0000000051246496 rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
893 cmp w17,w18 ; csinc w16,w17,w18,ne :: rd 000000003bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
[all …]
|
| /external/llvm/test/MC/AArch64/ |
| D | basic-a64-instructions.s | 1347 csinc w1, w0, w19, ne
1348 csinc wzr, w5, w9, eq
1349 csinc w9, wzr, w30, gt
1350 csinc w1, w28, wzr, mi
1356 csinc x19, x23, x29, lt
1357 csinc xzr, x3, x4, ge
1358 csinc x5, xzr, x6, cs
1359 csinc x7, x8, xzr, cc
|
| D | arm64-arithmetic-encoding.s | 552 csinc w1, w2, w3, eq
553 csinc x1, x2, x3, eq
|
| D | basic-a64-diagnostics.s | 1357 csinc w20, w21, wsp, mi
1358 csinc sp, x30, x29, eq
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-arithmetic.txt | 516 # CHECK: csinc w1, w2, w3, eq
518 # CHECK: csinc x1, x2, x3, eq
|
| D | basic-a64-instructions.txt | 894 # CHECK: csinc w1, w0, w19, ne
895 # CHECK: csinc wzr, w5, w9, eq
896 # CHECK: csinc w9, wzr, w30, gt
897 # CHECK: csinc w1, w28, wzr, mi
898 # CHECK: csinc x19, x23, x29, lt
899 # CHECK: csinc xzr, x3, x4, ge
900 # CHECK: csinc x5, xzr, x6, hs
901 # CHECK: csinc x7, x8, xzr, lo
950 # CHECK: csinc w2, wzr, wzr, al
966 # CHECK: csinc w5, w6, w6, nv
[all …]
|
| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 1337 void Assembler::csinc(const Register& rd, in csinc() function in v8::internal::Assembler
1364 csinc(rd, zr, zr, NegateCondition(cond)); in cset()
1377 csinc(rd, rn, rn, NegateCondition(cond)); in cinc()
|
| D | macro-assembler-arm64-inl.h | 504 csinc(rd, rn, rm, cond); in Csinc()
|
| D | assembler-arm64.h | 1242 void csinc(const Register& rd,
|
| D | macro-assembler-arm64.cc | 393 csinc(rd, rn, zr, cond); in Csel()
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 644 void Assembler::csinc(const Register& rd, in csinc() function in vixl::aarch64::Assembler
671 csinc(rd, zr, zr, InvertCondition(cond)); in cset()
684 csinc(rd, rn, rn, InvertCondition(cond)); in cinc()
|
| D | macro-assembler-aarch64.cc | 1395 masm->csinc(rd, left_register, zr, cond); in CselSubHelperRightSmallImmediate()
|
| D | assembler-aarch64.h | 824 void csinc(const Register& rd,
|
| D | macro-assembler-aarch64.h | 1134 csinc(rd, rn, rm, cond); in Csinc()
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 74 0x~~~~~~~~~~~~~~~~ 1a993717 csinc w23, w24, w25, lo
75 0x~~~~~~~~~~~~~~~~ 1a992717 csinc w23, w24, w25, hs
76 0x~~~~~~~~~~~~~~~~ 9a9c877a csinc x26, x27, x28, hi
77 0x~~~~~~~~~~~~~~~~ 9a9c977a csinc x26, x27, x28, ls
|
| D | log-disasm | 74 0x~~~~~~~~~~~~~~~~ 1a993717 csinc w23, w24, w25, lo
75 0x~~~~~~~~~~~~~~~~ 1a992717 csinc w23, w24, w25, hs
76 0x~~~~~~~~~~~~~~~~ 9a9c877a csinc x26, x27, x28, hi
77 0x~~~~~~~~~~~~~~~~ 9a9c977a csinc x26, x27, x28, ls
|
| D | log-all | 218 0x~~~~~~~~~~~~~~~~ 1a993717 csinc w23, w24, w25, lo
220 0x~~~~~~~~~~~~~~~~ 1a992717 csinc w23, w24, w25, hs
222 0x~~~~~~~~~~~~~~~~ 9a9c877a csinc x26, x27, x28, hi
224 0x~~~~~~~~~~~~~~~~ 9a9c977a csinc x26, x27, x28, ls
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 128 __ csinc(w23, w24, w25, cc); in GenerateTestSequenceBase() local
129 __ csinc(w23, w24, w25, cs); in GenerateTestSequenceBase() local
130 __ csinc(x26, x27, x28, hi); in GenerateTestSequenceBase() local
131 __ csinc(x26, x27, x28, ls); in GenerateTestSequenceBase() local
|
| D | test-disasm-aarch64.cc | 2159 COMPARE(csinc(w6, w7, w8, hs), "csinc w6, w7, w8, hs"); in TEST()
2160 COMPARE(csinc(x9, x10, x11, lo), "csinc x9, x10, x11, lo"); in TEST()
2178 COMPARE(csinc(x2, x3, x4, al), "csinc x2, x3, x4, al"); in TEST()
2179 COMPARE(csinc(x3, x4, x5, nv), "csinc x3, x4, x5, nv"); in TEST()
|