| /external/llvm/test/CodeGen/AArch64/ |
| D | cmpxchg-O0.ll | 21 ; CHECK: ldaxrh [[OLD:w[0-9]+]], [x0]
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| D | atomic-ops.ll | 43 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
442 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
622 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
719 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
914 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
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| D | arm64-ldxr-stxr.ll | 188 ; CHECK: ldaxrh w[[LOADVAL:[0-9]+]], [x0]
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| /external/llvm/test/MC/AArch64/ |
| D | arm64-memory.s | 513 ldaxrh w2, [x4]
520 ; CHECK: ldaxrh w2, [x4] ; encoding: [0x82,0xfc,0x5f,0x48]
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| D | basic-a64-instructions.s | 2295 ldaxrh w20, [sp]
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| /external/vixl/ |
| D | README.md | 125 `stlxrh`, `stlxr`, `ldaxrb`, `ldaxrh`, `ldaxr`, `stlxp`, `ldaxp`, `stlrb`,
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-memory.txt | 501 # CHECK: ldaxrh w2, [x4]
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| D | basic-a64-instructions.txt | 1965 #CHECK: ldaxrh w7, [x5]
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| /external/v8/src/arm64/ |
| D | macro-assembler-arm64.h | 76 V(Ldaxrh, ldaxrh) \
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| D | assembler-arm64.h | 1429 void ldaxrh(const Register& rt, const Register& rn);
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| D | assembler-arm64.cc | 1755 void Assembler::ldaxrh(const Register& rt, const Register& rn) { in ldaxrh() function in v8::internal::Assembler
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| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 1823 COMPARE(ldaxrh(w15, MemOperand(x16)), "ldaxrh w15, [x16]"); in TEST()
1824 COMPARE(ldaxrh(w17, MemOperand(sp)), "ldaxrh w17, [sp]"); in TEST()
1825 COMPARE(ldaxrh(x18, MemOperand(x19)), "ldaxrh w18, [x19]"); in TEST()
1826 COMPARE(ldaxrh(x20, MemOperand(sp)), "ldaxrh w20, [sp]"); in TEST()
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| D | test-trace-aarch64.cc | 164 __ ldaxrh(w17, MemOperand(x0)); in GenerateTestSequenceBase() local
165 __ ldaxrh(x18, MemOperand(x0)); in GenerateTestSequenceBase() local
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| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 1144 void ldaxrh(const Register& rt, const MemOperand& src);
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| D | macro-assembler-aarch64.h | 1491 ldaxrh(rt, src); in Ldaxrh()
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| D | assembler-aarch64.cc | 1319 void Assembler::ldaxrh(const Register& rt, const MemOperand& src) { in ldaxrh() function in vixl::aarch64::Assembler
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| /external/capstone/suite/MC/AArch64/ |
| D | basic-a64-instructions.s.cs | 893 0xf4,0xff,0x5f,0x48 = ldaxrh w20, [sp]
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| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 110 0x~~~~~~~~~~~~~~~~ 485ffc11 ldaxrh w17, [x0]
111 0x~~~~~~~~~~~~~~~~ 485ffc12 ldaxrh w18, [x0]
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| D | log-disasm | 110 0x~~~~~~~~~~~~~~~~ 485ffc11 ldaxrh w17, [x0]
111 0x~~~~~~~~~~~~~~~~ 485ffc12 ldaxrh w18, [x0]
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| D | log-all | 286 0x~~~~~~~~~~~~~~~~ 485ffc11 ldaxrh w17, [x0]
288 0x~~~~~~~~~~~~~~~~ 485ffc12 ldaxrh w18, [x0]
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 543 void ldaxrh(const Register& rt, const MemOperand& src)
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2441 def LDAXRH : LoadExclusive <0b01, 0, 1, 0, 1, GPR32, "ldaxrh">;
|